🏡 index : old_projects/qingyun.git

/dts-v1/;

/ {
	hisi,boardname = "ARMPC_PANGUX";
	hisi,product_id = <0x2df5fc00>;
	hisi,modem_id = <0x2df5fc00>;
	hisi,boardid = <0x01 0x03 0x03 0x00 0x01>;
	#address-cells = <0x02>;
	#size-cells = <0x02>;
	model = "HUAWEI Kirin 9000C";
	compatible = "hisilicon,charlotte";
	interrupt-parent = <0x01>;
	hisi,gpu_vendor = "higpu.v200";
	hisi,chipid = <0x06 0x0b 0x00 0x00>;
	hisi,chiptype = "baltimore";
	hisi,platformid = "111";

	memory@0 {
		device_type = "memory";
		reg = <0x00 0x400000 0x00 0xbffa0000>;
		numa-node-id = <0x00>;
	};

	reserved-memory {
		#address-cells = <0x02>;
		#size-cells = <0x02>;
		ranges;
		phandle = <0x197>;

		app_no_allocate {
			reg = <0x00 0x00 0x00 0x1000>;
		};

		sensorhub-shmemext {
			reg = <0x00 0x10000000 0x00 0x600000>;
			no-map;
		};

		sensorhub-shmem {
			reg = <0x00 0x10600000 0x00 0x40000>;
			no-map;
		};

		sensorhub-share-mem {
			reg = <0x00 0x10640000 0x00 0x80000>;
			no-map;
		};

		iommu_pgtable {
			reg = <0x00 0x106c0000 0x00 0x200000>;
			no-map;
			phandle = <0x198>;
		};

		fka-mem {
			reg = <0x00 0x108c0000 0x00 0xfe000>;
			compatible = "ddr_inspect";
			region-name = "ddr_inspect_data";
			status = "ok";
			no-map;
		};

		teeos-cmdline {
			reg = <0x00 0x109be000 0x00 0x1000>;
			compatible = "teeos-cmdline";
			no-map;
			status = "ok";
		};

		mntndump {
			reg = <0x00 0x109bf000 0x00 0x1000>;
			no-map;
		};

		gpu-jcd {
			reg = <0x00 0x10f40000 0x00 0x400000>;
		};

		dp-dhcp {
			reg = <0x00 0x11340000 0x00 0x80000>;
			no-map;
		};

		hhee {
			reg = <0x00 0x113c0000 0x00 0x800000>;
			no-map;
			status = "ok";
		};

		hhee-kasan {
			reg = <0x00 0x68000000 0x00 0x2000000>;
			no-map;
			status = "disable";
		};

		lpmx-core {
			reg = <0x00 0x127c0000 0x00 0x80000>;
			no-map;
		};

		lpmcu {
			reg = <0x00 0x12840000 0x00 0xc0000>;
			no-map;
		};

		sensorhub-s {
			reg = <0x00 0x12900000 0x00 0xd00000>;
			no-map;
		};

		npu-tiny {
			reg = <0x00 0x13600000 0x00 0x600000>;
			no-map;
		};

		mini-isp {
			reg = <0x00 0x13c00000 0x00 0x200000>;
			no-map;
		};

		bl31 {
			reg = <0x00 0x13e00000 0x00 0x200000>;
			no-map;
		};

		gcov-bl31 {
			reg = <0x00 0x64000000 0x00 0x1000000>;
			no-map;
			status = "disable";
		};

		sec_smmu_tcu {
			reg = <0x00 0x14380000 0x00 0x180000>;
			compatible = "sec-smmu-tcu";
			no-map;
			status = "ok";
			phandle = <0x199>;
		};

		sensorhub-sdc {
			reg = <0x00 0x14500000 0x00 0x100000>;
			no-map;
		};

		secos {
			reg = <0x00 0x14600000 0x00 0x3200000>;
			no-map;
		};

		thee {
			reg = <0x00 0x17800000 0x00 0xb00000>;
			no-map;
			status = "ok";
			phandle = <0x884>;
		};

		s4-bl31-ex {
			reg = <0x00 0x18300000 0x00 0x80000>;
			no-map;
			status = "ok";
		};

		modem-nsro-share-mem {
			status = "disabled";
			reg = <0x00 0x1e000000 0x00 0xe00000>;
			no-map;
		};

		modem-share-mem {
			status = "disabled";
			reg = <0x00 0x1ee00000 0x00 0x200000>;
			no-map;
		};

		modem-mntn {
			reg = <0x00 0x1f000000 0x00 0x400000>;
			no-map;
			status = "disabled";
		};

		modem-sa {
			reg = <0x00 0x20000000 0x00 0x9e00000>;
			no-map;
			status = "disabled";
		};

		supersonic-ex {
			reg = <0x00 0x2b400000 0x00 0x980000>;
			compatible = "platform-supersonic-ex";
			no-map;
			status = "ok";
		};

		secos-ex {
			reg = <0x00 0x2bd80000 0x00 0x480000>;
			compatible = "platform-secos-ex";
			no-map;
			status = "ok";
		};

		supersonic {
			reg = <0x00 0x2c200000 0x00 0x9b0000>;
			compatible = "platform-supersonic";
			no-map;
			status = "disabled";
		};

		fingerprint-dma {
			reg = <0x00 0x2cbb0000 0x00 0x50000>;
			compatible = "fingerprint,dma";
			no-map;
			status = "disabled";
		};

		sec_camera {
			reg = <0x00 0x2cc00000 0x00 0xc00000>;
			no-map;
			status = "disabled";
		};

		hieps {
			reg = <0x00 0x2d800000 0x00 0x200000>;
			no-map;
		};

		hifi-base {
			reg = <0x00 0x2da00000 0x00 0xf80000>;
			no-map;
		};

		npu-sec {
			compatible = "hisi-npu-sec";
			reg = <0x00 0x2e980000 0x00 0x700000>;
			no-map;
			status = "ok";
		};

		hifi-data {
			reg = <0x00 0x2f080000 0x00 0x580000>;
			no-map;
		};

		bbox-mem {
			reg = <0x00 0x2f600000 0x00 0x620000>;
			no-map;
			phandle = <0xf4>;
		};

		bl31_ns {
			reg = <0x00 0x2fc20000 0x00 0x20000>;
			no-map;
		};

		pstore-mem {
			reg = <0x00 0x2fc40000 0x00 0x100000>;
			phandle = <0x15a>;
		};

		npu_ai_ts_fw {
			reg = <0x00 0x2fd40000 0x00 0x400000>;
			no-map;
		};

		npu_ai_server {
			reg = <0x00 0x30140000 0x00 0x600000>;
			no-map;
		};

		s4-ns-mem {
			reg = <0x00 0x30740000 0x00 0x180000>;
			no-map;
			status = "ok";
		};

		logo-buffer {
			reg = <0x00 0x34380000 0x00 0x7080000>;
			status = "disabled";
			visible_to_users;
		};

		fastboot-cma-mem {
			reg = <0x00 0x3b400000 0x00 0x4c00000>;
			compatible = "shared-dma-pool";
			mm,cma-sec;
			sec-attr = <0x00 0x00>;
			linux,cma-default;
			reusable;
			status = "ok";
			visible_to_users;
			phandle = <0x110>;
		};

		uefi_rt {
			reg = <0x00 0x5f800000 0x00 0x800000>;
			no-map;
			status = "ok";
		};

		hota {
			reg = <0x00 0x6ce00000 0x00 0x10000000>;
			no-map;
			status = "disabled";
		};

		modem-sec-alloc {
			compatible = "hisi-modem-sec-alloc";
			reg = <0x00 0x7ce00000 0x00 0x3200000>;
			no-map;
			status = "disabled";
		};

		kerneldump {
			reg = <0x00 0x80000000 0x00 0x10000000>;
			status = "disabled";
			resize_size = <0x80000000>;
			resize = "0x80000000";
			visible_to_users;
		};

		modem-s {
			status = "disabled";
			reg = <0x00 0xa0000000 0x00 0xe000000>;
			no-map;
		};

		modem-odt {
			reg = <0x00 0xb0f80000 0x00 0x8000000>;
			no-map;
			status = "disabled";
		};

		fastboot-gcda {
			reg = <0x00 0xc0000000 0x00 0x200000>;
			no-map;
			status = "disabled";
		};

		hibench-gcda {
			reg = <0x00 0xc0200000 0x00 0x100000>;
			no-map;
			status = "disabled";
		};

		dtb {
			reg = <0x00 0x66000000 0x00 0x800000>;
			status = "disabled";
			phandle = <0x19b>;
		};

		normal-ramdisk {
			reg = <0x00 0x66800000 0x00 0x800000>;
			status = "disabled";
			phandle = <0x19c>;
		};

		recovery-ramdisk {
			reg = <0x00 0x80000000 0x00 0x20000000>;
			status = "disabled";
			phandle = <0x19d>;
		};

		xmode-data {
			size = <0x00 0x1f400000>;
			alignment = <0x00 0x100000>;
			alloc-ranges = <0x00 0x00 0x01 0x00>;
			compatible = "modem_xmode_region";
			region-name = "xmode-data";
			status = "disabled";
			phandle = <0x19e>;
		};

		lb_tst_memory {
			size = <0x00 0xc000000>;
			alignment = <0x00 0x100000>;
			alloc-ranges = <0x00 0x00 0x01 0x00>;
			compatible = "lb_tst_region";
			region-name = "tst-data";
			status = "disabled";
		};

		dmss_pt {
			size = <0x00 0x20000000>;
			compatible = "dmsspt_trace_buffer";
			no-map;
			status = "disabled";
		};

		camera-mem {
			size = <0x00 0xec00000>;
			alignment = <0x00 0x400000>;
			alloc-ranges = <0x01 0x00 0x01 0x00>;
			compatible = "mm-camera-pool";
			reusable;
			status = "disabled";
			visible_to_users;
			phandle = <0x19f>;
		};

		mm_cma {
			reg = <0x00 0x40000000 0x00 0x10000000>;
			compatible = "mm-cma-pool";
			cma-traced;
			sec-attr = <0x00 0x20>;
			svc-id = <0x00 0x2b>;
			subbit-align = <0x00 0x200000>;
			reusable;
			status = "disabled";
			visible_to_users;
			phandle = <0x158>;
		};

		mm_iris_static_cma {
			reg = <0x00 0x50000000 0x00 0xa400000>;
			compatible = "mm-iris-sta-cma-pool";
			sec-attr = <0x00 0x20>;
			svc-id = <0x00 0x10>;
			subbit-align = <0x00 0x200000>;
			reusable;
			status = "disabled";
			visible_to_users;
			phandle = <0x1a0>;
		};

		tiny_cma {
			reg = <0x00 0x60000000 0x00 0x2800000>;
			compatible = "tiny-cma-pool";
			sec-attr = <0x00 0x20>;
			svc-id = <0x00 0x84>;
			subbit-align = <0x00 0x100000>;
			reusable;
			media_zone_rsvd;
			status = "disabled";
			visible_to_users;
			phandle = <0x159>;
		};

		mm_smemheap_cma {
			reg = <0x00 0x90000000 0x00 0x10000000>;
			sid = <0x00 0x02>;
			compatible = "smemheap-cma";
			svc-id = <0x00 0x40>;
			subbit-align = <0x00 0x200000>;
			water-mark-min = <0x00 0x00>;
			water-mark-low = <0x00 0x20>;
			water-mark-high = <0x00 0x56>;
			escape-flag = <0x00 0x00>;
			reusable;
			status = "disabled";
			smem-minfree-min = <0x25800>;
			smem-minfree-low = <0x3e800>;
			smem-minfree-high = <0x64000>;
			visible_to_users;
			phandle = <0x1a1>;
		};

		aod_dynamic_cma {
			reg = <0x00 0xc0000000 0x00 0xa400000>;
			compatible = "shared-dma-pool";
			reusable;
			status = "disabled";
			visible_to_users;
			phandle = <0x1a2>;
		};
	};

	fastboot_pmic {
		compatible = "fastboot,main-pmic";
		pmic-init-reg-num = <0x01>;
		pmic-init-reg-addrs = <0xbf>;
		pmic-init-reg-vals = <0x90>;
		phandle = <0x1a3>;
	};

	fastboot_pmic_mntn {
		compatible = "fastboot,main-pmic-mntn";
		#address-cells = <0x01>;
		#size-cells = <0x00>;
		pmic-mntn-data-width = <0x08>;
		pmic-mntn-record-reg-num = <0x15>;
		pmic-mntn-record-regs = <0x2cc 0x2cd 0x2ce 0x2cf 0x2d0 0x2d1 0x2d2 0x2d3 0x2d4 0x2d5 0x2d6 0x2d7 0x2d8 0x2d9 0x2da 0x2db 0x2dc 0x2dd 0x2de 0x2df 0x2e0>;
		phandle = <0x1a4>;

		RECORD@2CC {
			compatible = "hisilicon,pmic-mntn-record-reg0x2CC";
			reg = <0x2cc>;
			pmic-mntn-inacceptable-event = <0xdf>;
			pmic-mntn-except-type = <0x04 0x04 0x04 0x10 0x10 0x00 0x10 0x10>;
			pmic-mntn-except-subtype = <0x01 0x02 0x04 0x00 0x00 0x00 0x00 0x00>;
			pmic-mntn-event-bit-name = "vsys_ov", "vsys_pwroff_abs", "vsys_pwroff_deb", "thsd_otmp140", "thsd_otmp125", "hresetn", "avdd_osc_vld", "19m2_dis";
		};

		RECORD@2CD {
			compatible = "hisilicon,pmic-mntn-record-reg0x2CD";
			reg = <0x2cd>;
			pmic-mntn-inacceptable-event = <0x07>;
			pmic-mntn-except-type = <0x20 0x08 0x20 0x00 0x00 0x00 0x00 0x00>;
			pmic-mntn-except-subtype = <0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00>;
			pmic-mntn-event-bit-name = "press8s_restart", "pwrhold_shutdown", "press8s_shutdown", "pwrhold_pwrup", "alarm_pwrup", "vbus_pwrup", "press40ms_pwrup", "fast_pwrup";
		};

		RECORD@2CE {
			compatible = "hisilicon,pmic-mntn-record-reg0x2CE";
			reg = <0x2ce>;
			pmic-mntn-inacceptable-event = <0x78>;
			pmic-mntn-except-type = <0x00 0x00 0x00 0x02 0x10 0x01 0x20 0x00>;
			pmic-mntn-except-subtype = <0x00 0x00 0x00 0x00 0x00 0x01 0x00 0x00>;
			pmic-mntn-event-bit-name = "dcxo_sel_r", "dcxo_sel_f", "vsys_vcoin_sel", "smpl", "core_io_vld_f", "sys_nrst_4s", "pwron_hrst", "pwrup_nfc";
		};

		RECORD@2CF {
			compatible = "hisilicon,pmic-mntn-record-reg0x2CF";
			reg = <0x2cf>;
			pmic-mntn-inacceptable-event = <0x3f>;
			pmic-mntn-except-type = <0x01 0x01 0x01 0x01 0x00 0x00 0x00 0x00>;
			pmic-mntn-except-subtype = <0x02 0x03 0x04 0x05 0x00 0x00 0x00 0x00>;
			pmic-mntn-event-bit-name = "pmua_short_f", "pmuh_short_f", "vin_ldoh_shutdown", "vsys_pwronexp_shutdown", "np_nfc_shutdown", "core_io12_18_vld_f", "reserved", "reserved";
		};

		RECORD@2D0 {
			compatible = "hisilicon,pmic-mntn-record-reg0x2D0";
			reg = <0x2d0>;
			pmic-mntn-inacceptable-event = <0xff>;
			pmic-mntn-except-type = <0x01 0x01 0x01 0x01 0x01 0x01 0x04 0x04>;
			pmic-mntn-except-subtype = <0x06 0x07 0x08 0x09 0x0a 0x0b 0x08 0x10>;
			pmic-mntn-event-bit-name = "cali_pmuh_ocp", "cali_ldo26_ocp", "cali_buck2_scp", "cali_buck2_ocp", "cali_pmuh_short", "cali_pmud_short", "cali_vsyspwroff_deb", "cali_vsyspwroff_abs";
		};

		RECORD@2D1 {
			compatible = "hisilicon,pmic-mntn-record-reg0x2D1";
			reg = <0x2d1>;
			pmic-mntn-inacceptable-event = <0x1f>;
			pmic-mntn-except-type = <0x10 0x10 0x10 0x04 0x10 0x00 0x00 0x00>;
			pmic-mntn-except-subtype = <0x00 0x00 0x00 0x20 0x00 0x00 0x00 0x00>;
			pmic-mntn-event-bit-name = "cali_avdd_osc_vld", "cali_thsd_otmp140", "cali_thsd_otmp125", "cali_vsys_ov", "cali_19m2_dis", "reserved", "reserved", "reserved";
		};

		RECORD@2D2 {
			compatible = "hisilicon,pmic-mntn-record-reg0x2D2";
			reg = <0x2d2>;
			pmic-mntn-inacceptable-event = <0xff>;
			pmic-mntn-except-type = <0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01>;
			pmic-mntn-except-subtype = <0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x12 0x13>;
			pmic-mntn-event-bit-name = "ocp_buck1", "ocp_buck2", "ocp_buck3", "ocp_buck40", "ocp_buck41", "ocp_buck42", "ocp_buck70", "ocp_buck71";
		};

		RECORD@2D3 {
			compatible = "hisilicon,pmic-mntn-record-reg0x2D3";
			reg = <0x2d3>;
			pmic-mntn-inacceptable-event = <0xff>;
			pmic-mntn-except-type = <0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01>;
			pmic-mntn-except-subtype = <0x14 0x15 0x16 0x17 0x18 0x19 0x1a 0x1b>;
			pmic-mntn-event-bit-name = "ocp_ldo6", "ocp_ldo4", "ocp_ldo3", "ocp_ldo2", "ocp_ldo1", "ocp_ldo0", "ocp_buck5", "ocp_buck9";
		};

		RECORD@2D4 {
			compatible = "hisilicon,pmic-mntn-record-reg0x2D4";
			reg = <0x2d4>;
			pmic-mntn-inacceptable-event = <0xff>;
			pmic-mntn-except-type = <0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01>;
			pmic-mntn-except-subtype = <0x1c 0x1d 0x1e 0x1f 0x20 0x21 0x22 0x23>;
			pmic-mntn-event-bit-name = "ocp_ldo18", "ocp_ldo17", "ocp_ldo16", "ocp_ldo15", "ocp_ldo14", "ocp_ldo12", "ocp_ldo11", "ocp_ldo8";
		};

		RECORD@2D5 {
			compatible = "hisilicon,pmic-mntn-record-reg0x2D5";
			reg = <0x2d5>;
			pmic-mntn-inacceptable-event = <0xff>;
			pmic-mntn-except-type = <0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01>;
			pmic-mntn-except-subtype = <0x24 0x25 0x26 0x27 0x28 0x29 0x2a 0x2b>;
			pmic-mntn-event-bit-name = "ocp_ldo28", "ocp_ldo27", "ocp_ldo26", "ocp_ldo25", "ocp_ldo24", "ocp_ldo23", "ocp_ldo22", "ocp_ldo21";
		};

		RECORD@2D6 {
			compatible = "hisilicon,pmic-mntn-record-reg0x2D6";
			reg = <0x2d6>;
			pmic-mntn-inacceptable-event = <0xff>;
			pmic-mntn-except-type = <0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01>;
			pmic-mntn-except-subtype = <0x2c 0x2d 0x2e 0x2f 0x30 0x31 0x32 0x33>;
			pmic-mntn-event-bit-name = "ocp_ldo39", "ocp_ldo38", "ocp_ldo37", "ocp_ldo36", "ocp_pmuh", "ocp_ldo32", "ocp_ldo30", "ocp_ldo29";
		};

		RECORD@2D7 {
			compatible = "hisilicon,pmic-mntn-record-reg0x2D7";
			reg = <0x2d7>;
			pmic-mntn-inacceptable-event = <0x7f>;
			pmic-mntn-except-type = <0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x00>;
			pmic-mntn-except-subtype = <0x34 0x35 0x36 0x37 0x38 0x39 0x3a 0x00>;
			pmic-mntn-event-bit-name = "ocp_sw1", "ocp_ldo46", "ocp_ldo45", "ocp_ldo44", "ocp_ldo43", "ocp_ldo42", "ocp_ldo41", "reserved";
		};

		RECORD@2D8 {
			compatible = "hisilicon,pmic-mntn-record-reg0x2D8";
			reg = <0x2d8>;
			pmic-mntn-inacceptable-event = <0x01>;
			pmic-mntn-except-type = <0x01 0x00 0x00 0x00 0x00 0x00 0x00 0x00>;
			pmic-mntn-except-subtype = <0x3b 0x00 0x00 0x00 0x00 0x00 0x00 0x00>;
			pmic-mntn-event-bit-name = "ocp_ldo_sink", "reserved", "reserved", "reserved", "reserved", "reserved", "reserved", "reserved";
		};

		RECORD@2D9 {
			compatible = "hisilicon,pmic-mntn-record-reg0x2D9";
			reg = <0x2d9>;
			pmic-mntn-inacceptable-event = <0xff>;
			pmic-mntn-except-type = <0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01>;
			pmic-mntn-except-subtype = <0x3c 0x3d 0x3e 0x3f 0x40 0x41 0x42 0x43>;
			pmic-mntn-event-bit-name = "scp_buck1", "scp_buck2", "scp_buck3", "scp_buck401", "scp_buck42", "scp_buck5", "scp_buck70", "scp_buck71";
		};

		RECORD@2DA {
			compatible = "hisilicon,pmic-mntn-record-reg0x2DA";
			reg = <0x2da>;
			pmic-mntn-inacceptable-event = <0x0f>;
			pmic-mntn-except-type = <0x01 0x01 0x01 0x01 0x00 0x00 0x00 0x00>;
			pmic-mntn-except-subtype = <0x44 0x45 0x46 0x47 0x00 0x00 0x00 0x00>;
			pmic-mntn-event-bit-name = "scp_buck9", "scp_ldobuff", "ocp_discharger", "scp_ldo_sink", "reserved", "reserved", "reserved", "reserved";
		};

		RECORD@2DB {
			compatible = "hisilicon,pmic-mntn-record-reg0x2DB";
			reg = <0x2db>;
			pmic-mntn-inacceptable-event = <0x0f>;
			pmic-mntn-except-type = <0x01 0x01 0x01 0x01 0x00 0x00 0x00 0x00>;
			pmic-mntn-except-subtype = <0x48 0x49 0x4a 0x4b 0x00 0x00 0x00 0x00>;
			pmic-mntn-event-bit-name = "ovp_buck401", "ovp_buck42", "ovp_buck70", "ovp_buck71", "reserved", "reserved", "reserved", "reserved";
		};

		RECORD@2DC {
			compatible = "hisilicon,pmic-mntn-record-reg0x2DC";
			reg = <0x2dc>;
			pmic-mntn-inacceptable-event = <0x03>;
			pmic-mntn-except-type = <0x01 0x01 0x00 0x00 0x00 0x00 0x00 0x00>;
			pmic-mntn-except-subtype = <0x4c 0x4d 0x00 0x00 0x00 0x00 0x00 0x00>;
			pmic-mntn-event-bit-name = "buck401_cur_det", "buck42_cur_det", "reserved", "reserved", "reserved", "reserved", "reserved", "reserved";
		};

		RECORD@2DD {
			compatible = "hisilicon,pmic-mntn-record-reg0x2DD";
			reg = <0x2dd>;
			pmic-mntn-inacceptable-event = <0x1f>;
			pmic-mntn-except-type = <0x01 0x01 0x01 0x01 0x01 0x00 0x00 0x00>;
			pmic-mntn-except-subtype = <0x4e 0x4f 0x50 0x51 0x52 0x00 0x00 0x00>;
			pmic-mntn-event-bit-name = "ramp_buck40", "ramp_buck42", "ramp_buck5", "ramp_buck70", "ramp_buck71", "reserved", "reserved", "reserved";
		};

		RECORD@2DE {
			compatible = "hisilicon,pmic-mntn-record-reg0x2DE";
			reg = <0x2de>;
			pmic-mntn-inacceptable-event = <0x0f>;
			pmic-mntn-except-type = <0x01 0x01 0x01 0x01 0x00 0x00 0x00 0x00>;
			pmic-mntn-except-subtype = <0x53 0x54 0x55 0x56 0x00 0x00 0x00 0x00>;
			pmic-mntn-event-bit-name = "ramp_ldo0", "ramp_ldo39", "ramp_ldo44", "ramp_ldo45", "reserved", "reserved", "reserved", "reserved";
		};

		RECORD@2DF {
			compatible = "hisilicon,pmic-mntn-record-reg0x2DF";
			reg = <0x2df>;
			pmic-mntn-inacceptable-event = <0x1f>;
			pmic-mntn-except-type = <0x01 0x01 0x01 0x01 0x01 0x00 0x00 0x00>;
			pmic-mntn-except-subtype = <0x57 0x58 0x59 0x5a 0x5b 0x00 0x00 0x00>;
			pmic-mntn-event-bit-name = "ramp_buck40_abnor", "ramp_buck42_abnor", "ramp_buck5_abnor", "ramp_buck70_abnor", "ramp_buck71_abnor", "reserved", "reserved", "reserved";
		};

		RECORD@2E0 {
			compatible = "hisilicon,pmic-mntn-record-reg0x2E0";
			reg = <0x2e0>;
			pmic-mntn-inacceptable-event = <0x0f>;
			pmic-mntn-except-type = <0x01 0x01 0x01 0x01 0x00 0x00 0x00 0x00>;
			pmic-mntn-except-subtype = <0x5c 0x5d 0x5e 0x5f 0x00 0x00 0x00 0x00>;
			pmic-mntn-event-bit-name = "ramp_ldo0_abnor", "ramp_ldo39_abnor", "ramp_ldo44_abnor", "ramp_ldo45_abnor", "reserved", "reserved", "reserved", "reserved";
		};
	};

	fastboot_subpmu_mntn {
		compatible = "fastboot,sub-pmic-mntn";
		#address-cells = <0x01>;
		#size-cells = <0x00>;
		pmic-mntn-data-width = <0x08>;
		pmic-mntn-record-reg-num = <0x0c>;
		pmic-mntn-record-regs = <0x3e0 0x3e1 0x3e2 0x3e3 0x3e4 0x3e5 0x3e6 0x3e7 0x3e8 0x3e9 0x3ea 0x3eb>;
		phandle = <0x1a5>;

		RECORD@3E0 {
			compatible = "hisilicon,sub-pmic-mntn-record-reg0x3E0";
			reg = <0x3e0>;
			pmic-mntn-inacceptable-event = <0x3f>;
			pmic-mntn-except-type = <0x00 0x00 0x00 0x00 0x00 0x40 0x00 0x00>;
			pmic-mntn-except-subtype = <0x00 0x00 0x00 0x00 0x00 0x01 0x00 0x00>;
			pmic-mntn-event-bit-name = "thsd_otmp125", "thsd_otmp140", "vsys_pwroff_abs", "vsys_pwroff_deb", "vsys_ov", "vsys_pwron_shutdown", "reserved", "reserved";
		};

		RECORD@3E1 {
			compatible = "hisilicon,sub-pmic-mntn-record-reg0x3E1";
			reg = <0x3e1>;
			pmic-mntn-inacceptable-event = <0xff>;
			pmic-mntn-except-type = <0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40>;
			pmic-mntn-except-subtype = <0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09>;
			pmic-mntn-event-bit-name = "ocp_b31", "ocp_b30", "ocp_b21", "ocp_b20", "ocp_b11", "ocp_b10", "ocp_b01", "ocp_b00";
		};

		RECORD@3E2 {
			compatible = "hisilicon,sub-pmic-mntn-record-reg0x3E2";
			reg = <0x3e2>;
			pmic-mntn-inacceptable-event = <0x7f>;
			pmic-mntn-except-type = <0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x00>;
			pmic-mntn-except-subtype = <0x0a 0x0b 0x0c 0x0d 0x0e 0x0f 0x10 0x00>;
			pmic-mntn-event-bit-name = "ocp_b13", "ocp_b12", "ocp_b8", "ocp_b7", "ocp_b6", "ocp_pmuh", "ocp_bb", "reserved";
		};

		RECORD@3E3 {
			compatible = "hisilicon,sub-pmic-mntn-record-reg0x3E3";
			reg = <0x3e3>;
			pmic-mntn-inacceptable-event = <0xff>;
			pmic-mntn-except-type = <0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40>;
			pmic-mntn-except-subtype = <0x11 0x12 0x13 0x14 0x15 0x16 0x17 0x18>;
			pmic-mntn-event-bit-name = "ocp_ldo54", "ocp_ldo53", "ocp_ldo52", "ocp_ldo51", "ocp_ldo50", "ocp_ldo34", "ocp_ldo9", "ocp_sw10";
		};

		RECORD@3E4 {
			compatible = "hisilicon,sub-pmic-mntn-record-reg0x3E4";
			reg = <0x3e4>;
			pmic-mntn-inacceptable-event = <0x0f>;
			pmic-mntn-except-type = <0x40 0x40 0x40 0x40 0x00 0x00 0x00 0x00>;
			pmic-mntn-except-subtype = <0x19 0x1a 0x1b 0x1c 0x00 0x00 0x00 0x00>;
			pmic-mntn-event-bit-name = "scp_b30", "scp_b20", "scp_b10", "scp_b00", "reserved", "reserved", "reserved", "reserved";
		};

		RECORD@3E5 {
			compatible = "hisilicon,sub-pmic-mntn-record-reg0x3E5";
			reg = <0x3e5>;
			pmic-mntn-inacceptable-event = <0x3f>;
			pmic-mntn-except-type = <0x40 0x40 0x40 0x40 0x40 0x40 0x00 0x00>;
			pmic-mntn-except-subtype = <0x1d 0x1e 0x1f 0x20 0x21 0x22 0x00 0x00>;
			pmic-mntn-event-bit-name = "scp_b13", "scp_b12", "scp_b8", "scp_b7", "scp_b6", "scp_bb", "reserved", "reserved";
		};

		RECORD@3E6 {
			compatible = "hisilicon,sub-pmic-mntn-record-reg0x3E6";
			reg = <0x3e6>;
			pmic-mntn-inacceptable-event = <0x7f>;
			pmic-mntn-except-type = <0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x00>;
			pmic-mntn-except-subtype = <0x23 0x24 0x25 0x26 0x27 0x28 0x29 0x00>;
			pmic-mntn-event-bit-name = "ovp_b30", "ovp_b20", "ovp_b10", "ovp_b00", "ovp_b12", "ovp_b8", "ovp_bb", "reserved";
		};

		RECORD@3E7 {
			compatible = "hisilicon,sub-pmic-mntn-record-reg0x3E7";
			reg = <0x3e7>;
			pmic-mntn-inacceptable-event = <0x1f>;
			pmic-mntn-except-type = <0x40 0x40 0x40 0x40 0x40 0x00 0x00 0x00>;
			pmic-mntn-except-subtype = <0x2a 0x2b 0x2c 0x2d 0x2e 0x00 0x00 0x00>;
			pmic-mntn-event-bit-name = "cur_b30", "cur_b20", "cur_b10", "cur_b00", "cur_b12", "reserved", "reserved", "reserved";
		};

		RECORD@3E8 {
			compatible = "hisilicon,sub-pmic-mntn-record-reg0x3E8";
			reg = <0x3e8>;
			pmic-mntn-inacceptable-event = <0x7f>;
			pmic-mntn-except-type = <0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x00>;
			pmic-mntn-except-subtype = <0x2f 0x30 0x31 0x32 0x33 0x34 0x35 0x00>;
			pmic-mntn-event-bit-name = "ramp_abn_b7", "ramp_abn_b6", "ramp_abn_b12", "ramp_abn_b30", "ram_abn_b20", "ramp_abn_b10", "ramp_abn_b00", "reserved";
		};

		RECORD@3E9 {
			compatible = "hisilicon,sub-pmic-mntn-record-reg0x3E9";
			reg = <0x3e9>;
			pmic-mntn-inacceptable-event = <0x00>;
			pmic-mntn-except-type = <0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00>;
			pmic-mntn-except-subtype = <0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00>;
			pmic-mntn-event-bit-name = "fault_m_n", "fault_s_n", "reserved", "reserved", "reserved", "reserved", "reserved", "reserved";
		};

		RECORD@3EA {
			compatible = "hisilicon,sub-pmic-mntn-record-reg0x3EA";
			reg = <0x3ea>;
			pmic-mntn-inacceptable-event = <0x67>;
			pmic-mntn-except-type = <0x40 0x40 0x40 0x00 0x00 0x10 0x10 0x00>;
			pmic-mntn-except-subtype = <0x36 0x37 0x38 0x00 0x00 0x00 0x00 0x00>;
			pmic-mntn-event-bit-name = "pmud_short_f", "pmuh_short_f", "vin_ldoh", "pmu_rc_clk_sel_r", "pmu_rc_clk_sel_r", "core_io18_vld_f", "core_io12_vld_f", "clk32_pmu_dis";
		};

		RECORD@3EB {
			compatible = "hisilicon,sub-pmic-mntn-record-reg0x3EB";
			reg = <0x3eb>;
			pmic-mntn-inacceptable-event = <0x7f>;
			pmic-mntn-except-type = <0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x00>;
			pmic-mntn-except-subtype = <0x39 0x3a 0x3b 0x3c 0x3d 0x3e 0x3f 0x00>;
			pmic-mntn-event-bit-name = "ramp_eco_b7", "ramp_eco_b6", "ramp_eco_b12", "ramp_eco_b30", "ram_eco_b20", "ramp_eco_b10", "ramp_eco_b00", "reserved";
		};
	};

	fastboot_coul {
		compatible = "fastboot,coul";
		coul_type = <0x0a>;
		status = "ok";
		phandle = <0x1a6>;
	};

	codec_bus {
		pm_runtime_support;
		pinctrl-1 = <0x2f5 0x35 0x398 0x37>;
		pinctrl-0 = <0x2f4 0x31 0x397 0x33>;
		pinctrl-names = "default", "idle";
		compatible = "audio-codec-bus";
		interrupts = <0x00 0x01 0x04>;
		interrupt-names = "irq_codec_bus";
		codec-bus-supply = <0x02>;
		status = "disabled";
		phandle = <0x1a7>;

		soundwire {
			status = "disabled";
			data_lane_num = <0x01>;
			compatible = "audio-soundwire";
		};

		slimbus {
			voice_up_port_version = <0x01>;
			audio_up_port_version = <0x01>;
			codec-type = "slimbus-da_combine_v5";
			soc_clk1_div_freq_disable;
			slimbus_dynamic_freq = "true";
			platform-type = "UDP";
			slimbusdata_cfg_offset = <0x8f8>;
			slimbusclk_cfg_offset = <0x870>;
			slimbusdata_offset = <0xf8>;
			slimbusclk_offset = <0x70>;
			slimbusdata_io_driver = <0xa3>;
			slimbusclk_io_driver = <0xa8>;
			compatible = "candance,slimbus";
			clk_asp_subsys = <0x88000>;
			status = "disabled";
			phandle = <0x1a8>;
		};
	};

	codecssi@0xe82b9000 {
	};

	ddr_devfreq@fffc0000 {
		#address-cells = <0x02>;
		#size-cells = <0x02>;
		compatible = "hisilicon,ddr_devfreq";
		reg = <0x00 0xfffc0000 0x00 0x10000>;
		pm_qos_data_reg = <0x10 0x3c>;
		clocks = <0x03 0x04>;
		pm_qos_class = "memory_tput";
		operating-points = <0x660d0 0x00 0xb6dc8 0x00 0x10d880 0x00 0x175c78 0x00 0x202678 0x00 0x29e690 0x00 0x30c848 0x00>;
		vote_method = "hardware";
		status = "ok";
	};

	panel_lcd_lg_S6E3HF4_5P5 {
	};

	panel_lcd_samsung_S6E3HF4_5P5 {
	};

	panel_lcd_lg_TD4322_6P0 {
	};

	panel_lcd_sharp_TD4322_6P0 {
	};

	panel_lcd_jdi_R63452_6P0 {
	};

	ddr_devfreq_up_threshold@fffc0000 {
		#address-cells = <0x02>;
		#size-cells = <0x02>;
		compatible = "hisilicon,ddr_devfreq";
		reg = <0x00 0xfffc0000 0x00 0x10000>;
		pm_qos_data_reg = <0x10 0x3c>;
		clocks = <0x05 0x04>;
		pm_qos_class = "memory_tput_up_threshold";
		operating-points = <0x660d0 0x00 0xb6dc8 0x00 0x10d880 0x00 0x175c78 0x00 0x202678 0x00 0x29e690 0x00 0x30c848 0x00>;
		vote_method = "hardware";
		status = "ok";
	};

	cpus {
		#address-cells = <0x02>;
		#size-cells = <0x00>;
		phandle = <0x1a9>;

		cpu@0 {
			device_type = "cpu";
			compatible = "arm,cortex-a53", "arm,armv8";
			reg = <0x00 0x00>;
			clocks = <0x06 0x00>;
			clock-names = "cpu-cluster.0";
			freq-vote-channel = "little-freq", "vote-src-1";
			enable-method = "psci";
			clock-frequency = <0x00>;
			clock-latency = <0x00>;
			cpu-idle-states = <0x07 0x08>;
			operating-points-v2 = <0x09>;
			mips-mem-monitors = <0x0a 0x0b>;
			capacity-dmips-mhz = <0x82>;
			numa-node-id = <0x01>;
			phandle = <0x18>;
		};

		cpu@100 {
			device_type = "cpu";
			compatible = "arm,cortex-a53", "arm,armv8";
			reg = <0x00 0x100>;
			clocks = <0x06 0x00>;
			clock-names = "cpu-cluster.0";
			freq-vote-channel = "little-freq", "vote-src-1";
			enable-method = "psci";
			clock-frequency = <0x00>;
			clock-latency = <0x00>;
			cpu-idle-states = <0x07 0x08>;
			operating-points-v2 = <0x09>;
			mips-mem-monitors = <0x0a 0x0b>;
			capacity-dmips-mhz = <0x82>;
			numa-node-id = <0x01>;
			phandle = <0x19>;
		};

		cpu@200 {
			device_type = "cpu";
			compatible = "arm,cortex-a53", "arm,armv8";
			reg = <0x00 0x200>;
			clocks = <0x06 0x00>;
			clock-names = "cpu-cluster.0";
			freq-vote-channel = "little-freq", "vote-src-1";
			enable-method = "psci";
			clock-frequency = <0x00>;
			clock-latency = <0x00>;
			cpu-idle-states = <0x07 0x08>;
			operating-points-v2 = <0x09>;
			mips-mem-monitors = <0x0a 0x0b>;
			capacity-dmips-mhz = <0x82>;
			numa-node-id = <0x01>;
			phandle = <0x1a>;
		};

		cpu@300 {
			device_type = "cpu";
			compatible = "arm,cortex-a53", "arm,armv8";
			reg = <0x00 0x300>;
			clocks = <0x06 0x00>;
			clock-names = "cpu-cluster.0";
			freq-vote-channel = "little-freq", "vote-src-1";
			enable-method = "psci";
			clock-frequency = <0x00>;
			clock-latency = <0x00>;
			cpu-idle-states = <0x07 0x08>;
			operating-points-v2 = <0x09>;
			mips-mem-monitors = <0x0a 0x0b>;
			capacity-dmips-mhz = <0x82>;
			numa-node-id = <0x01>;
			phandle = <0x1b>;
		};

		cpu@400 {
			device_type = "cpu";
			compatible = "arm,armv8";
			reg = <0x00 0x400>;
			clocks = <0x0c 0x00>;
			clock-names = "cpu-cluster.1";
			freq-vote-channel = "middle-freq", "vote-src-1";
			enable-method = "psci";
			clock-frequency = <0x00>;
			clock-latency = <0x00>;
			cpu-idle-states = <0x0d 0x0e>;
			operating-points-v2 = <0x0f>;
			mips-mem-monitors = <0x10 0x11>;
			capacity-dmips-mhz = <0x172>;
			numa-node-id = <0x01>;
			phandle = <0x1c>;
		};

		cpu@401 {
			device_type = "cpu";
			compatible = "arm,armv8";
			reg = <0x00 0x401>;
			clocks = <0x0c 0x00>;
			clock-names = "cpu-cluster.1";
			freq-vote-channel = "middle-freq", "vote-src-1";
			enable-method = "psci";
			clock-frequency = <0x00>;
			clock-latency = <0x00>;
			cpu-idle-states = <0x0d 0x0e>;
			operating-points-v2 = <0x0f>;
			mips-mem-monitors = <0x10 0x11>;
			capacity-dmips-mhz = <0x172>;
			numa-node-id = <0x01>;
			phandle = <0x1d>;
		};

		cpu@500 {
			device_type = "cpu";
			compatible = "arm,armv8";
			reg = <0x00 0x500>;
			clocks = <0x0c 0x00>;
			clock-names = "cpu-cluster.1";
			freq-vote-channel = "middle-freq", "vote-src-1";
			enable-method = "psci";
			clock-frequency = <0x00>;
			clock-latency = <0x00>;
			cpu-idle-states = <0x0d 0x0e>;
			operating-points-v2 = <0x0f>;
			mips-mem-monitors = <0x10 0x11>;
			capacity-dmips-mhz = <0x172>;
			numa-node-id = <0x01>;
			phandle = <0x1e>;
		};

		cpu@501 {
			device_type = "cpu";
			compatible = "arm,armv8";
			reg = <0x00 0x501>;
			clocks = <0x0c 0x00>;
			clock-names = "cpu-cluster.1";
			freq-vote-channel = "middle-freq", "vote-src-1";
			enable-method = "psci";
			clock-frequency = <0x00>;
			clock-latency = <0x00>;
			cpu-idle-states = <0x0d 0x0e>;
			operating-points-v2 = <0x0f>;
			mips-mem-monitors = <0x10 0x11>;
			capacity-dmips-mhz = <0x172>;
			numa-node-id = <0x01>;
			phandle = <0x1f>;
		};

		cpu@600 {
			device_type = "cpu";
			compatible = "arm,armv8";
			reg = <0x00 0x600>;
			clocks = <0x0c 0x00>;
			clock-names = "cpu-cluster.1";
			freq-vote-channel = "middle-freq", "vote-src-1";
			enable-method = "psci";
			clock-frequency = <0x00>;
			clock-latency = <0x00>;
			cpu-idle-states = <0x0d 0x0e>;
			operating-points-v2 = <0x0f>;
			mips-mem-monitors = <0x10 0x11>;
			capacity-dmips-mhz = <0x172>;
			numa-node-id = <0x01>;
			phandle = <0x20>;
		};

		cpu@601 {
			device_type = "cpu";
			compatible = "arm,armv8";
			reg = <0x00 0x601>;
			clocks = <0x0c 0x00>;
			clock-names = "cpu-cluster.1";
			freq-vote-channel = "middle-freq", "vote-src-1";
			enable-method = "psci";
			clock-frequency = <0x00>;
			clock-latency = <0x00>;
			cpu-idle-states = <0x0d 0x0e>;
			operating-points-v2 = <0x0f>;
			mips-mem-monitors = <0x10 0x11>;
			capacity-dmips-mhz = <0x172>;
			numa-node-id = <0x01>;
			phandle = <0x21>;
		};

		cpu@700 {
			device_type = "cpu";
			compatible = "arm,armv8";
			reg = <0x00 0x700>;
			clocks = <0x0c 0x00>;
			clock-names = "cpu-cluster.1";
			freq-vote-channel = "big-freq", "vote-src-1";
			enable-method = "psci";
			clock-frequency = <0x00>;
			clock-latency = <0x00>;
			cpu-idle-states = <0x12 0x13>;
			operating-points-v2 = <0x14>;
			mips-mem-monitors = <0x15 0x16>;
			capacity-dmips-mhz = <0x183>;
			numa-node-id = <0x01>;
			hwp-attached-cluster = <0x17>;
			phandle = <0x22>;
		};

		cpu@701 {
			device_type = "cpu";
			compatible = "arm,armv8";
			reg = <0x00 0x701>;
			clocks = <0x0c 0x00>;
			clock-names = "cpu-cluster.1";
			freq-vote-channel = "big-freq", "vote-src-1";
			enable-method = "psci";
			clock-frequency = <0x00>;
			clock-latency = <0x00>;
			cpu-idle-states = <0x12 0x13>;
			operating-points-v2 = <0x14>;
			mips-mem-monitors = <0x15 0x16>;
			capacity-dmips-mhz = <0x183>;
			numa-node-id = <0x01>;
			hwp-attached-cluster = <0x17>;
			phandle = <0x23>;
		};

		opp_table0 {
			compatible = "operating-points-v2";
			opp-shared;
			phandle = <0x09>;

			opp0 {
				opp-supported-hw = <0xff>;
				opp-hz = <0x00 0x18ea2c80>;
				opp-microvolt = <0x86470>;
				opp-microamp = <0x32c8>;
				opp-microwatt = <0x8ca0>;
				clock-latency-ns = <0x1e8480>;
			};

			opp1 {
				opp-supported-hw = <0xff>;
				opp-hz = <0x00 0x1d34ce80>;
				opp-microvolt = <0x86470>;
				opp-microamp = <0x3e80>;
				opp-microwatt = <0xa7f8>;
				clock-latency-ns = <0x1e8480>;
			};

			opp2 {
				opp-supported-hw = <0xff>;
				opp-hz = <0x00 0x20c85580>;
				opp-microvolt = <0x86470>;
				opp-microamp = <0x4268>;
				opp-microwatt = <0xbf68>;
				clock-latency-ns = <0x1e8480>;
			};

			opp3 {
				opp-supported-hw = <0xff>;
				opp-hz = <0x00 0x27d0df00>;
				opp-microvolt = <0x927c0>;
				opp-microamp = <0x4e20>;
				opp-microwatt = <0xee48>;
				clock-latency-ns = <0x1e8480>;
			};

			opp4 {
				opp-supported-hw = <0xff>;
				opp-hz = <0x00 0x2d2e2980>;
				opp-microvolt = <0x927c0>;
				opp-microamp = <0x5dc0>;
				opp-microwatt = <0x11558>;
				clock-latency-ns = <0x1e8480>;
				opp-suspend;
			};

			opp5 {
				opp-supported-hw = <0xff>;
				opp-hz = <0x00 0x337f9800>;
				opp-microvolt = <0xaae60>;
				opp-microamp = <0x6d60>;
				opp-microwatt = <0x14820>;
				clock-latency-ns = <0x1e8480>;
			};

			opp6 {
				opp-supported-hw = <0xff>;
				opp-hz = <0x00 0x3cad7280>;
				opp-microvolt = <0xaae60>;
				opp-microamp = <0x8ca0>;
				opp-microwatt = <0x1a5e0>;
				clock-latency-ns = <0x1e8480>;
			};

			opp7 {
				opp-supported-hw = <0xff>;
				opp-hz = <0x00 0x446d1700>;
				opp-microvolt = <0xaae60>;
				opp-microamp = <0xa7f8>;
				opp-microwatt = <0x1fbd0>;
				clock-latency-ns = <0x1e8480>;
			};

			opp8 {
				opp-supported-hw = <0x7f>;
				opp-hz = <0x00 0x4cb60fc0>;
				opp-microvolt = "", "\f5";
				opp-microamp = <0xbf68>;
				opp-microwatt = <0x251c0>;
				clock-latency-ns = <0x1e8480>;
			};

			opp9 {
				opp-supported-hw = <0x7f>;
				opp-hz = <0x00 0x553c1180>;
				opp-microvolt = "", "\f5";
				opp-microamp = <0xee48>;
				opp-microwatt = <0x2d2a8>;
				clock-latency-ns = <0x1e8480>;
			};

			opp10 {
				opp-suspend;
				opp-supported-hw = <0x7f>;
				opp-hz = <0x00 0x5b31f280>;
				opp-microvolt = <0xcf850>;
				opp-microamp = <0x11d28>;
				opp-microwatt = <0x33c20>;
				clock-latency-ns = <0x1e8480>;
			};
		};

		opp_table1 {
			compatible = "operating-points-v2";
			opp-shared;
			phandle = <0x0f>;

			opp0 {
				opp-supported-hw = <0xff>;
				opp-hz = <0x00 0x18ea2c80>;
				opp-microvolt = <0x86470>;
				opp-microamp = <0x5208>;
				opp-microwatt = <0x1f018>;
				clock-latency-ns = <0x1e8480>;
			};

			opp1 {
				opp-supported-hw = <0xff>;
				opp-hz = <0x00 0x1ad27480>;
				opp-microvolt = <0x86470>;
				opp-microamp = <0x55f0>;
				opp-microwatt = <0x21728>;
				clock-latency-ns = <0x1e8480>;
			};

			opp2 {
				opp-supported-hw = <0xff>;
				opp-hz = <0x00 0x22551000>;
				opp-microvolt = <0x927c0>;
				opp-microamp = <0x7148>;
				opp-microwatt = <0x2af80>;
				clock-latency-ns = <0x1e8480>;
			};

			opp3 {
				opp-supported-hw = <0xff>;
				opp-hz = <0x00 0x293f1500>;
				opp-microvolt = <0x927c0>;
				opp-microamp = <0x8ca0>;
				opp-microwatt = <0x33c20>;
				clock-latency-ns = <0x1e8480>;
			};

			opp4 {
				opp-supported-hw = <0xff>;
				opp-hz = <0x00 0x2cb41780>;
				opp-microvolt = <0x927c0>;
				opp-microamp = <0xa028>;
				opp-microwatt = <0x38270>;
				clock-latency-ns = <0x1e8480>;
				opp-suspend;
			};

			opp5 {
				opp-supported-hw = <0xff>;
				opp-hz = <0x00 0x33cbe340>;
				opp-microvolt = <0xaae60>;
				opp-microamp = <0xc350>;
				opp-microwatt = <0x412f8>;
				clock-latency-ns = <0x1e8480>;
			};

			opp6 {
				opp-supported-hw = <0xff>;
				opp-hz = <0x00 0x3b8b87c0>;
				opp-microvolt = <0xaae60>;
				opp-microamp = <0xea60>;
				opp-microwatt = <0x4af38>;
				clock-latency-ns = <0x1e8480>;
			};

			opp7 {
				opp-supported-hw = <0xff>;
				opp-hz = <0x00 0x41cdb400>;
				opp-microvolt = <0xaae60>;
				opp-microamp = <0x11d28>;
				opp-microwatt = <0x53020>;
				clock-latency-ns = <0x1e8480>;
			};

			opp8 {
				opp-supported-hw = <0xff>;
				opp-hz = <0x00 0x47c39500>;
				opp-microvolt = <0xaae60>;
				opp-microamp = <0x14820>;
				opp-microwatt = <0x5b108>;
				clock-latency-ns = <0x1e8480>;
			};

			opp9 {
				opp-supported-hw = <0xff>;
				opp-hz = <0x00 0x4ef9e540>;
				opp-microvolt = "", "\f5";
				opp-microamp = <0x186a0>;
				opp-microwatt = <0x68bc8>;
				clock-latency-ns = <0x1e8480>;
			};

			opp10 {
				opp-supported-hw = <0xff>;
				opp-hz = <0x00 0x55d4a800>;
				opp-microvolt = "", "\f5";
				opp-microamp = <0x1d8a8>;
				opp-microwatt = <0x77628>;
				clock-latency-ns = <0x1e8480>;
			};

			opp11 {
				opp-supported-hw = <0xff>;
				opp-hz = <0x00 0x5d944c80>;
				opp-microvolt = "", "\f5";
				opp-microamp = <0x249f0>;
				opp-microwatt = <0x8a2f0>;
				clock-latency-ns = <0x1e8480>;
			};

			opp12 {
				opp-supported-hw = <0x7f>;
				opp-hz = <0x00 0x62778500>;
				opp-microvolt = <0xdbba0>;
				opp-microamp = <0x29040>;
				opp-microwatt = <0x9c018>;
				clock-latency-ns = <0x1e8480>;
			};

			opp13 {
				opp-supported-hw = <0x7f>;
				opp-hz = <0x00 0x68305d00>;
				opp-microvolt = <0xdbba0>;
				opp-microamp = <0x30188>;
				opp-microwatt = <0xadd40>;
				clock-latency-ns = <0x1e8480>;
			};

			opp14 {
				opp-supported-hw = <0x7f>;
				opp-hz = <0x00 0x6e44c280>;
				opp-microvolt = <0xdbba0>;
				opp-microamp = <0x42a68>;
				opp-microwatt = <0xc2178>;
				clock-latency-ns = <0x1e8480>;
			};

			opp15 {
				opp-supported-hw = <0x7f>;
				opp-hz = <0x00 0x73097680>;
				opp-microvolt = <0xf4240>;
				opp-microamp = <0x412f8>;
				opp-microwatt = <0xd5de0>;
				clock-latency-ns = <0x1e8480>;
			};

			opp16 {
				opp-supported-hw = <0x7f>;
				opp-hz = <0x00 0x7866c100>;
				opp-microvolt = <0xf4240>;
				opp-microamp = <0x4ca90>;
				opp-microwatt = <0xe9660>;
				clock-latency-ns = <0x1e8480>;
			};

			opp17 {
				opp-supported-hw = <0x7f>;
				opp-hz = <0x00 0x80266580>;
				opp-microvolt = <0x10c8e0>;
				opp-microamp = <0x5b108>;
				opp-microwatt = <0x1174c0>;
				clock-latency-ns = <0x1e8480>;
			};
		};

		opp_table2 {
			compatible = "operating-points-v2";
			opp-shared;
			phandle = <0x14>;

			opp0 {
				opp-supported-hw = <0xff>;
				opp-hz = <0x00 0x49d9a3c0>;
				opp-microvolt = <0xaae60>;
				opp-microamp = <0x14820>;
				opp-microwatt = <0x7a508>;
				clock-latency-ns = <0x1e8480>;
				opp-suspend;
			};

			opp1 {
				opp-supported-hw = <0xff>;
				opp-hz = <0x00 0x514cfd00>;
				opp-microvolt = "", "\f5";
				opp-microamp = <0x18a88>;
				opp-microwatt = <0x8c230>;
				clock-latency-ns = <0x1e8480>;
			};

			opp2 {
				opp-supported-hw = <0xff>;
				opp-hz = <0x00 0x5827bfc0>;
				opp-microvolt = "", "\f5";
				opp-microamp = <0x1c908>;
				opp-microwatt = <0x9e340>;
				clock-latency-ns = <0x1e8480>;
			};

			opp3 {
				opp-supported-hw = <0xff>;
				opp-hz = <0x00 0x5f028280>;
				opp-microvolt = "", "\f5";
				opp-microamp = <0x20b70>;
				opp-microwatt = <0xb3ee8>;
				clock-latency-ns = <0x1e8480>;
			};

			opp4 {
				opp-supported-hw = <0xff>;
				opp-hz = <0x00 0x6516e800>;
				opp-microvolt = "", "\f5";
				opp-microamp = <0x25990>;
				opp-microwatt = <0xc5ff8>;
				clock-latency-ns = <0x1e8480>;
			};

			opp5 {
				opp-supported-hw = <0x7f>;
				opp-hz = <0x00 0x6de93500>;
				opp-microvolt = <0xdbba0>;
				opp-microamp = <0x2c308>;
				opp-microwatt = <0xe30d0>;
				clock-latency-ns = <0x1e8480>;
			};

			opp6 {
				opp-supported-hw = <0x7f>;
				opp-hz = <0x00 0x76bb8200>;
				opp-microvolt = <0xdbba0>;
				opp-microamp = <0x343f0>;
				opp-microwatt = <0x10b170>;
				clock-latency-ns = <0x1e8480>;
			};

			opp7 {
				opp-supported-hw = <0x7f>;
				opp-hz = <0x00 0x7e5ca200>;
				opp-microvolt = <0xdbba0>;
				opp-microamp = <0x3d090>;
				opp-microwatt = <0x12e3f0>;
				clock-latency-ns = <0x1e8480>;
			};

			opp8 {
				opp-supported-hw = <0x7f>;
				opp-hz = <0x00 0x8555e940>;
				opp-microvolt = <0xf4240>;
				opp-microamp = <0x45560>;
				opp-microwatt = <0x157048>;
				clock-latency-ns = <0x1e8480>;
			};

			opp9 {
				opp-supported-hw = <0x7f>;
				opp-hz = <0x00 0x8c122780>;
				opp-microvolt = <0xdbba0>;
				opp-microamp = <0x52850>;
				opp-microwatt = <0x1871d0>;
				clock-latency-ns = <0x1e8480>;
			};

			opp10 {
				opp-supported-hw = <0x3b>;
				opp-hz = <0x00 0x943c9bc0>;
				opp-microvolt = <0xf4240>;
				opp-microamp = <0x631f0>;
				opp-microwatt = <0x1d1550>;
				clock-latency-ns = <0x1e8480>;
			};

			opp11 {
				opp-supported-hw = <0x01>;
				opp-hz = <0x00 0x9c2a0700>;
				opp-microvolt = <0x10c8e0>;
				opp-microamp = <0x79180>;
				opp-microwatt = <0x22a330>;
				clock-latency-ns = <0x1e8480>;
			};
		};

		idle-states {
			entry-method = "arm,psci";

			cpu-nap-0 {
				compatible = "arm,idle-state";
				arm,psci-suspend-param = <0x00>;
				entry-latency-us = <0x28>;
				exit-latency-us = <0x46>;
				min-residency-us = <0xbb8>;
				local-timer-stop;
				phandle = <0x1aa>;
			};

			cpu-sleep-0 {
				compatible = "arm,idle-state";
				arm,psci-suspend-param = <0x10000>;
				entry-latency-us = <0x64>;
				exit-latency-us = <0x64>;
				min-residency-us = <0xdac>;
				lp-exit-latency-us = <0xc8>;
				lp-residency-us = <0xdac>;
				local-timer-stop;
				phandle = <0x07>;
			};

			cpu-sleep-1 {
				compatible = "arm,idle-state";
				arm,psci-suspend-param = <0x10000>;
				entry-latency-us = <0x8c>;
				exit-latency-us = <0xaa>;
				min-residency-us = <0x2710>;
				lp-exit-latency-us = <0x136>;
				lp-residency-us = <0x2710>;
				local-timer-stop;
				phandle = <0x0d>;
			};

			cpu-sleep-2 {
				compatible = "arm,idle-state";
				arm,psci-suspend-param = <0x10000>;
				entry-latency-us = <0x32>;
				exit-latency-us = <0x50>;
				min-residency-us = <0x2710>;
				lp-exit-latency-us = <0x82>;
				lp-residency-us = <0x2710>;
				local-timer-stop;
				phandle = <0x12>;
			};

			cluster-sleep-0 {
				compatible = "arm,idle-state";
				arm,psci-suspend-param = <0x1010000>;
				entry-latency-us = <0x8c>;
				exit-latency-us = <0x6e>;
				min-residency-us = <0xdac>;
				lp-exit-latency-us = <0xfa>;
				lp-residency-us = <0xdac>;
				local-timer-stop;
				phandle = <0x08>;
			};

			cluster-sleep-1 {
				compatible = "arm,idle-state";
				arm,psci-suspend-param = <0x1010000>;
				entry-latency-us = <0x64>;
				exit-latency-us = <0x1f4>;
				min-residency-us = <0xc350>;
				lp-exit-latency-us = <0x258>;
				lp-residency-us = <0xc350>;
				local-timer-stop;
				phandle = <0x0e>;
			};

			cluster-sleep-2 {
				compatible = "arm,idle-state";
				arm,psci-suspend-param = <0x1010000>;
				entry-latency-us = <0x64>;
				exit-latency-us = <0x64>;
				min-residency-us = <0x2710>;
				lp-exit-latency-us = <0xc8>;
				lp-residency-us = <0x2710>;
				local-timer-stop;
				phandle = <0x13>;
			};
		};

		cpu-map {

			cluster0 {
				#cooling-cells = <0x03>;
				phandle = <0xed>;

				core0 {
					cpu = <0x18>;
				};

				core1 {
					cpu = <0x19>;
				};

				core2 {
					cpu = <0x1a>;
				};

				core3 {
					cpu = <0x1b>;
				};
			};

			cluster1 {
				#cooling-cells = <0x03>;
				phandle = <0xee>;

				core0 {

					thread0 {
						cpu = <0x1c>;
					};

					thread1 {
						cpu = <0x1d>;
					};
				};

				core1 {

					thread0 {
						cpu = <0x1e>;
					};

					thread1 {
						cpu = <0x1f>;
					};
				};

				core2 {

					thread0 {
						cpu = <0x20>;
					};

					thread1 {
						cpu = <0x21>;
					};
				};
			};

			cluster2 {
				#cooling-cells = <0x03>;
				phandle = <0xef>;

				core0 {

					thread0 {
						cpu = <0x22>;
					};

					thread1 {
						cpu = <0x23>;
					};
				};
			};
		};
	};

	iomcu_subsys_config {
	};

	pinmux@ff801000 {
		compatible = "pinctrl-v500";
		reg = <0x00 0xff801000 0x00 0x708>;
		#gpio-range-cells = <0x03>;
		pinctrl-v500,register-width = <0x20>;
		pinctrl-v500,function-mask = <0x07>;
		#pinctrl-cells = <0x01>;
		pinctrl-v500,gpio-range = <0x24 0x01 0x2e 0x00>;
		phandle = <0xbf>;

		gpio001_pmx_func {
			pinctrl-v500,pad = <0x04 0x00>;
			pinctrl-v500,mux = <0xff800004 0x00>;
			phandle = <0x1ab>;
		};

		gpio001_pmx_idle {
			pinctrl-v500,pad = <0x04 0x00>;
			pinctrl-v500,mux = <0xff800004 0x00>;
			phandle = <0x1ac>;
		};

		gpio002_pmx_func {
			pinctrl-v500,pad = <0x08 0x00>;
			pinctrl-v500,mux = <0xff800008 0x00>;
			phandle = <0x1ad>;
		};

		gpio002_pmx_idle {
			pinctrl-v500,pad = <0x08 0x00>;
			pinctrl-v500,mux = <0xff800008 0x00>;
			phandle = <0x1ae>;
		};

		gpio003_pmx_func {
			pinctrl-v500,pad = <0x0c 0x00>;
			pinctrl-v500,mux = <0xff80000c 0x00>;
			phandle = <0x1af>;
		};

		gpio003_pmx_idle {
			pinctrl-v500,pad = <0x0c 0x00>;
			pinctrl-v500,mux = <0xff80000c 0x00>;
			phandle = <0x1b0>;
		};

		gpio004_pmx_func {
			pinctrl-v500,pad = <0x10 0x01>;
			pinctrl-v500,mux = <0xff800010 0x01>;
			phandle = <0x1b1>;
		};

		gpio004_pmx_idle {
			pinctrl-v500,pad = <0x10 0x01>;
			pinctrl-v500,mux = <0xff800010 0x01>;
			phandle = <0x1b2>;
		};

		gpio005_pmx_func {
			pinctrl-v500,pad = <0x14 0x00>;
			pinctrl-v500,mux = <0xff800014 0x00>;
			phandle = <0x1b3>;
		};

		gpio005_pmx_idle {
			pinctrl-v500,pad = <0x14 0x00>;
			pinctrl-v500,mux = <0xff800014 0x00>;
			phandle = <0x1b4>;
		};

		gpio006_pmx_func {
			pinctrl-v500,pad = <0x18 0x00>;
			pinctrl-v500,mux = <0xff800018 0x00>;
			phandle = <0x1b5>;
		};

		gpio006_pmx_idle {
			pinctrl-v500,pad = <0x18 0x00>;
			pinctrl-v500,mux = <0xff800018 0x00>;
			phandle = <0x1b6>;
		};

		gpio007_pmx_func {
			phandle = <0x1b7>;
		};

		gpio007_pmx_idle {
			phandle = <0x1b8>;
		};

		gpio008_pmx_func {
			pinctrl-v500,pad = <0x20 0x01>;
			pinctrl-v500,mux = <0xff800020 0x01>;
			phandle = <0x1b9>;
		};

		gpio008_pmx_idle {
			pinctrl-v500,pad = <0x20 0x01>;
			pinctrl-v500,mux = <0xff800020 0x01>;
			phandle = <0x1ba>;
		};

		gpio009_pmx_func {
			pinctrl-v500,pad = <0x24 0x01>;
			pinctrl-v500,mux = <0xff800024 0x01>;
			phandle = <0x1bb>;
		};

		gpio009_pmx_idle {
			pinctrl-v500,pad = <0x24 0x01>;
			pinctrl-v500,mux = <0xff800024 0x01>;
			phandle = <0x1bc>;
		};

		gpio010_pmx_func {
			pinctrl-v500,pad = <0x28 0x01>;
			pinctrl-v500,mux = <0xff800028 0x01>;
			phandle = <0x1bd>;
		};

		gpio010_pmx_idle {
			pinctrl-v500,pad = <0x28 0x01>;
			pinctrl-v500,mux = <0xff800028 0x01>;
			phandle = <0x1be>;
		};

		gpio011_pmx_func {
			pinctrl-v500,pad = <0x2c 0x01>;
			pinctrl-v500,mux = <0xff80002c 0x01>;
			phandle = <0x1bf>;
		};

		gpio011_pmx_idle {
			pinctrl-v500,pad = <0x2c 0x01>;
			pinctrl-v500,mux = <0xff80002c 0x01>;
			phandle = <0x1c0>;
		};

		gpio012_pmx_func {
			pinctrl-v500,pad = <0x30 0x01>;
			pinctrl-v500,mux = <0xff800030 0x01>;
			phandle = <0x27>;
		};

		gpio012_pmx_idle {
			pinctrl-v500,pad = <0x30 0x00>;
			pinctrl-v500,mux = <0xff800030 0x00>;
			phandle = <0x2b>;
		};

		gpio013_pmx_func {
			pinctrl-v500,pad = <0x34 0x01>;
			pinctrl-v500,mux = <0xff800034 0x01>;
			phandle = <0x28>;
		};

		gpio013_pmx_idle {
			pinctrl-v500,pad = <0x34 0x00>;
			pinctrl-v500,mux = <0xff800034 0x00>;
			phandle = <0x2c>;
		};

		gpio014_pmx_func {
			pinctrl-v500,pad = <0x38 0x00>;
			pinctrl-v500,mux = <0xff800038 0x00>;
			phandle = <0x1c1>;
		};

		gpio014_pmx_idle {
			pinctrl-v500,pad = <0x38 0x00>;
			pinctrl-v500,mux = <0xff800038 0x00>;
			phandle = <0x1c2>;
		};

		gpio015_pmx_func {
			pinctrl-v500,pad = <0x3c 0x01>;
			pinctrl-v500,mux = <0xff80003c 0x01>;
			phandle = <0x1c3>;
		};

		gpio015_pmx_idle {
			pinctrl-v500,pad = <0x3c 0x00>;
			pinctrl-v500,mux = <0xff80003c 0x00>;
			phandle = <0x1c4>;
		};

		gpio016_pmx_func {
			pinctrl-v500,pad = <0x40 0x01>;
			pinctrl-v500,mux = <0xff800040 0x01>;
			phandle = <0x1c5>;
		};

		gpio016_pmx_idle {
			pinctrl-v500,pad = <0x40 0x00>;
			pinctrl-v500,mux = <0xff800040 0x00>;
			phandle = <0x1c6>;
		};

		gpio017_pmx_func {
			pinctrl-v500,pad = <0x44 0x01>;
			pinctrl-v500,mux = <0xff800044 0x01>;
			phandle = <0x1c7>;
		};

		gpio017_pmx_idle {
			pinctrl-v500,pad = <0x44 0x00>;
			pinctrl-v500,mux = <0xff800044 0x00>;
			phandle = <0x1c8>;
		};

		gpio018_pmx_func {
			pinctrl-v500,pad = <0x700 0x01>;
			pinctrl-v500,mux = <0xff800700 0x01>;
			phandle = <0x3b>;
		};

		gpio018_pmx_idle {
			pinctrl-v500,pad = <0x700 0x00>;
			pinctrl-v500,mux = <0xff800700 0x00>;
			phandle = <0x3f>;
		};

		gpio019_pmx_func {
			pinctrl-v500,pad = <0x704 0x01>;
			pinctrl-v500,mux = <0xff800704 0x01>;
			phandle = <0x3c>;
		};

		gpio019_pmx_idle {
			pinctrl-v500,pad = <0x704 0x00>;
			pinctrl-v500,mux = <0xff800704 0x00>;
			phandle = <0x40>;
		};

		gpio026_pmx_func {
			pinctrl-v500,pad = <0x60 0x00>;
			pinctrl-v500,mux = <0xff800060 0x00>;
			phandle = <0x1c9>;
		};

		gpio026_pmx_idle {
			pinctrl-v500,pad = <0x60 0x00>;
			pinctrl-v500,mux = <0xff800060 0x00>;
			phandle = <0x1ca>;
		};

		gpio033_pmx_func {
			pinctrl-v500,pad = <0x7c 0x00>;
			pinctrl-v500,mux = <0xff80007c 0x00>;
			phandle = <0x1cb>;
		};

		gpio033_pmx_idle {
			pinctrl-v500,pad = <0x7c 0x00>;
			pinctrl-v500,mux = <0xff80007c 0x00>;
			phandle = <0x1cc>;
		};

		gpio034_pmx_func {
			pinctrl-v500,pad = <0x80 0x00>;
			pinctrl-v500,mux = <0xff800080 0x00>;
			phandle = <0x1cd>;
		};

		gpio034_pmx_idle {
			pinctrl-v500,pad = <0x80 0x00>;
			pinctrl-v500,mux = <0xff800080 0x00>;
			phandle = <0x1ce>;
		};

		gpio037_pmx_func {
			pinctrl-v500,pad = <0x8c 0x00>;
			pinctrl-v500,mux = <0xff80008c 0x00>;
			phandle = <0x1cf>;
		};

		gpio037_pmx_idle {
			pinctrl-v500,pad = <0x8c 0x00>;
			pinctrl-v500,mux = <0xff80008c 0x00>;
			phandle = <0x1d0>;
		};

		gpio038_pmx_func {
			pinctrl-v500,pad = <0x90 0x00>;
			pinctrl-v500,mux = <0xff800090 0x00>;
			phandle = <0x1d1>;
		};

		gpio038_pmx_idle {
			pinctrl-v500,pad = <0x90 0x00>;
			pinctrl-v500,mux = <0xff800090 0x00>;
			phandle = <0x1d2>;
		};

		gpio039_pmx_func {
			pinctrl-v500,pad = <0x94 0x00>;
			pinctrl-v500,mux = <0xff800094 0x00>;
			phandle = <0x1d3>;
		};

		gpio039_pmx_idle {
			pinctrl-v500,pad = <0x94 0x00>;
			pinctrl-v500,mux = <0xff800094 0x00>;
			phandle = <0x1d4>;
		};

		gpio040_pmx_func {
			pinctrl-v500,pad = <0x98 0x00>;
			pinctrl-v500,mux = <0xff800098 0x00>;
			phandle = <0x1d5>;
		};

		gpio040_pmx_idle {
			pinctrl-v500,pad = <0x98 0x00>;
			pinctrl-v500,mux = <0xff800098 0x00>;
			phandle = <0x1d6>;
		};

		gpio041_pmx_func {
			pinctrl-v500,pad = <0x9c 0x01>;
			pinctrl-v500,mux = <0xff80009c 0x01>;
			phandle = <0x79>;
		};

		gpio041_pmx_idle {
			pinctrl-v500,pad = <0x9c 0x01>;
			pinctrl-v500,mux = <0xff80009c 0x01>;
			phandle = <0x81>;
		};

		gpio042_pmx_func {
			pinctrl-v500,pad = <0xa0 0x01>;
			pinctrl-v500,mux = <0xff8000a0 0x01>;
			phandle = <0x7a>;
		};

		gpio042_pmx_idle {
			pinctrl-v500,pad = <0xa0 0x01>;
			pinctrl-v500,mux = <0xff8000a0 0x01>;
			phandle = <0x82>;
		};

		gpio043_pmx_func {
			pinctrl-v500,pad = <0xa4 0x01>;
			pinctrl-v500,mux = <0xff8000a4 0x01>;
			phandle = <0x7b>;
		};

		gpio043_pmx_idle {
			pinctrl-v500,pad = <0xa4 0x01>;
			pinctrl-v500,mux = <0xff8000a4 0x01>;
			phandle = <0x83>;
		};

		gpio044_pmx_func {
			pinctrl-v500,pad = <0xa8 0x01>;
			pinctrl-v500,mux = <0xff8000a8 0x01>;
			phandle = <0x7c>;
		};

		gpio044_pmx_idle {
			pinctrl-v500,pad = <0xa8 0x01>;
			pinctrl-v500,mux = <0xff8000a8 0x01>;
			phandle = <0x84>;
		};

		gpio046_pmx_func {
			pinctrl-v500,pad = <0xb0 0x00>;
			pinctrl-v500,mux = <0xff8000b0 0x00>;
			phandle = <0x1d7>;
		};

		gpio046_pmx_idle {
			pinctrl-v500,pad = <0xb0 0x00>;
			pinctrl-v500,mux = <0xff8000b0 0x00>;
			phandle = <0x1d8>;
		};

		gpio047_pmx_func {
			pinctrl-v500,pad = <0xb4 0x00>;
			pinctrl-v500,mux = <0xff8000b4 0x00>;
			phandle = <0x1d9>;
		};

		gpio047_pmx_idle {
			pinctrl-v500,pad = <0xb4 0x00>;
			pinctrl-v500,mux = <0xff8000b4 0x00>;
			phandle = <0x1da>;
		};

		gpio048_pmx_func {
			pinctrl-v500,pad = <0xb8 0x01>;
			pinctrl-v500,mux = <0xff8000b8 0x01>;
			phandle = <0x1db>;
		};

		gpio048_pmx_idle {
			pinctrl-v500,pad = <0xb8 0x01>;
			pinctrl-v500,mux = <0xff8000b8 0x01>;
			phandle = <0x1dc>;
		};

		gpio-range {
			#pinctrl-v500,gpio-range-cells = <0x03>;
			phandle = <0x24>;
		};
	};

	pinmux@ff801800 {
		compatible = "pinconf-v500";
		reg = <0x00 0xff801800 0x00 0x708>;
		pinctrl-v500,register-width = <0x20>;
		#pinctrl-cells = <0x01>;
		phandle = <0x1dd>;

		gpio001_cfg_func {
			pinctrl-v500,pad = <0x04 0x00>;
			pinctrl-v500,bias-pulldown = <0x02 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x1de>;
		};

		gpio001_cfg_idle {
			pinctrl-v500,pad = <0x04 0x00>;
			pinctrl-v500,bias-pulldown = <0x02 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x1df>;
		};

		gpio002_cfg_func {
			pinctrl-v500,pad = <0x08 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x1e0>;
		};

		gpio002_cfg_idle {
			pinctrl-v500,pad = <0x08 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x1e1>;
		};

		gpio003_cfg_func {
			pinctrl-v500,pad = <0x0c 0x00>;
			pinctrl-v500,bias-pulldown = <0x02 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x1e2>;
		};

		gpio003_cfg_idle {
			pinctrl-v500,pad = <0x0c 0x00>;
			pinctrl-v500,bias-pulldown = <0x02 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x1e3>;
		};

		gpio004_cfg_func {
			pinctrl-v500,pad = <0x10 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x1e4>;
		};

		gpio004_cfg_idle {
			pinctrl-v500,pad = <0x10 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x1e5>;
		};

		gpio005_cfg_func {
			pinctrl-v500,pad = <0x14 0x00>;
			pinctrl-v500,bias-pulldown = <0x02 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x1e6>;
		};

		gpio005_cfg_idle {
			pinctrl-v500,pad = <0x14 0x00>;
			pinctrl-v500,bias-pulldown = <0x02 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x1e7>;
		};

		gpio006_cfg_func {
			pinctrl-v500,pad = <0x18 0x00>;
			pinctrl-v500,bias-pulldown = <0x02 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x1e8>;
		};

		gpio006_cfg_idle {
			pinctrl-v500,pad = <0x18 0x00>;
			pinctrl-v500,bias-pulldown = <0x02 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x1e9>;
		};

		gpio007_cfg_func {
			pinctrl-v500,pad = <0x1c 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x01 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x1ea>;
		};

		gpio007_cfg_idle {
			pinctrl-v500,pad = <0x1c 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x01 0x01 0x00 0x01>;
			phandle = <0x1eb>;
		};

		gpio008_cfg_func {
			pinctrl-v500,pad = <0x20 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x1ec>;
		};

		gpio008_cfg_idle {
			pinctrl-v500,pad = <0x20 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x1ed>;
		};

		gpio009_cfg_func {
			pinctrl-v500,pad = <0x24 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x10 0x70>;
			phandle = <0x1ee>;
		};

		gpio009_cfg_idle {
			pinctrl-v500,pad = <0x24 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x10 0x70>;
			phandle = <0x1ef>;
		};

		gpio010_cfg_func {
			pinctrl-v500,pad = <0x28 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x1f0>;
		};

		gpio010_cfg_idle {
			pinctrl-v500,pad = <0x28 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x1f1>;
		};

		gpio011_cfg_func {
			pinctrl-v500,pad = <0x2c 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x10 0x70>;
			phandle = <0x1f2>;
		};

		gpio011_cfg_idle {
			pinctrl-v500,pad = <0x2c 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x10 0x70>;
			phandle = <0x1f3>;
		};

		gpio012_cfg_func {
			pinctrl-v500,pad = <0x30 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x29>;
		};

		gpio012_cfg_idle {
			pinctrl-v500,pad = <0x30 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x2d>;
		};

		gpio013_cfg_func {
			pinctrl-v500,pad = <0x34 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x2a>;
		};

		gpio013_cfg_idle {
			pinctrl-v500,pad = <0x34 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x2e>;
		};

		gpio014_cfg_func {
			pinctrl-v500,pad = <0x38 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x1f4>;
		};

		gpio014_cfg_idle {
			pinctrl-v500,pad = <0x38 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x1f5>;
		};

		gpio015_cfg_func {
			pinctrl-v500,pad = <0x3c 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x1f6>;
		};

		gpio015_cfg_idle {
			pinctrl-v500,pad = <0x3c 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x1f7>;
		};

		gpio016_cfg_func {
			pinctrl-v500,pad = <0x40 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x1f8>;
		};

		gpio016_cfg_idle {
			pinctrl-v500,pad = <0x40 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x1f9>;
		};

		gpio017_cfg_func {
			pinctrl-v500,pad = <0x44 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x1fa>;
		};

		gpio017_cfg_idle {
			pinctrl-v500,pad = <0x44 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x1fb>;
		};

		gpio018_cfg_func {
			pinctrl-v500,pad = <0x700 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x10 0x70>;
			phandle = <0x3d>;
		};

		gpio018_cfg_idle {
			pinctrl-v500,pad = <0x700 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x10 0x70>;
			phandle = <0x41>;
		};

		gpio019_cfg_func {
			pinctrl-v500,pad = <0x704 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x10 0x70>;
			phandle = <0x3e>;
		};

		gpio019_cfg_idle {
			pinctrl-v500,pad = <0x704 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x10 0x70>;
			phandle = <0x42>;
		};

		gpio026_cfg_func {
			pinctrl-v500,pad = <0x60 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x1fc>;
		};

		gpio026_cfg_idle {
			pinctrl-v500,pad = <0x60 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x1fd>;
		};

		gpio033_cfg_func {
			pinctrl-v500,pad = <0x7c 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x1fe>;
		};

		gpio033_cfg_idle {
			pinctrl-v500,pad = <0x7c 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x1ff>;
		};

		gpio034_cfg_func {
			pinctrl-v500,pad = <0x80 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x200>;
		};

		gpio034_cfg_idle {
			pinctrl-v500,pad = <0x80 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x201>;
		};

		gpio037_cfg_func {
			pinctrl-v500,pad = <0x8c 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x202>;
		};

		gpio037_cfg_idle {
			pinctrl-v500,pad = <0x8c 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x203>;
		};

		gpio038_cfg_func {
			pinctrl-v500,pad = <0x90 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x204>;
		};

		gpio038_cfg_idle {
			pinctrl-v500,pad = <0x90 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x205>;
		};

		gpio039_cfg_func {
			pinctrl-v500,pad = <0x94 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x206>;
		};

		gpio039_cfg_idle {
			pinctrl-v500,pad = <0x94 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x207>;
		};

		gpio040_cfg_func {
			pinctrl-v500,pad = <0x98 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x208>;
		};

		gpio040_cfg_idle {
			pinctrl-v500,pad = <0x98 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x209>;
		};

		gpio041_cfg_func {
			pinctrl-v500,pad = <0x9c 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x01 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x7d>;
		};

		gpio041_cfg_idle {
			pinctrl-v500,pad = <0x9c 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x01 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x85>;
		};

		gpio042_cfg_func {
			pinctrl-v500,pad = <0xa0 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x7e>;
		};

		gpio042_cfg_idle {
			pinctrl-v500,pad = <0xa0 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x86>;
		};

		gpio043_cfg_func {
			pinctrl-v500,pad = <0xa4 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x01 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x7f>;
		};

		gpio043_cfg_idle {
			pinctrl-v500,pad = <0xa4 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x01 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x87>;
		};

		gpio044_cfg_func {
			pinctrl-v500,pad = <0xa8 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x80>;
		};

		gpio044_cfg_idle {
			pinctrl-v500,pad = <0xa8 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x88>;
		};

		gpio046_cfg_func {
			pinctrl-v500,pad = <0xb0 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x20a>;
		};

		gpio046_cfg_idle {
			pinctrl-v500,pad = <0xb0 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x20b>;
		};

		gpio047_cfg_func {
			pinctrl-v500,pad = <0xb4 0x00>;
			pinctrl-v500,bias-pulldown = <0x02 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x20c>;
		};

		gpio047_cfg_idle {
			pinctrl-v500,pad = <0xb4 0x00>;
			pinctrl-v500,bias-pulldown = <0x02 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x20d>;
		};

		gpio048_cfg_func {
			pinctrl-v500,pad = <0xb8 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x20e>;
		};

		gpio048_cfg_idle {
			pinctrl-v500,pad = <0xb8 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x20f>;
		};
	};

	pinmux@ff811000 {
		compatible = "pinctrl-v500";
		reg = <0x00 0xff811000 0x00 0x720>;
		#gpio-range-cells = <0x03>;
		pinctrl-v500,register-width = <0x20>;
		pinctrl-v500,function-mask = <0x07>;
		#pinctrl-cells = <0x01>;
		pinctrl-v500,gpio-range = <0x24 0x00 0x06 0x00>;
		phandle = <0xc2>;

		gpio069_pmx_idle {
			pinctrl-v500,mux = <0xff810710 0x00>;
			pinctrl-v500,pad = <0x710 0x00>;
		};

		gpio069_pmx_func {
			pinctrl-v500,mux = <0xff810710 0x00>;
			pinctrl-v500,pad = <0x710 0x00>;
		};

		gpio064_pmx_func {
			pinctrl-v500,pad = <0x700 0x01>;
			pinctrl-v500,mux = <0xff810700 0x01>;
			phandle = <0x210>;
		};

		gpio064_pmx_idle {
			pinctrl-v500,pad = <0x700 0x00>;
			pinctrl-v500,mux = <0xff810700 0x00>;
			phandle = <0x211>;
		};

		gpio065_pmx_func {
			pinctrl-v500,pad = <0x00 0x00>;
			pinctrl-v500,mux = <0xff810000 0x00>;
			phandle = <0x212>;
		};

		gpio065_pmx_idle {
			pinctrl-v500,pad = <0x00 0x00>;
			pinctrl-v500,mux = <0xff810000 0x00>;
			phandle = <0x213>;
		};

		gpio070_pmx_func {
			pinctrl-v500,pad = <0x714 0x00>;
			pinctrl-v500,mux = <0xff810714 0x00>;
			phandle = <0x214>;
		};

		gpio070_pmx_idle {
			pinctrl-v500,pad = <0x714 0x00>;
			pinctrl-v500,mux = <0xff810714 0x00>;
			phandle = <0x215>;
		};

		gpio071_pmx_func {
			pinctrl-v500,pad = <0x04 0x00>;
			pinctrl-v500,mux = <0xff810004 0x00>;
			phandle = <0x216>;
		};

		gpio071_pmx_idle {
			pinctrl-v500,pad = <0x04 0x00>;
			pinctrl-v500,mux = <0xff810004 0x00>;
			phandle = <0x217>;
		};

		gpio072_pmx_func {
			pinctrl-v500,pad = <0x08 0x00>;
			pinctrl-v500,mux = <0xff810008 0x00>;
			phandle = <0x218>;
		};

		gpio072_pmx_idle {
			pinctrl-v500,pad = <0x08 0x00>;
			pinctrl-v500,mux = <0xff810008 0x00>;
			phandle = <0x219>;
		};

		gpio073_pmx_func {
			pinctrl-v500,pad = <0x0c 0x00>;
			pinctrl-v500,mux = <0xff81000c 0x00>;
			phandle = <0x21a>;
		};

		gpio073_pmx_idle {
			pinctrl-v500,pad = <0x0c 0x00>;
			pinctrl-v500,mux = <0xff81000c 0x00>;
			phandle = <0x21b>;
		};

		gpio074_pmx_func {
			pinctrl-v500,pad = <0x718 0x00>;
			pinctrl-v500,mux = <0xff810718 0x00>;
			phandle = <0x21c>;
		};

		gpio074_pmx_idle {
			pinctrl-v500,pad = <0x718 0x00>;
			pinctrl-v500,mux = <0xff810718 0x00>;
			phandle = <0x21d>;
		};

		gpio076_pmx_func {
			pinctrl-v500,pad = <0x10 0x01>;
			pinctrl-v500,mux = <0xff810010 0x01>;
			phandle = <0x46>;
		};

		gpio076_pmx_idle {
			pinctrl-v500,pad = <0x10 0x00>;
			pinctrl-v500,mux = <0xff810010 0x00>;
			phandle = <0x4a>;
		};

		gpio077_pmx_func {
			pinctrl-v500,pad = <0x14 0x01>;
			pinctrl-v500,mux = <0xff810014 0x01>;
			phandle = <0x47>;
		};

		gpio077_pmx_idle {
			pinctrl-v500,pad = <0x14 0x00>;
			pinctrl-v500,mux = <0xff810014 0x00>;
			phandle = <0x4b>;
		};
	};

	pinmux@ff811800 {
		compatible = "pinconf-v500";
		reg = <0x00 0xff811800 0x00 0x720>;
		pinctrl-v500,register-width = <0x20>;
		#pinctrl-cells = <0x01>;
		phandle = <0x21e>;

		gpio069_cfg_idle {
			pinctrl-v500,drive-strength = <0x20 0x70>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,pad = <0x710 0x00>;
		};

		gpio069_cfg_func {
			pinctrl-v500,drive-strength = <0x20 0x70>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,pad = <0x710 0x00>;
		};

		gpio064_cfg_func {
			pinctrl-v500,pad = <0x700 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x21f>;
		};

		gpio064_cfg_idle {
			pinctrl-v500,pad = <0x700 0x00>;
			pinctrl-v500,bias-pulldown = <0x02 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x220>;
		};

		gpio065_cfg_func {
			pinctrl-v500,pad = <0x00 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x221>;
		};

		gpio065_cfg_idle {
			pinctrl-v500,pad = <0x00 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x222>;
		};

		gpio070_cfg_func {
			pinctrl-v500,pad = <0x714 0x00>;
			pinctrl-v500,bias-pulldown = <0x02 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x223>;
		};

		gpio070_cfg_idle {
			pinctrl-v500,pad = <0x714 0x00>;
			pinctrl-v500,bias-pulldown = <0x02 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x224>;
		};

		gpio071_cfg_func {
			pinctrl-v500,pad = <0x04 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x225>;
		};

		gpio071_cfg_idle {
			pinctrl-v500,pad = <0x04 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x226>;
		};

		gpio072_cfg_func {
			pinctrl-v500,pad = <0x08 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x227>;
		};

		gpio072_cfg_idle {
			pinctrl-v500,pad = <0x08 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x228>;
		};

		gpio073_cfg_func {
			pinctrl-v500,pad = <0x0c 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x229>;
		};

		gpio073_cfg_idle {
			pinctrl-v500,pad = <0x0c 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x22a>;
		};

		gpio074_cfg_func {
			pinctrl-v500,pad = <0x718 0x00>;
			pinctrl-v500,bias-pulldown = <0x02 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x22b>;
		};

		gpio074_cfg_idle {
			pinctrl-v500,pad = <0x718 0x00>;
			pinctrl-v500,bias-pulldown = <0x02 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x22c>;
		};

		gpio076_cfg_func {
			pinctrl-v500,pad = <0x10 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x48>;
		};

		gpio076_cfg_idle {
			pinctrl-v500,pad = <0x10 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x01 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x4c>;
		};

		gpio077_cfg_func {
			pinctrl-v500,pad = <0x14 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x49>;
		};

		gpio077_cfg_idle {
			pinctrl-v500,pad = <0x14 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x01 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x4d>;
		};
	};

	pinmux@ee266000 {
		compatible = "pinctrl-v500";
		reg = <0x00 0xee266000 0x00 0x70c>;
		#gpio-range-cells = <0x03>;
		pinctrl-v500,register-width = <0x20>;
		pinctrl-v500,function-mask = <0x07>;
		#pinctrl-cells = <0x01>;
		pinctrl-v500,gpio-range = <0x24 0x00 0x09 0x00>;
		phandle = <0xc4>;

		gpio096_pmx_func {
			pinctrl-v500,pad = <0x00 0x00>;
			pinctrl-v500,mux = <0xee265000 0x00>;
			phandle = <0x8a>;
		};

		gpio096_pmx_idle {
			pinctrl-v500,pad = <0x00 0x00>;
			pinctrl-v500,mux = <0xee265000 0x00>;
			phandle = <0x92>;
		};

		gpio097_pmx_func {
			pinctrl-v500,pad = <0x04 0x00>;
			pinctrl-v500,mux = <0xee265004 0x00>;
			phandle = <0x8b>;
		};

		gpio097_pmx_idle {
			pinctrl-v500,pad = <0x04 0x00>;
			pinctrl-v500,mux = <0xee265004 0x00>;
			phandle = <0x93>;
		};

		gpio098_pmx_func {
			pinctrl-v500,pad = <0x08 0x00>;
			pinctrl-v500,mux = <0xee265008 0x00>;
			phandle = <0x8c>;
		};

		gpio098_pmx_idle {
			pinctrl-v500,pad = <0x08 0x00>;
			pinctrl-v500,mux = <0xee265008 0x00>;
			phandle = <0x94>;
		};

		gpio099_pmx_func {
			pinctrl-v500,pad = <0x0c 0x00>;
			pinctrl-v500,mux = <0xee26500c 0x00>;
			phandle = <0x8d>;
		};

		gpio099_pmx_idle {
			pinctrl-v500,pad = <0x0c 0x00>;
			pinctrl-v500,mux = <0xee26500c 0x00>;
			phandle = <0x95>;
		};

		gpio100_pmx_func {
			pinctrl-v500,pad = <0x10 0x01>;
			pinctrl-v500,mux = <0xee265010 0x01>;
			phandle = <0x22d>;
		};

		gpio100_pmx_idle {
			pinctrl-v500,pad = <0x10 0x00>;
			pinctrl-v500,mux = <0xee265010 0x00>;
			phandle = <0x22e>;
		};

		gpio101_pmx_func {
			pinctrl-v500,pad = <0x14 0x01>;
			pinctrl-v500,mux = <0xee265014 0x01>;
			phandle = <0x22f>;
		};

		gpio101_pmx_idle {
			pinctrl-v500,pad = <0x14 0x00>;
			pinctrl-v500,mux = <0xee265014 0x00>;
			phandle = <0x230>;
		};

		gpio103_pmx_func {
			pinctrl-v500,pad = <0x18 0x00>;
			pinctrl-v500,mux = <0xee265018 0x00>;
			phandle = <0x5b>;
		};

		gpio103_pmx_idle {
			pinctrl-v500,pad = <0x18 0x00>;
			pinctrl-v500,mux = <0xee265018 0x00>;
			phandle = <0x5f>;
		};

		gpio104_pmx_func {
			pinctrl-v500,pad = <0x1c 0x00>;
			pinctrl-v500,mux = <0xee26501c 0x00>;
			phandle = <0x5c>;
		};

		gpio104_pmx_idle {
			pinctrl-v500,pad = <0x1c 0x00>;
			pinctrl-v500,mux = <0xee26501c 0x00>;
			phandle = <0x60>;
		};

		gpio105_pmx_func {
			pinctrl-v500,pad = <0x704 0x00>;
			pinctrl-v500,mux = <0xee265704 0x00>;
			phandle = <0x231>;
		};

		gpio105_pmx_idle {
			pinctrl-v500,pad = <0x704 0x00>;
			pinctrl-v500,mux = <0xee265704 0x00>;
			phandle = <0x232>;
		};

		gpio106_pmx_func {
			pinctrl-v500,pad = <0x20 0x00>;
			pinctrl-v500,mux = <0xee265020 0x00>;
			phandle = <0x233>;
		};

		gpio106_pmx_idle {
			pinctrl-v500,pad = <0x20 0x00>;
			pinctrl-v500,mux = <0xee265020 0x00>;
			phandle = <0x234>;
		};

		gpio107_pmx_func {
			pinctrl-v500,pad = <0x708 0x01>;
			pinctrl-v500,mux = <0xee265708 0x01>;
			phandle = <0x235>;
		};

		gpio107_pmx_idle {
			pinctrl-v500,pad = <0x708 0x01>;
			pinctrl-v500,mux = <0xee265708 0x01>;
			phandle = <0x236>;
		};
	};

	pinmux@ee266800 {
		compatible = "pinconf-v500";
		reg = <0x00 0xee266800 0x00 0x70c>;
		pinctrl-v500,register-width = <0x20>;
		#pinctrl-cells = <0x01>;
		phandle = <0x237>;

		gpio096_cfg_func {
			pinctrl-v500,pad = <0x00 0x00>;
			pinctrl-v500,bias-pulldown = <0x02 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x8e>;
		};

		gpio096_cfg_idle {
			pinctrl-v500,pad = <0x00 0x00>;
			pinctrl-v500,bias-pulldown = <0x02 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x96>;
		};

		gpio097_cfg_func {
			pinctrl-v500,pad = <0x04 0x00>;
			pinctrl-v500,bias-pulldown = <0x02 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x8f>;
		};

		gpio097_cfg_idle {
			pinctrl-v500,pad = <0x04 0x00>;
			pinctrl-v500,bias-pulldown = <0x02 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x97>;
		};

		gpio098_cfg_func {
			pinctrl-v500,pad = <0x08 0x00>;
			pinctrl-v500,bias-pulldown = <0x02 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x90>;
		};

		gpio098_cfg_idle {
			pinctrl-v500,pad = <0x08 0x00>;
			pinctrl-v500,bias-pulldown = <0x02 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x98>;
		};

		gpio099_cfg_func {
			pinctrl-v500,pad = <0x0c 0x00>;
			pinctrl-v500,bias-pulldown = <0x02 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x91>;
		};

		gpio099_cfg_idle {
			pinctrl-v500,pad = <0x0c 0x00>;
			pinctrl-v500,bias-pulldown = <0x02 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x99>;
		};

		gpio100_cfg_func {
			pinctrl-v500,pad = <0x10 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x238>;
		};

		gpio100_cfg_idle {
			pinctrl-v500,pad = <0x10 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x239>;
		};

		gpio101_cfg_func {
			pinctrl-v500,pad = <0x14 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x23a>;
		};

		gpio101_cfg_idle {
			pinctrl-v500,pad = <0x14 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x23b>;
		};

		gpio103_cfg_func {
			pinctrl-v500,pad = <0x18 0x00>;
			pinctrl-v500,bias-pulldown = <0x02 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x5d>;
		};

		gpio103_cfg_idle {
			pinctrl-v500,pad = <0x18 0x00>;
			pinctrl-v500,bias-pulldown = <0x02 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x61>;
		};

		gpio104_cfg_func {
			pinctrl-v500,pad = <0x1c 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x5e>;
		};

		gpio104_cfg_idle {
			pinctrl-v500,pad = <0x1c 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x62>;
		};

		gpio105_cfg_func {
			pinctrl-v500,pad = <0x704 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x23c>;
		};

		gpio105_cfg_idle {
			pinctrl-v500,pad = <0x704 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x23d>;
		};

		gpio106_cfg_func {
			pinctrl-v500,pad = <0x20 0x00>;
			pinctrl-v500,bias-pulldown = <0x02 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x23e>;
		};

		gpio106_cfg_idle {
			pinctrl-v500,pad = <0x20 0x00>;
			pinctrl-v500,bias-pulldown = <0x02 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x23f>;
		};

		gpio107_cfg_func {
			pinctrl-v500,pad = <0x708 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x240>;
		};

		gpio107_cfg_idle {
			pinctrl-v500,pad = <0x708 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x241>;
		};
	};

	pinmux@efb04000 {
		compatible = "pinctrl-v500";
		reg = <0x00 0xefb04000 0x00 0x710>;
		#gpio-range-cells = <0x03>;
		pinctrl-v500,register-width = <0x20>;
		pinctrl-v500,function-mask = <0x07>;
		#pinctrl-cells = <0x01>;
		pinctrl-v500,gpio-range = <0x24 0x00 0x19 0x00>;
		phandle = <0xcb>;

		gpio320_pmx_func {
			pinctrl-v500,pad = <0x00 0x01>;
			pinctrl-v500,mux = <0xefb03000 0x01>;
			phandle = <0x126>;
		};

		gpio320_pmx_idle {
			pinctrl-v500,pad = <0x00 0x00>;
			pinctrl-v500,mux = <0xefb03000 0x00>;
			phandle = <0x132>;
		};

		gpio321_pmx_func {
			pinctrl-v500,pad = <0x04 0x01>;
			pinctrl-v500,mux = <0xefb03004 0x01>;
			phandle = <0x127>;
		};

		gpio321_pmx_idle {
			pinctrl-v500,pad = <0x04 0x00>;
			pinctrl-v500,mux = <0xefb03004 0x00>;
			phandle = <0x133>;
		};

		gpio322_pmx_func {
			pinctrl-v500,pad = <0x08 0x01>;
			pinctrl-v500,mux = <0xefb03008 0x01>;
			phandle = <0x128>;
		};

		gpio322_pmx_idle {
			pinctrl-v500,pad = <0x08 0x00>;
			pinctrl-v500,mux = <0xefb03008 0x00>;
			phandle = <0x134>;
		};

		gpio323_pmx_func {
			pinctrl-v500,pad = <0x0c 0x01>;
			pinctrl-v500,mux = <0xefb0300c 0x01>;
			phandle = <0x129>;
		};

		gpio323_pmx_idle {
			pinctrl-v500,pad = <0x0c 0x00>;
			pinctrl-v500,mux = <0xefb0300c 0x00>;
			phandle = <0x135>;
		};

		gpio324_pmx_func {
			pinctrl-v500,pad = <0x10 0x01>;
			pinctrl-v500,mux = <0xefb03010 0x01>;
			phandle = <0x12a>;
		};

		gpio324_pmx_idle {
			pinctrl-v500,pad = <0x10 0x00>;
			pinctrl-v500,mux = <0xefb03010 0x00>;
			phandle = <0x136>;
		};

		gpio325_pmx_func {
			pinctrl-v500,pad = <0x14 0x01>;
			pinctrl-v500,mux = <0xefb03014 0x01>;
			phandle = <0x12b>;
		};

		gpio325_pmx_idle {
			pinctrl-v500,pad = <0x14 0x00>;
			pinctrl-v500,mux = <0xefb03014 0x00>;
			phandle = <0x137>;
		};

		gpio326_pmx_func {
			pinctrl-v500,pad = <0x18 0x01>;
			pinctrl-v500,mux = <0xefb03018 0x01>;
			phandle = <0x242>;
		};

		gpio326_pmx_idle {
			pinctrl-v500,pad = <0x18 0x01>;
			pinctrl-v500,mux = <0xefb03018 0x01>;
			phandle = <0x243>;
		};

		gpio327_pmx_func {
			pinctrl-v500,pad = <0x1c 0x01>;
			pinctrl-v500,mux = <0xefb0301c 0x01>;
			phandle = <0x244>;
		};

		gpio327_pmx_idle {
			pinctrl-v500,pad = <0x1c 0x01>;
			pinctrl-v500,mux = <0xefb0301c 0x01>;
			phandle = <0x245>;
		};

		gpio328_pmx_func {
			pinctrl-v500,pad = <0x20 0x01>;
			pinctrl-v500,mux = <0xefb03020 0x01>;
			phandle = <0x246>;
		};

		gpio328_pmx_idle {
			pinctrl-v500,pad = <0x20 0x01>;
			pinctrl-v500,mux = <0xefb03020 0x01>;
			phandle = <0x247>;
		};

		gpio329_pmx_func {
			pinctrl-v500,pad = <0x24 0x01>;
			pinctrl-v500,mux = <0xefb03024 0x01>;
			phandle = <0x248>;
		};

		gpio329_pmx_idle {
			pinctrl-v500,pad = <0x24 0x01>;
			pinctrl-v500,mux = <0xefb03024 0x01>;
			phandle = <0x249>;
		};

		gpio330_pmx_func {
			pinctrl-v500,pad = <0x28 0x01>;
			pinctrl-v500,mux = <0xefb03028 0x01>;
			phandle = <0x24a>;
		};

		gpio330_pmx_idle {
			pinctrl-v500,pad = <0x28 0x01>;
			pinctrl-v500,mux = <0xefb03028 0x01>;
			phandle = <0x24b>;
		};

		gpio331_pmx_func {
			pinctrl-v500,pad = <0x2c 0x01>;
			pinctrl-v500,mux = <0xefb0302c 0x01>;
			phandle = <0x24c>;
		};

		gpio331_pmx_idle {
			pinctrl-v500,pad = <0x2c 0x01>;
			pinctrl-v500,mux = <0xefb0302c 0x01>;
			phandle = <0x24d>;
		};

		gpio341_pmx_func {
			pinctrl-v500,pad = <0x700 0x00>;
			pinctrl-v500,mux = <0xefb03700 0x00>;
			phandle = <0x24e>;
		};

		gpio341_pmx_idle {
			pinctrl-v500,pad = <0x700 0x00>;
			pinctrl-v500,mux = <0xefb03700 0x00>;
			phandle = <0x24f>;
		};

		gpio342_pmx_func {
			pinctrl-v500,pad = <0x704 0x01>;
			pinctrl-v500,mux = <0xefb03704 0x01>;
			phandle = <0x250>;
		};

		gpio342_pmx_idle {
			pinctrl-v500,pad = <0x704 0x01>;
			pinctrl-v500,mux = <0xefb03704 0x01>;
			phandle = <0x251>;
		};

		gpio343_pmx_func {
			pinctrl-v500,pad = <0x708 0x01>;
			pinctrl-v500,mux = <0xefb03708 0x01>;
			phandle = <0x252>;
		};

		gpio343_pmx_idle {
			pinctrl-v500,pad = <0x708 0x01>;
			pinctrl-v500,mux = <0xefb03708 0x01>;
			phandle = <0x253>;
		};

		gpio344_pmx_func {
			pinctrl-v500,pad = <0x70c 0x01>;
			pinctrl-v500,mux = <0xefb0370c 0x01>;
			phandle = <0x254>;
		};

		gpio344_pmx_idle {
			pinctrl-v500,pad = <0x70c 0x01>;
			pinctrl-v500,mux = <0xefb0370c 0x01>;
			phandle = <0x255>;
		};

		gpio345_pmx_func {
			pinctrl-v500,pad = <0x54 0x00>;
			pinctrl-v500,mux = <0xefb03054 0x00>;
			phandle = <0x256>;
		};

		gpio345_pmx_idle {
			pinctrl-v500,pad = <0x54 0x00>;
			pinctrl-v500,mux = <0xefb03054 0x00>;
			phandle = <0x257>;
		};

		gpio346_pmx_func {
			pinctrl-v500,pad = <0x58 0x00>;
			pinctrl-v500,mux = <0xefb03058 0x00>;
			phandle = <0x258>;
		};

		gpio346_pmx_idle {
			pinctrl-v500,pad = <0x58 0x00>;
			pinctrl-v500,mux = <0xefb03058 0x00>;
			phandle = <0x259>;
		};

		gpio347_pmx_func {
			pinctrl-v500,pad = <0x5c 0x01>;
			pinctrl-v500,mux = <0xefb0305c 0x01>;
			phandle = <0x9b>;
		};

		gpio347_pmx_idle {
			pinctrl-v500,pad = <0x5c 0x01>;
			pinctrl-v500,mux = <0xefb0305c 0x01>;
			phandle = <0x9f>;
		};

		gpio348_pmx_func {
			pinctrl-v500,pad = <0x60 0x01>;
			pinctrl-v500,mux = <0xefb03060 0x01>;
			phandle = <0x9c>;
		};

		gpio348_pmx_idle {
			pinctrl-v500,pad = <0x60 0x01>;
			pinctrl-v500,mux = <0xefb03060 0x01>;
			phandle = <0xa0>;
		};
	};

	pinmux@efb04800 {
		compatible = "pinconf-v500";
		reg = <0x00 0xefb04800 0x00 0x710>;
		pinctrl-v500,register-width = <0x20>;
		#pinctrl-cells = <0x01>;
		phandle = <0x25a>;

		gpio320_cfg_func {
			pinctrl-v500,pad = <0x00 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x30 0xf0>;
			phandle = <0x12c>;
		};

		gpio320_cfg_idle {
			pinctrl-v500,pad = <0x00 0x00>;
			pinctrl-v500,bias-pulldown = <0x02 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0xf0>;
			phandle = <0x138>;
		};

		gpio321_cfg_func {
			pinctrl-v500,pad = <0x04 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x01 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0xf0>;
			phandle = <0x12d>;
		};

		gpio321_cfg_idle {
			pinctrl-v500,pad = <0x04 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x01 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0xf0>;
			phandle = <0x139>;
		};

		gpio322_cfg_func {
			pinctrl-v500,pad = <0x08 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x01 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0xf0>;
			phandle = <0x12e>;
		};

		gpio322_cfg_idle {
			pinctrl-v500,pad = <0x08 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x01 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0xf0>;
			phandle = <0x13a>;
		};

		gpio323_cfg_func {
			pinctrl-v500,pad = <0x0c 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x01 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0xf0>;
			phandle = <0x12f>;
		};

		gpio323_cfg_idle {
			pinctrl-v500,pad = <0x0c 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x01 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0xf0>;
			phandle = <0x13b>;
		};

		gpio324_cfg_func {
			pinctrl-v500,pad = <0x10 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x01 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0xf0>;
			phandle = <0x130>;
		};

		gpio324_cfg_idle {
			pinctrl-v500,pad = <0x10 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x01 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0xf0>;
			phandle = <0x13c>;
		};

		gpio325_cfg_func {
			pinctrl-v500,pad = <0x14 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x01 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0xf0>;
			phandle = <0x131>;
		};

		gpio325_cfg_idle {
			pinctrl-v500,pad = <0x14 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x01 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0xf0>;
			phandle = <0x13d>;
		};

		gpio326_cfg_func {
			pinctrl-v500,pad = <0x18 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0xf0>;
			phandle = <0x25b>;
		};

		gpio326_cfg_idle {
			pinctrl-v500,pad = <0x18 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0xf0>;
			phandle = <0x25c>;
		};

		gpio327_cfg_func {
			pinctrl-v500,pad = <0x1c 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0xf0>;
			phandle = <0x25d>;
		};

		gpio327_cfg_idle {
			pinctrl-v500,pad = <0x1c 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0xf0>;
			phandle = <0x25e>;
		};

		gpio328_cfg_func {
			pinctrl-v500,pad = <0x20 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0xf0>;
			phandle = <0x25f>;
		};

		gpio328_cfg_idle {
			pinctrl-v500,pad = <0x20 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0xf0>;
			phandle = <0x260>;
		};

		gpio329_cfg_func {
			pinctrl-v500,pad = <0x24 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0xf0>;
			phandle = <0x261>;
		};

		gpio329_cfg_idle {
			pinctrl-v500,pad = <0x24 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0xf0>;
			phandle = <0x262>;
		};

		gpio330_cfg_func {
			pinctrl-v500,pad = <0x28 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0xf0>;
			phandle = <0x263>;
		};

		gpio330_cfg_idle {
			pinctrl-v500,pad = <0x28 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0xf0>;
			phandle = <0x264>;
		};

		gpio331_cfg_func {
			pinctrl-v500,pad = <0x2c 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0xf0>;
			phandle = <0x265>;
		};

		gpio331_cfg_idle {
			pinctrl-v500,pad = <0x2c 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0xf0>;
			phandle = <0x266>;
		};

		gpio332_cfg_func {
			pinctrl-v500,pad = <0x30 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x267>;
		};

		gpio332_cfg_idle {
			pinctrl-v500,pad = <0x30 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x268>;
		};

		gpio333_cfg_func {
			pinctrl-v500,pad = <0x34 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x269>;
		};

		gpio333_cfg_idle {
			pinctrl-v500,pad = <0x34 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x26a>;
		};

		gpio334_cfg_func {
			pinctrl-v500,pad = <0x38 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x26b>;
		};

		gpio334_cfg_idle {
			pinctrl-v500,pad = <0x38 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x26c>;
		};

		gpio335_cfg_func {
			pinctrl-v500,pad = <0x3c 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x26d>;
		};

		gpio335_cfg_idle {
			pinctrl-v500,pad = <0x3c 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x26e>;
		};

		gpio336_cfg_func {
			pinctrl-v500,pad = <0x40 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x26f>;
		};

		gpio336_cfg_idle {
			pinctrl-v500,pad = <0x40 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x270>;
		};

		gpio337_cfg_func {
			pinctrl-v500,pad = <0x44 0x00>;
			pinctrl-v500,bias-pulldown = <0x02 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x271>;
		};

		gpio337_cfg_idle {
			pinctrl-v500,pad = <0x44 0x00>;
			pinctrl-v500,bias-pulldown = <0x02 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x272>;
		};

		gpio338_cfg_func {
			pinctrl-v500,pad = <0x48 0x00>;
			pinctrl-v500,bias-pulldown = <0x02 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x273>;
		};

		gpio338_cfg_idle {
			pinctrl-v500,pad = <0x48 0x00>;
			pinctrl-v500,bias-pulldown = <0x02 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x274>;
		};

		gpio339_cfg_func {
			pinctrl-v500,pad = <0x4c 0x00>;
			pinctrl-v500,bias-pulldown = <0x02 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x275>;
		};

		gpio339_cfg_idle {
			pinctrl-v500,pad = <0x4c 0x00>;
			pinctrl-v500,bias-pulldown = <0x02 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x276>;
		};

		gpio340_cfg_func {
			pinctrl-v500,pad = <0x50 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x277>;
		};

		gpio340_cfg_idle {
			pinctrl-v500,pad = <0x50 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x278>;
		};

		gpio341_cfg_func {
			pinctrl-v500,pad = <0x700 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x279>;
		};

		gpio341_cfg_idle {
			pinctrl-v500,pad = <0x700 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x27a>;
		};

		gpio342_cfg_func {
			pinctrl-v500,pad = <0x704 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x27b>;
		};

		gpio342_cfg_idle {
			pinctrl-v500,pad = <0x704 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x27c>;
		};

		gpio343_cfg_func {
			pinctrl-v500,pad = <0x708 0x00>;
			pinctrl-v500,bias-pulldown = <0x02 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x27d>;
		};

		gpio343_cfg_idle {
			pinctrl-v500,pad = <0x708 0x00>;
			pinctrl-v500,bias-pulldown = <0x02 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x27e>;
		};

		gpio344_cfg_func {
			pinctrl-v500,pad = <0x70c 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x27f>;
		};

		gpio344_cfg_idle {
			pinctrl-v500,pad = <0x70c 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x280>;
		};

		gpio345_cfg_func {
			pinctrl-v500,pad = <0x54 0x00>;
			pinctrl-v500,bias-pulldown = <0x02 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x281>;
		};

		gpio345_cfg_idle {
			pinctrl-v500,pad = <0x54 0x00>;
			pinctrl-v500,bias-pulldown = <0x02 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x282>;
		};

		gpio346_cfg_func {
			pinctrl-v500,pad = <0x58 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x283>;
		};

		gpio346_cfg_idle {
			pinctrl-v500,pad = <0x58 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x284>;
		};

		gpio347_cfg_func {
			pinctrl-v500,pad = <0x5c 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x01 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x9d>;
		};

		gpio347_cfg_idle {
			pinctrl-v500,pad = <0x5c 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x01 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0xa1>;
		};

		gpio348_cfg_func {
			pinctrl-v500,pad = <0x60 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x9e>;
		};

		gpio348_cfg_idle {
			pinctrl-v500,pad = <0x60 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0xa2>;
		};

		gpio349_cfg_func {
			pinctrl-v500,pad = <0x68 0x00>;
			pinctrl-v500,bias-pulldown = <0x02 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x285>;
		};

		gpio349_cfg_idle {
			pinctrl-v500,pad = <0x68 0x00>;
			pinctrl-v500,bias-pulldown = <0x02 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x286>;
		};

		gpio350_cfg_func {
			pinctrl-v500,pad = <0x6c 0x00>;
			pinctrl-v500,bias-pulldown = <0x02 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x287>;
		};

		gpio350_cfg_idle {
			pinctrl-v500,pad = <0x6c 0x00>;
			pinctrl-v500,bias-pulldown = <0x02 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x288>;
		};

		gpio351_cfg_func {
			pinctrl-v500,pad = <0x70 0x00>;
			pinctrl-v500,bias-pulldown = <0x02 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x289>;
		};

		gpio351_cfg_idle {
			pinctrl-v500,pad = <0x70 0x00>;
			pinctrl-v500,bias-pulldown = <0x02 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x28a>;
		};

		gpio352_cfg_func {
			pinctrl-v500,pad = <0x74 0x00>;
			pinctrl-v500,bias-pulldown = <0x02 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x28b>;
		};

		gpio352_cfg_idle {
			pinctrl-v500,pad = <0x74 0x00>;
			pinctrl-v500,bias-pulldown = <0x02 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x28c>;
		};

		gpio353_cfg_func {
			pinctrl-v500,pad = <0x78 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x28e>;
		};

		gpio353_cfg_idle {
			pinctrl-v500,pad = <0x78 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x28f>;
		};

		gpio354_cfg_func {
			pinctrl-v500,pad = <0x7c 0x00>;
			pinctrl-v500,bias-pulldown = <0x02 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x290>;
		};

		gpio354_cfg_idle {
			pinctrl-v500,pad = <0x7c 0x00>;
			pinctrl-v500,bias-pulldown = <0x02 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x291>;
		};

		gpio355_cfg_func {
			pinctrl-v500,pad = <0x80 0x00>;
			pinctrl-v500,bias-pulldown = <0x02 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x292>;
		};

		gpio355_cfg_idle {
			pinctrl-v500,pad = <0x80 0x00>;
			pinctrl-v500,bias-pulldown = <0x02 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x293>;
		};

		gpio356_cfg_func {
			pinctrl-v500,pad = <0x84 0x00>;
			pinctrl-v500,bias-pulldown = <0x02 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x294>;
		};

		gpio356_cfg_idle {
			pinctrl-v500,pad = <0x84 0x00>;
			pinctrl-v500,bias-pulldown = <0x02 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x295>;
		};

		gpio357_cfg_func {
			pinctrl-v500,pad = <0x88 0x00>;
			pinctrl-v500,bias-pulldown = <0x02 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x296>;
		};

		gpio357_cfg_idle {
			pinctrl-v500,pad = <0x88 0x00>;
			pinctrl-v500,bias-pulldown = <0x02 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x297>;
		};

		gpio358_cfg_func {
			pinctrl-v500,pad = <0x8c 0x00>;
			pinctrl-v500,bias-pulldown = <0x02 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x298>;
		};

		gpio358_cfg_idle {
			pinctrl-v500,pad = <0x8c 0x00>;
			pinctrl-v500,bias-pulldown = <0x02 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x299>;
		};

		gpio359_cfg_func {
			pinctrl-v500,pad = <0x90 0x00>;
			pinctrl-v500,bias-pulldown = <0x02 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x29a>;
		};

		gpio359_cfg_idle {
			pinctrl-v500,pad = <0x90 0x00>;
			pinctrl-v500,bias-pulldown = <0x02 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x29b>;
		};

		gpio360_cfg_func {
			pinctrl-v500,pad = <0x94 0x00>;
			pinctrl-v500,bias-pulldown = <0x02 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x29c>;
		};

		gpio360_cfg_idle {
			pinctrl-v500,pad = <0x94 0x00>;
			pinctrl-v500,bias-pulldown = <0x02 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x29d>;
		};
	};

	pinmux@fb229000 {
		compatible = "pinctrl-v500";
		reg = <0x00 0xfb229000 0x00 0x7b4>;
		#gpio-range-cells = <0x03>;
		pinctrl-v500,register-width = <0x20>;
		pinctrl-v500,function-mask = <0x07>;
		#pinctrl-cells = <0x01>;
		pinctrl-v500,gpio-range = <0x24 0x06 0x39 0x00>;
		phandle = <0xc6>;

		gpio160_pmx_func {
			pinctrl-v500,pad = <0x18 0x01>;
			pinctrl-v500,mux = <0xfb228018 0x01>;
			phandle = <0x29e>;
		};

		gpio160_pmx_idle {
			pinctrl-v500,pad = <0x18 0x01>;
			pinctrl-v500,mux = <0xfb228018 0x01>;
			phandle = <0x29f>;
		};

		gpio161_pmx_func {
			pinctrl-v500,pad = <0x1c 0x01>;
			pinctrl-v500,mux = <0xfb22801c 0x01>;
			phandle = <0x2a0>;
		};

		gpio161_pmx_idle {
			pinctrl-v500,pad = <0x1c 0x01>;
			pinctrl-v500,mux = <0xfb22801c 0x01>;
			phandle = <0x2a1>;
		};

		gpio162_pmx_func {
			pinctrl-v500,pad = <0x20 0x01>;
			pinctrl-v500,mux = <0xfb228020 0x01>;
			phandle = <0x2a2>;
		};

		gpio162_pmx_idle {
			pinctrl-v500,pad = <0x20 0x01>;
			pinctrl-v500,mux = <0xfb228020 0x01>;
			phandle = <0x2a3>;
		};

		gpio163_pmx_func {
			pinctrl-v500,pad = <0x24 0x01>;
			pinctrl-v500,mux = <0xfb228024 0x01>;
			phandle = <0x2a4>;
		};

		gpio163_pmx_idle {
			pinctrl-v500,pad = <0x24 0x01>;
			pinctrl-v500,mux = <0xfb228024 0x01>;
			phandle = <0x2a5>;
		};

		gpio164_pmx_func {
			pinctrl-v500,pad = <0x700 0x05>;
			pinctrl-v500,mux = <0xfb228700 0x05>;
			phandle = <0x2a6>;
		};

		gpio164_pmx_idle {
			pinctrl-v500,pad = <0x700 0x05>;
			pinctrl-v500,mux = <0xfb228700 0x05>;
			phandle = <0x2a7>;
		};

		gpio165_pmx_func {
			pinctrl-v500,pad = <0x704 0x05>;
			pinctrl-v500,mux = <0xfb228704 0x05>;
			phandle = <0x2a8>;
		};

		gpio165_pmx_idle {
			pinctrl-v500,pad = <0x704 0x05>;
			pinctrl-v500,mux = <0xfb228704 0x05>;
			phandle = <0x2a9>;
		};

		gpio166_pmx_func {
			pinctrl-v500,pad = <0x708 0x01>;
			pinctrl-v500,mux = <0xfb228708 0x01>;
			phandle = <0x2aa>;
		};

		gpio166_pmx_idle {
			pinctrl-v500,pad = <0x708 0x01>;
			pinctrl-v500,mux = <0xfb228708 0x01>;
			phandle = <0x2ab>;
		};

		gpio167_pmx_func {
			pinctrl-v500,pad = <0x70c 0x01>;
			pinctrl-v500,mux = <0xfb22870c 0x01>;
			phandle = <0x2ac>;
		};

		gpio167_pmx_idle {
			pinctrl-v500,pad = <0x70c 0x01>;
			pinctrl-v500,mux = <0xfb22870c 0x01>;
			phandle = <0x2ad>;
		};

		gpio168_pmx_func {
			pinctrl-v500,pad = <0x710 0x00>;
			pinctrl-v500,mux = <0xfb228710 0x00>;
			phandle = <0x2ae>;
		};

		gpio168_pmx_idle {
			pinctrl-v500,pad = <0x710 0x00>;
			pinctrl-v500,mux = <0xfb228710 0x00>;
			phandle = <0x2af>;
		};

		gpio169_pmx_func {
			pinctrl-v500,pad = <0x714 0x00>;
			pinctrl-v500,mux = <0xfb228714 0x00>;
			phandle = <0x2b0>;
		};

		gpio169_pmx_idle {
			pinctrl-v500,pad = <0x714 0x00>;
			pinctrl-v500,mux = <0xfb228714 0x00>;
			phandle = <0x2b1>;
		};

		gpio170_pmx_func {
			pinctrl-v500,pad = <0x718 0x00>;
			pinctrl-v500,mux = <0xfb228718 0x00>;
			phandle = <0x2b2>;
		};

		gpio170_pmx_idle {
			pinctrl-v500,pad = <0x718 0x00>;
			pinctrl-v500,mux = <0xfb228718 0x00>;
			phandle = <0x2b3>;
		};

		gpio171_pmx_func {
			pinctrl-v500,pad = <0x71c 0x00>;
			pinctrl-v500,mux = <0xfb22871c 0x00>;
			phandle = <0x2b4>;
		};

		gpio171_pmx_idle {
			pinctrl-v500,pad = <0x71c 0x00>;
			pinctrl-v500,mux = <0xfb22871c 0x00>;
			phandle = <0x2b5>;
		};

		gpio172_pmx_func {
			pinctrl-v500,pad = <0x720 0x00>;
			pinctrl-v500,mux = <0xfb228720 0x00>;
			phandle = <0x2b6>;
		};

		gpio172_pmx_idle {
			pinctrl-v500,pad = <0x720 0x00>;
			pinctrl-v500,mux = <0xfb228720 0x00>;
			phandle = <0x2b7>;
		};

		gpio173_pmx_func {
			pinctrl-v500,pad = <0x724 0x04>;
			pinctrl-v500,mux = <0xfb228724 0x04>;
			phandle = <0xa5>;
		};

		gpio173_pmx_idle {
			pinctrl-v500,pad = <0x724 0x01>;
			pinctrl-v500,mux = <0xfb228724 0x01>;
			phandle = <0xab>;
		};

		gpio174_pmx_func {
			pinctrl-v500,pad = <0x728 0x04>;
			pinctrl-v500,mux = <0xfb228728 0x04>;
			phandle = <0xa6>;
		};

		gpio174_pmx_idle {
			pinctrl-v500,pad = <0x728 0x01>;
			pinctrl-v500,mux = <0xfb228728 0x01>;
			phandle = <0xac>;
		};

		gpio175_pmx_func {
			pinctrl-v500,pad = <0x72c 0x04>;
			pinctrl-v500,mux = <0xfb22872c 0x04>;
			phandle = <0xa7>;
		};

		gpio175_pmx_idle {
			pinctrl-v500,pad = <0x72c 0x01>;
			pinctrl-v500,mux = <0xfb22872c 0x01>;
			phandle = <0xad>;
		};

		gpio177_pmx_func {
			pinctrl-v500,pad = <0x730 0x00>;
			pinctrl-v500,mux = <0xfb228730 0x00>;
			phandle = <0x2b8>;
		};

		gpio177_pmx_idle {
			pinctrl-v500,pad = <0x730 0x00>;
			pinctrl-v500,mux = <0xfb228730 0x00>;
			phandle = <0x2b9>;
		};

		gpio178_pmx_func {
			pinctrl-v500,pad = <0x734 0x00>;
			pinctrl-v500,mux = <0xfb228734 0x00>;
			phandle = <0x2ba>;
		};

		gpio178_pmx_idle {
			pinctrl-v500,pad = <0x734 0x00>;
			pinctrl-v500,mux = <0xfb228734 0x00>;
			phandle = <0x2bb>;
		};

		gpio179_pmx_func {
			pinctrl-v500,pad = <0x738 0x01>;
			pinctrl-v500,mux = <0xfb228738 0x01>;
			phandle = <0x2bc>;
		};

		gpio179_pmx_idle {
			pinctrl-v500,pad = <0x738 0x01>;
			pinctrl-v500,mux = <0xfb228738 0x01>;
			phandle = <0x2bd>;
		};

		gpio180_pmx_func {
			pinctrl-v500,pad = <0x73c 0x01>;
			pinctrl-v500,mux = <0xfb22873c 0x01>;
			phandle = <0x2be>;
		};

		gpio180_pmx_idle {
			pinctrl-v500,pad = <0x73c 0x01>;
			pinctrl-v500,mux = <0xfb22873c 0x01>;
			phandle = <0x2bf>;
		};

		gpio181_pmx_func {
			pinctrl-v500,pad = <0x740 0x00>;
			pinctrl-v500,mux = <0xfb228740 0x00>;
			phandle = <0x2c0>;
		};

		gpio181_pmx_idle {
			pinctrl-v500,pad = <0x740 0x00>;
			pinctrl-v500,mux = <0xfb228740 0x00>;
			phandle = <0x2c1>;
		};

		gpio182_pmx_func {
			pinctrl-v500,pad = <0x2c 0x00>;
			pinctrl-v500,mux = <0xfb22802c 0x00>;
			phandle = <0x2c2>;
		};

		gpio182_pmx_idle {
			pinctrl-v500,pad = <0x2c 0x00>;
			pinctrl-v500,mux = <0xfb22802c 0x00>;
			phandle = <0x2c3>;
		};

		gpio183_pmx_func {
			pinctrl-v500,pad = <0x30 0x00>;
			pinctrl-v500,mux = <0xfb228030 0x00>;
			phandle = <0x2c4>;
		};

		gpio183_pmx_idle {
			pinctrl-v500,pad = <0x30 0x00>;
			pinctrl-v500,mux = <0xfb228030 0x00>;
			phandle = <0x2c5>;
		};

		gpio184_pmx_func {
			pinctrl-v500,pad = <0x34 0x01>;
			pinctrl-v500,mux = <0xfb228034 0x01>;
			phandle = <0x2c6>;
		};

		gpio184_pmx_idle {
			pinctrl-v500,pad = <0x34 0x01>;
			pinctrl-v500,mux = <0xfb228034 0x01>;
			phandle = <0x2c7>;
		};

		gpio185_pmx_func {
			pinctrl-v500,pad = <0x38 0x01>;
			pinctrl-v500,mux = <0xfb228038 0x01>;
			phandle = <0x2c8>;
		};

		gpio185_pmx_idle {
			pinctrl-v500,pad = <0x38 0x01>;
			pinctrl-v500,mux = <0xfb228038 0x01>;
			phandle = <0x2c9>;
		};

		gpio186_pmx_func {
			pinctrl-v500,pad = <0x3c 0x01>;
			pinctrl-v500,mux = <0xfb22803c 0x01>;
			phandle = <0x2ca>;
		};

		gpio186_pmx_idle {
			pinctrl-v500,pad = <0x3c 0x01>;
			pinctrl-v500,mux = <0xfb22803c 0x01>;
			phandle = <0x2cb>;
		};

		gpio187_pmx_func {
			pinctrl-v500,pad = <0x40 0x01>;
			pinctrl-v500,mux = <0xfb228040 0x01>;
			phandle = <0x2cc>;
		};

		gpio187_pmx_idle {
			pinctrl-v500,pad = <0x40 0x01>;
			pinctrl-v500,mux = <0xfb228040 0x01>;
			phandle = <0x2cd>;
		};

		gpio188_pmx_func {
			pinctrl-v500,pad = <0x44 0x00>;
			pinctrl-v500,mux = <0xfb228044 0x00>;
			phandle = <0x2ce>;
		};

		gpio188_pmx_idle {
			pinctrl-v500,pad = <0x44 0x00>;
			pinctrl-v500,mux = <0xfb228044 0x00>;
			phandle = <0x2cf>;
		};

		gpio189_pmx_func {
			pinctrl-v500,pad = <0x48 0x00>;
			pinctrl-v500,mux = <0xfb228048 0x00>;
			phandle = <0x2d0>;
		};

		gpio189_pmx_idle {
			pinctrl-v500,pad = <0x48 0x00>;
			pinctrl-v500,mux = <0xfb228048 0x00>;
			phandle = <0x2d1>;
		};

		gpio190_pmx_func {
			pinctrl-v500,pad = <0x4c 0x00>;
			pinctrl-v500,mux = <0xfb22804c 0x00>;
			phandle = <0x2d2>;
		};

		gpio190_pmx_idle {
			pinctrl-v500,pad = <0x4c 0x00>;
			pinctrl-v500,mux = <0xfb22804c 0x00>;
			phandle = <0x2d3>;
		};

		gpio191_pmx_func {
			pinctrl-v500,pad = <0x50 0x01>;
			pinctrl-v500,mux = <0xfb228050 0x01>;
			phandle = <0x2d4>;
		};

		gpio191_pmx_idle {
			pinctrl-v500,pad = <0x50 0x01>;
			pinctrl-v500,mux = <0xfb228050 0x01>;
			phandle = <0x2d5>;
		};

		gpio192_pmx_func {
			pinctrl-v500,pad = <0x54 0x01>;
			pinctrl-v500,mux = <0xfb228054 0x01>;
			phandle = <0x2d6>;
		};

		gpio192_pmx_idle {
			pinctrl-v500,pad = <0x54 0x01>;
			pinctrl-v500,mux = <0xfb228054 0x01>;
			phandle = <0x2d7>;
		};

		gpio193_pmx_func {
			pinctrl-v500,pad = <0x58 0x01>;
			pinctrl-v500,mux = <0xfb228058 0x01>;
			phandle = <0x2d8>;
		};

		gpio193_pmx_idle {
			pinctrl-v500,pad = <0x58 0x01>;
			pinctrl-v500,mux = <0xfb228058 0x01>;
			phandle = <0x2d9>;
		};

		gpio194_pmx_func {
			pinctrl-v500,pad = <0x5c 0x01>;
			pinctrl-v500,mux = <0xfb22805c 0x01>;
			phandle = <0x2da>;
		};

		gpio194_pmx_idle {
			pinctrl-v500,pad = <0x5c 0x01>;
			pinctrl-v500,mux = <0xfb22805c 0x01>;
			phandle = <0x2db>;
		};

		gpio195_pmx_func {
			pinctrl-v500,pad = <0x60 0x00>;
			pinctrl-v500,mux = <0xfb228060 0x00>;
			phandle = <0x2dc>;
		};

		gpio195_pmx_idle {
			pinctrl-v500,pad = <0x60 0x00>;
			pinctrl-v500,mux = <0xfb228060 0x00>;
			phandle = <0x2dd>;
		};

		gpio196_pmx_func {
			pinctrl-v500,pad = <0x64 0x00>;
			pinctrl-v500,mux = <0xfb228064 0x00>;
			phandle = <0x2de>;
		};

		gpio196_pmx_idle {
			pinctrl-v500,pad = <0x64 0x00>;
			pinctrl-v500,mux = <0xfb228064 0x00>;
			phandle = <0x2df>;
		};

		gpio197_pmx_func {
			pinctrl-v500,pad = <0x68 0x00>;
			pinctrl-v500,mux = <0xfb228068 0x00>;
			phandle = <0x2e0>;
		};

		gpio197_pmx_idle {
			pinctrl-v500,pad = <0x68 0x00>;
			pinctrl-v500,mux = <0xfb228068 0x00>;
			phandle = <0x2e1>;
		};

		gpio198_pmx_func {
			pinctrl-v500,pad = <0x744 0x04>;
			pinctrl-v500,mux = <0xfb228744 0x04>;
			phandle = <0x2e2>;
		};

		gpio198_pmx_idle {
			pinctrl-v500,pad = <0x744 0x05>;
			pinctrl-v500,mux = <0xfb228744 0x05>;
			phandle = <0x2e3>;
		};

		gpio199_pmx_func {
			pinctrl-v500,pad = <0x748 0x04>;
			pinctrl-v500,mux = <0xfb228748 0x04>;
			phandle = <0x2e4>;
		};

		gpio199_pmx_idle {
			pinctrl-v500,pad = <0x748 0x05>;
			pinctrl-v500,mux = <0xfb228748 0x05>;
			phandle = <0x2e5>;
		};

		gpio200_pmx_func {
			pinctrl-v500,pad = <0x74c 0x04>;
			pinctrl-v500,mux = <0xfb22874c 0x04>;
			phandle = <0x2e6>;
		};

		gpio200_pmx_idle {
			pinctrl-v500,pad = <0x74c 0x05>;
			pinctrl-v500,mux = <0xfb22874c 0x05>;
			phandle = <0x2e7>;
		};

		gpio201_pmx_func {
			pinctrl-v500,pad = <0x750 0x04>;
			pinctrl-v500,mux = <0xfb228750 0x04>;
			phandle = <0x2e8>;
		};

		gpio201_pmx_idle {
			pinctrl-v500,pad = <0x750 0x05>;
			pinctrl-v500,mux = <0xfb228750 0x05>;
			phandle = <0x2e9>;
		};

		gpio202_pmx_func {
			pinctrl-v500,pad = <0x6c 0x00>;
			pinctrl-v500,mux = <0xfb22806c 0x00>;
			phandle = <0x2ea>;
		};

		gpio202_pmx_idle {
			pinctrl-v500,pad = <0x6c 0x00>;
			pinctrl-v500,mux = <0xfb22806c 0x00>;
			phandle = <0x2eb>;
		};

		gpio203_pmx_func {
			pinctrl-v500,pad = <0x754 0x00>;
			pinctrl-v500,mux = <0xfb228754 0x00>;
			phandle = <0x2ec>;
		};

		gpio203_pmx_idle {
			pinctrl-v500,pad = <0x754 0x00>;
			pinctrl-v500,mux = <0xfb228754 0x00>;
			phandle = <0x2ed>;
		};

		gpio204_pmx_func {
			pinctrl-v500,pad = <0x758 0x00>;
			pinctrl-v500,mux = <0xfb228758 0x00>;
			phandle = <0x2ee>;
		};

		gpio204_pmx_idle {
			pinctrl-v500,pad = <0x758 0x00>;
			pinctrl-v500,mux = <0xfb228758 0x00>;
			phandle = <0x2ef>;
		};

		gpio205_pmx_func {
			pinctrl-v500,pad = <0x75c 0x00>;
			pinctrl-v500,mux = <0xfb22875c 0x00>;
			phandle = <0x2f0>;
		};

		gpio205_pmx_idle {
			pinctrl-v500,pad = <0x75c 0x00>;
			pinctrl-v500,mux = <0xfb22875c 0x00>;
			phandle = <0x2f1>;
		};

		gpio206_pmx_func {
			pinctrl-v500,pad = <0x760 0x00>;
			pinctrl-v500,mux = <0xfb228760 0x00>;
			phandle = <0x2f2>;
		};

		gpio206_pmx_idle {
			pinctrl-v500,pad = <0x760 0x00>;
			pinctrl-v500,mux = <0xfb228760 0x00>;
			phandle = <0x2f3>;
		};

		gpio207_pmx_func {
			pinctrl-v500,pad = <0x70 0x00>;
			pinctrl-v500,mux = <0xfb228070 0x00>;
			phandle = <0x2f4>;
		};

		gpio207_pmx_idle {
			pinctrl-v500,pad = <0x70 0x00>;
			pinctrl-v500,mux = <0xfb228070 0x00>;
			phandle = <0x2f5>;
		};

		gpio208_pmx_func {
			pinctrl-v500,pad = <0x764 0x01>;
			pinctrl-v500,mux = <0xfb228764 0x01>;
			phandle = <0x2f6>;
		};

		gpio208_pmx_idle {
			pinctrl-v500,pad = <0x764 0x01>;
			pinctrl-v500,mux = <0xfb228764 0x01>;
			phandle = <0x2f7>;
		};

		gpio209_pmx_func {
			phandle = <0x2f8>;
		};

		gpio209_pmx_idle {
			phandle = <0x2f9>;
		};

		gpio210_pmx_func {
			phandle = <0x2fa>;
		};

		gpio210_pmx_idle {
			phandle = <0x2fb>;
		};

		gpio211_pmx_func {
			phandle = <0x2fc>;
		};

		gpio211_pmx_idle {
			phandle = <0x2fd>;
		};

		gpio212_pmx_func {
			phandle = <0x2fe>;
		};

		gpio212_pmx_idle {
			phandle = <0x2ff>;
		};

		gpio213_pmx_func {
			phandle = <0x300>;
		};

		gpio213_pmx_idle {
			phandle = <0x301>;
		};

		gpio214_pmx_func {
			pinctrl-v500,pad = <0x768 0x00>;
			pinctrl-v500,mux = <0xfb228768 0x00>;
			phandle = <0x302>;
		};

		gpio214_pmx_idle {
			pinctrl-v500,pad = <0x768 0x00>;
			pinctrl-v500,mux = <0xfb228768 0x00>;
			phandle = <0x303>;
		};

		gpio215_pmx_func {
			pinctrl-v500,pad = <0x94 0x01>;
			pinctrl-v500,mux = <0xfb228094 0x01>;
			phandle = <0x304>;
		};

		gpio215_pmx_idle {
			pinctrl-v500,pad = <0x94 0x01>;
			pinctrl-v500,mux = <0xfb228094 0x01>;
			phandle = <0x305>;
		};

		gpio216_pmx_func {
			pinctrl-v500,pad = <0x98 0x01>;
			pinctrl-v500,mux = <0xfb228098 0x01>;
			phandle = <0x306>;
		};

		gpio216_pmx_idle {
			pinctrl-v500,pad = <0x98 0x01>;
			pinctrl-v500,mux = <0xfb228098 0x01>;
			phandle = <0x307>;
		};

		gpio217_pmx_func {
			pinctrl-v500,pad = <0x9c 0x01>;
			pinctrl-v500,mux = <0xfb22809c 0x01>;
			phandle = <0x308>;
		};

		gpio217_pmx_idle {
			pinctrl-v500,pad = <0x9c 0x01>;
			pinctrl-v500,mux = <0xfb22809c 0x01>;
			phandle = <0x309>;
		};

		gpio218_pmx_func {
			pinctrl-v500,pad = <0xa0 0x01>;
			pinctrl-v500,mux = <0xfb2280a0 0x01>;
			phandle = <0x30a>;
		};

		gpio218_pmx_idle {
			pinctrl-v500,pad = <0xa0 0x01>;
			pinctrl-v500,mux = <0xfb2280a0 0x01>;
			phandle = <0x30b>;
		};

		gpio219_pmx_func {
			pinctrl-v500,pad = <0x76c 0x00>;
			pinctrl-v500,mux = <0xfb22876c 0x00>;
			phandle = <0x30c>;
		};

		gpio219_pmx_idle {
			pinctrl-v500,pad = <0x76c 0x00>;
			pinctrl-v500,mux = <0xfb22876c 0x00>;
			phandle = <0x30d>;
		};

		gpio220_pmx_func {
			pinctrl-v500,pad = <0x770 0x02>;
			pinctrl-v500,mux = <0xfb228770 0x02>;
			phandle = <0x30e>;
		};

		gpio220_pmx_idle {
			pinctrl-v500,pad = <0x770 0x02>;
			pinctrl-v500,mux = <0xfb228770 0x02>;
			phandle = <0x30f>;
		};

		gpio221_pmx_func {
			pinctrl-v500,pad = <0x774 0x02>;
			pinctrl-v500,mux = <0xfb228774 0x02>;
			phandle = <0x310>;
		};

		gpio221_pmx_idle {
			pinctrl-v500,pad = <0x774 0x02>;
			pinctrl-v500,mux = <0xfb228774 0x02>;
			phandle = <0x311>;
		};

		gpio222_pmx_func {
			pinctrl-v500,pad = <0x778 0x00>;
			pinctrl-v500,mux = <0xfb228778 0x00>;
			phandle = <0x312>;
		};

		gpio222_pmx_idle {
			pinctrl-v500,pad = <0x778 0x00>;
			pinctrl-v500,mux = <0xfb228778 0x00>;
			phandle = <0x313>;
		};

		gpio223_pmx_func {
			pinctrl-v500,pad = <0x77c 0x00>;
			pinctrl-v500,mux = <0xfb22877c 0x00>;
			phandle = <0x314>;
		};

		gpio223_pmx_idle {
			pinctrl-v500,pad = <0x77c 0x00>;
			pinctrl-v500,mux = <0xfb22877c 0x00>;
			phandle = <0x315>;
		};

		gpio224_pmx_func {
			pinctrl-v500,pad = <0xa4 0x01>;
			pinctrl-v500,mux = <0xfb2280a4 0x01>;
			phandle = <0x316>;
		};

		gpio224_pmx_idle {
			pinctrl-v500,pad = <0xa4 0x01>;
			pinctrl-v500,mux = <0xfb2280a4 0x01>;
			phandle = <0x317>;
		};

		gpio225_pmx_func {
			pinctrl-v500,pad = <0x780 0x00>;
			pinctrl-v500,mux = <0xfb228780 0x00>;
			phandle = <0x318>;
		};

		gpio225_pmx_idle {
			pinctrl-v500,pad = <0x780 0x00>;
			pinctrl-v500,mux = <0xfb228780 0x00>;
			phandle = <0x319>;
		};

		gpio226_pmx_func {
			pinctrl-v500,pad = <0x784 0x00>;
			pinctrl-v500,mux = <0xfb228784 0x00>;
			phandle = <0xb2>;
		};

		gpio226_pmx_idle {
			pinctrl-v500,pad = <0x784 0x00>;
			pinctrl-v500,mux = <0xfb228784 0x00>;
			phandle = <0xb8>;
		};

		gpio227_pmx_func {
			pinctrl-v500,pad = <0x788 0x00>;
			pinctrl-v500,mux = <0xfb228788 0x00>;
			phandle = <0xb3>;
		};

		gpio227_pmx_idle {
			pinctrl-v500,pad = <0x788 0x00>;
			pinctrl-v500,mux = <0xfb228788 0x00>;
			phandle = <0xb9>;
		};

		gpio228_pmx_func {
			pinctrl-v500,pad = <0x78c 0x00>;
			pinctrl-v500,mux = <0xfb22878c 0x00>;
			phandle = <0xb4>;
		};

		gpio228_pmx_idle {
			pinctrl-v500,pad = <0x78c 0x00>;
			pinctrl-v500,mux = <0xfb22878c 0x00>;
			phandle = <0xba>;
		};

		gpio230_pmx_func {
			pinctrl-v500,pad = <0x794 0x04>;
			pinctrl-v500,mux = <0xfb228794 0x04>;
			phandle = <0x52>;
		};

		gpio230_pmx_idle {
			pinctrl-v500,pad = <0x794 0x04>;
			pinctrl-v500,mux = <0xfb228794 0x04>;
			phandle = <0x56>;
		};

		gpio231_pmx_func {
			pinctrl-v500,pad = <0x798 0x04>;
			pinctrl-v500,mux = <0xfb228798 0x04>;
			phandle = <0x53>;
		};

		gpio231_pmx_idle {
			pinctrl-v500,pad = <0x798 0x04>;
			pinctrl-v500,mux = <0xfb228798 0x04>;
			phandle = <0x57>;
		};

		gpio235_pmx_func {
			pinctrl-v500,pad = <0xb4 0x01>;
			pinctrl-v500,mux = <0xfb2280b4 0x01>;
			phandle = <0x31a>;
		};

		gpio235_pmx_idle {
			pinctrl-v500,pad = <0xb4 0x01>;
			pinctrl-v500,mux = <0xfb2280b4 0x01>;
			phandle = <0x31b>;
		};

		gpio236_pmx_func {
			pinctrl-v500,pad = <0xb8 0x01>;
			pinctrl-v500,mux = <0xfb2280b8 0x01>;
			phandle = <0x31c>;
		};

		gpio236_pmx_idle {
			pinctrl-v500,pad = <0xb8 0x01>;
			pinctrl-v500,mux = <0xfb2280b8 0x01>;
			phandle = <0x31d>;
		};

		gpio237_pmx_func {
			pinctrl-v500,pad = <0xbc 0x00>;
			pinctrl-v500,mux = <0xfb2280bc 0x00>;
			phandle = <0x31e>;
		};

		gpio237_pmx_idle {
			pinctrl-v500,pad = <0xbc 0x00>;
			pinctrl-v500,mux = <0xfb2280bc 0x00>;
			phandle = <0x31f>;
		};

		gpio238_pmx_func {
			pinctrl-v500,pad = <0xc0 0x00>;
			pinctrl-v500,mux = <0xfb2280c0 0x00>;
			phandle = <0x320>;
		};

		gpio238_pmx_idle {
			pinctrl-v500,pad = <0xc0 0x00>;
			pinctrl-v500,mux = <0xfb2280c0 0x00>;
			phandle = <0x321>;
		};

		gpio239_pmx_func {
			pinctrl-v500,pad = <0x79c 0x00>;
			pinctrl-v500,mux = <0xfb22879c 0x00>;
			phandle = <0x322>;
		};

		gpio239_pmx_idle {
			pinctrl-v500,pad = <0x79c 0x00>;
			pinctrl-v500,mux = <0xfb22879c 0x00>;
			phandle = <0x323>;
		};

		gpio240_pmx_func {
			pinctrl-v500,pad = <0x7a0 0x00>;
			pinctrl-v500,mux = <0xfb2287a0 0x00>;
			phandle = <0x324>;
		};

		gpio240_pmx_idle {
			pinctrl-v500,pad = <0x7a0 0x00>;
			pinctrl-v500,mux = <0xfb2287a0 0x00>;
			phandle = <0x325>;
		};

		gpio241_pmx_func {
			pinctrl-v500,pad = <0x7a4 0x00>;
			pinctrl-v500,mux = <0xfb2287a4 0x00>;
			phandle = <0x326>;
		};

		gpio241_pmx_idle {
			pinctrl-v500,pad = <0x7a4 0x00>;
			pinctrl-v500,mux = <0xfb2287a4 0x00>;
			phandle = <0x327>;
		};

		gpio242_pmx_func {
			pinctrl-v500,pad = <0x7a8 0x00>;
			pinctrl-v500,mux = <0xfb2287a8 0x00>;
			phandle = <0x328>;
		};

		gpio242_pmx_idle {
			pinctrl-v500,pad = <0x7a8 0x00>;
			pinctrl-v500,mux = <0xfb2287a8 0x00>;
			phandle = <0x329>;
		};

		gpio243_pmx_func {
			pinctrl-v500,pad = <0xc4 0x01>;
			pinctrl-v500,mux = <0xfb2280c4 0x01>;
			phandle = <0x66>;
		};

		gpio243_pmx_idle {
			pinctrl-v500,pad = <0xc4 0x01>;
			pinctrl-v500,mux = <0xfb2280c4 0x01>;
			phandle = <0x6e>;
		};

		gpio244_pmx_func {
			pinctrl-v500,pad = <0xc8 0x01>;
			pinctrl-v500,mux = <0xfb2280c8 0x01>;
			phandle = <0x67>;
		};

		gpio244_pmx_idle {
			pinctrl-v500,pad = <0xc8 0x01>;
			pinctrl-v500,mux = <0xfb2280c8 0x01>;
			phandle = <0x6f>;
		};

		gpio245_pmx_func {
			pinctrl-v500,pad = <0xcc 0x00>;
			pinctrl-v500,mux = <0xfb2280cc 0x00>;
			phandle = <0x68>;
		};

		gpio245_pmx_idle {
			pinctrl-v500,pad = <0xcc 0x00>;
			pinctrl-v500,mux = <0xfb2280cc 0x00>;
			phandle = <0x70>;
		};

		gpio246_pmx_func {
			pinctrl-v500,pad = <0xd0 0x00>;
			pinctrl-v500,mux = <0xfb2280d0 0x00>;
			phandle = <0x69>;
		};

		gpio246_pmx_idle {
			pinctrl-v500,pad = <0xd0 0x00>;
			pinctrl-v500,mux = <0xfb2280d0 0x00>;
			phandle = <0x71>;
		};

		gpio247_pmx_func {
			pinctrl-v500,pad = <0xd4 0x01>;
			pinctrl-v500,mux = <0xfb2280d4 0x01>;
			phandle = <0x32a>;
		};

		gpio247_pmx_idle {
			pinctrl-v500,pad = <0xd4 0x01>;
			pinctrl-v500,mux = <0xfb2280d4 0x01>;
			phandle = <0x32b>;
		};

		gpio248_pmx_func {
			pinctrl-v500,pad = <0xd8 0x01>;
			pinctrl-v500,mux = <0xfb2280d8 0x01>;
			phandle = <0x32c>;
		};

		gpio248_pmx_idle {
			pinctrl-v500,pad = <0xd8 0x01>;
			pinctrl-v500,mux = <0xfb2280d8 0x01>;
			phandle = <0x32d>;
		};

		gpio249_pmx_func {
			pinctrl-v500,pad = <0xdc 0x01>;
			pinctrl-v500,mux = <0xfb2280dc 0x01>;
			phandle = <0x32e>;
		};

		gpio249_pmx_idle {
			pinctrl-v500,pad = <0xdc 0x01>;
			pinctrl-v500,mux = <0xfb2280dc 0x01>;
			phandle = <0x32f>;
		};

		gpio250_pmx_func {
			pinctrl-v500,pad = <0xe0 0x01>;
			pinctrl-v500,mux = <0xfb2280e0 0x01>;
			phandle = <0x330>;
		};

		gpio250_pmx_idle {
			pinctrl-v500,pad = <0xe0 0x01>;
			pinctrl-v500,mux = <0xfb2280e0 0x01>;
			phandle = <0x331>;
		};

		gpio251_pmx_func {
			pinctrl-v500,pad = <0xe4 0x00>;
			pinctrl-v500,mux = <0xfb2280e4 0x00>;
			phandle = <0x332>;
		};

		gpio251_pmx_idle {
			pinctrl-v500,pad = <0xe4 0x00>;
			pinctrl-v500,mux = <0xfb2280e4 0x00>;
			phandle = <0x333>;
		};

		gpio252_pmx_func {
			pinctrl-v500,pad = <0xe8 0x01>;
			pinctrl-v500,mux = <0xfb2280e8 0x01>;
			phandle = <0x334>;
		};

		gpio252_pmx_idle {
			pinctrl-v500,pad = <0xe8 0x01>;
			pinctrl-v500,mux = <0xfb2280e8 0x01>;
			phandle = <0x335>;
		};

		gpio253_pmx_func {
			pinctrl-v500,pad = <0xec 0x01>;
			pinctrl-v500,mux = <0xfb2280ec 0x01>;
			phandle = <0x336>;
		};

		gpio253_pmx_idle {
			pinctrl-v500,pad = <0xec 0x01>;
			pinctrl-v500,mux = <0xfb2280ec 0x01>;
			phandle = <0x337>;
		};

		gpio254_pmx_func {
			pinctrl-v500,pad = <0xf0 0x01>;
			pinctrl-v500,mux = <0xfb2280f0 0x01>;
			phandle = <0x338>;
		};

		gpio254_pmx_idle {
			pinctrl-v500,pad = <0xf0 0x01>;
			pinctrl-v500,mux = <0xfb2280f0 0x01>;
			phandle = <0x339>;
		};

		gpio255_pmx_func {
			pinctrl-v500,pad = <0xf4 0x01>;
			pinctrl-v500,mux = <0xfb2280f4 0x01>;
			phandle = <0x33a>;
		};

		gpio255_pmx_idle {
			pinctrl-v500,pad = <0xf4 0x01>;
			pinctrl-v500,mux = <0xfb2280f4 0x01>;
			phandle = <0x33b>;
		};

		gpio256_pmx_func {
			pinctrl-v500,pad = <0x7ac 0x01>;
			pinctrl-v500,mux = <0xfb2287ac 0x01>;
			phandle = <0x31>;
		};

		gpio256_pmx_idle {
			pinctrl-v500,pad = <0x7ac 0x01>;
			pinctrl-v500,mux = <0xfb2287ac 0x01>;
			phandle = <0x35>;
		};

		gpio257_pmx_func {
			pinctrl-v500,pad = <0x7b0 0x01>;
			pinctrl-v500,mux = <0xfb2287b0 0x01>;
			phandle = <0x32>;
		};

		gpio257_pmx_idle {
			pinctrl-v500,pad = <0x7b0 0x01>;
			pinctrl-v500,mux = <0xfb2287b0 0x01>;
			phandle = <0x36>;
		};

		gpio258_pmx_func {
			pinctrl-v500,pad = <0xf8 0x00>;
			pinctrl-v500,mux = <0xfb2280f8 0x00>;
			phandle = <0x33c>;
		};

		gpio258_pmx_idle {
			pinctrl-v500,pad = <0xf8 0x00>;
			pinctrl-v500,mux = <0xfb2280f8 0x00>;
			phandle = <0x33d>;
		};
	};

	pinmux@fb229800 {
		compatible = "pinconf-v500";
		reg = <0x00 0xfb229800 0x00 0x7b4>;
		pinctrl-v500,register-width = <0x20>;
		#pinctrl-cells = <0x01>;
		phandle = <0x33e>;

		gpio160_cfg_func {
			pinctrl-v500,pad = <0x18 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x33f>;
		};

		gpio160_cfg_idle {
			pinctrl-v500,pad = <0x18 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x340>;
		};

		gpio161_cfg_func {
			pinctrl-v500,pad = <0x1c 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x341>;
		};

		gpio161_cfg_idle {
			pinctrl-v500,pad = <0x1c 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x342>;
		};

		gpio162_cfg_func {
			pinctrl-v500,pad = <0x20 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x343>;
		};

		gpio162_cfg_idle {
			pinctrl-v500,pad = <0x20 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x344>;
		};

		gpio163_cfg_func {
			pinctrl-v500,pad = <0x24 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x345>;
		};

		gpio163_cfg_idle {
			pinctrl-v500,pad = <0x24 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x346>;
		};

		gpio164_cfg_func {
			pinctrl-v500,pad = <0x700 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x01 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x347>;
		};

		gpio164_cfg_idle {
			pinctrl-v500,pad = <0x700 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x01 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x348>;
		};

		gpio165_cfg_func {
			pinctrl-v500,pad = <0x704 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x349>;
		};

		gpio165_cfg_idle {
			pinctrl-v500,pad = <0x704 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x34a>;
		};

		gpio166_cfg_func {
			pinctrl-v500,pad = <0x708 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x34b>;
		};

		gpio166_cfg_idle {
			pinctrl-v500,pad = <0x708 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x34c>;
		};

		gpio167_cfg_func {
			pinctrl-v500,pad = <0x70c 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x34d>;
		};

		gpio167_cfg_idle {
			pinctrl-v500,pad = <0x70c 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x34e>;
		};

		gpio168_cfg_func {
			pinctrl-v500,pad = <0x710 0x00>;
			pinctrl-v500,bias-pulldown = <0x02 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x34f>;
		};

		gpio168_cfg_idle {
			pinctrl-v500,pad = <0x710 0x00>;
			pinctrl-v500,bias-pulldown = <0x02 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x350>;
		};

		gpio169_cfg_func {
			pinctrl-v500,pad = <0x714 0x00>;
			pinctrl-v500,bias-pulldown = <0x02 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x351>;
		};

		gpio169_cfg_idle {
			pinctrl-v500,pad = <0x714 0x00>;
			pinctrl-v500,bias-pulldown = <0x02 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x352>;
		};

		gpio170_cfg_func {
			pinctrl-v500,pad = <0x718 0x00>;
			pinctrl-v500,bias-pulldown = <0x02 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x353>;
		};

		gpio170_cfg_idle {
			pinctrl-v500,pad = <0x718 0x00>;
			pinctrl-v500,bias-pulldown = <0x02 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x354>;
		};

		gpio171_cfg_func {
			pinctrl-v500,pad = <0x71c 0x00>;
			pinctrl-v500,bias-pulldown = <0x02 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x355>;
		};

		gpio171_cfg_idle {
			pinctrl-v500,pad = <0x71c 0x00>;
			pinctrl-v500,bias-pulldown = <0x02 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x356>;
		};

		gpio172_cfg_func {
			pinctrl-v500,pad = <0x720 0x00>;
			pinctrl-v500,bias-pulldown = <0x02 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x357>;
		};

		gpio172_cfg_idle {
			pinctrl-v500,pad = <0x720 0x00>;
			pinctrl-v500,bias-pulldown = <0x02 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x358>;
		};

		gpio173_cfg_func {
			pinctrl-v500,pad = <0x724 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0xa8>;
		};

		gpio173_cfg_idle {
			pinctrl-v500,pad = <0x724 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0xae>;
		};

		gpio174_cfg_func {
			pinctrl-v500,pad = <0x728 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0xa9>;
		};

		gpio174_cfg_idle {
			pinctrl-v500,pad = <0x728 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0xaf>;
		};

		gpio175_cfg_func {
			pinctrl-v500,pad = <0x72c 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0xaa>;
		};

		gpio175_cfg_idle {
			pinctrl-v500,pad = <0x72c 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0xb0>;
		};

		gpio176_cfg_func {
			pinctrl-v500,pad = <0x28 0x00>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x359>;
		};

		gpio176_cfg_idle {
			pinctrl-v500,pad = <0x28 0x00>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x35a>;
		};

		gpio177_cfg_func {
			pinctrl-v500,pad = <0x730 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x35b>;
		};

		gpio177_cfg_idle {
			pinctrl-v500,pad = <0x730 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x35c>;
		};

		gpio178_cfg_func {
			pinctrl-v500,pad = <0x734 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x01 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x35d>;
		};

		gpio178_cfg_idle {
			pinctrl-v500,pad = <0x734 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x01 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x35e>;
		};

		gpio179_cfg_func {
			pinctrl-v500,pad = <0x738 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x35f>;
		};

		gpio179_cfg_idle {
			pinctrl-v500,pad = <0x738 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x360>;
		};

		gpio180_cfg_func {
			pinctrl-v500,pad = <0x73c 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x361>;
		};

		gpio180_cfg_idle {
			pinctrl-v500,pad = <0x73c 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x362>;
		};

		gpio181_cfg_func {
			pinctrl-v500,pad = <0x740 0x00>;
			pinctrl-v500,bias-pulldown = <0x02 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x363>;
		};

		gpio181_cfg_idle {
			pinctrl-v500,pad = <0x740 0x00>;
			pinctrl-v500,bias-pulldown = <0x02 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x364>;
		};

		gpio182_cfg_func {
			pinctrl-v500,pad = <0x2c 0x00>;
			pinctrl-v500,bias-pulldown = <0x02 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x365>;
		};

		gpio182_cfg_idle {
			pinctrl-v500,pad = <0x2c 0x00>;
			pinctrl-v500,bias-pulldown = <0x02 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x366>;
		};

		gpio183_cfg_func {
			pinctrl-v500,pad = <0x30 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x367>;
		};

		gpio183_cfg_idle {
			pinctrl-v500,pad = <0x30 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x368>;
		};

		gpio184_cfg_func {
			pinctrl-v500,pad = <0x34 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x369>;
		};

		gpio184_cfg_idle {
			pinctrl-v500,pad = <0x34 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x36a>;
		};

		gpio185_cfg_func {
			pinctrl-v500,pad = <0x38 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x36b>;
		};

		gpio185_cfg_idle {
			pinctrl-v500,pad = <0x38 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x36c>;
		};

		gpio186_cfg_func {
			pinctrl-v500,pad = <0x3c 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x36d>;
		};

		gpio186_cfg_idle {
			pinctrl-v500,pad = <0x3c 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x36e>;
		};

		gpio187_cfg_func {
			pinctrl-v500,pad = <0x40 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x36f>;
		};

		gpio187_cfg_idle {
			pinctrl-v500,pad = <0x40 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x370>;
		};

		gpio188_cfg_func {
			pinctrl-v500,pad = <0x44 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x371>;
		};

		gpio188_cfg_idle {
			pinctrl-v500,pad = <0x44 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x372>;
		};

		gpio189_cfg_func {
			pinctrl-v500,pad = <0x48 0x00>;
			pinctrl-v500,bias-pulldown = <0x02 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x373>;
		};

		gpio189_cfg_idle {
			pinctrl-v500,pad = <0x48 0x00>;
			pinctrl-v500,bias-pulldown = <0x02 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x374>;
		};

		gpio190_cfg_func {
			pinctrl-v500,pad = <0x4c 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x375>;
		};

		gpio190_cfg_idle {
			pinctrl-v500,pad = <0x4c 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x376>;
		};

		gpio191_cfg_func {
			pinctrl-v500,pad = <0x50 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x377>;
		};

		gpio191_cfg_idle {
			pinctrl-v500,pad = <0x50 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x378>;
		};

		gpio192_cfg_func {
			pinctrl-v500,pad = <0x54 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x379>;
		};

		gpio192_cfg_idle {
			pinctrl-v500,pad = <0x54 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x37a>;
		};

		gpio193_cfg_func {
			pinctrl-v500,pad = <0x58 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x37b>;
		};

		gpio193_cfg_idle {
			pinctrl-v500,pad = <0x58 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x37c>;
		};

		gpio194_cfg_func {
			pinctrl-v500,pad = <0x5c 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x37d>;
		};

		gpio194_cfg_idle {
			pinctrl-v500,pad = <0x5c 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x37e>;
		};

		gpio195_cfg_func {
			pinctrl-v500,pad = <0x60 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x01 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x37f>;
		};

		gpio195_cfg_idle {
			pinctrl-v500,pad = <0x60 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x01 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x380>;
		};

		gpio196_cfg_func {
			pinctrl-v500,pad = <0x64 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x381>;
		};

		gpio196_cfg_idle {
			pinctrl-v500,pad = <0x64 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x382>;
		};

		gpio197_cfg_func {
			pinctrl-v500,pad = <0x68 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x383>;
		};

		gpio197_cfg_idle {
			pinctrl-v500,pad = <0x68 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x384>;
		};

		gpio198_cfg_func {
			pinctrl-v500,pad = <0x744 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x385>;
		};

		gpio198_cfg_idle {
			pinctrl-v500,pad = <0x744 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x386>;
		};

		gpio199_cfg_func {
			pinctrl-v500,pad = <0x748 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x387>;
		};

		gpio199_cfg_idle {
			pinctrl-v500,pad = <0x748 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x388>;
		};

		gpio200_cfg_func {
			pinctrl-v500,pad = <0x74c 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x389>;
		};

		gpio200_cfg_idle {
			pinctrl-v500,pad = <0x74c 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x38a>;
		};

		gpio201_cfg_func {
			pinctrl-v500,pad = <0x750 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x38b>;
		};

		gpio201_cfg_idle {
			pinctrl-v500,pad = <0x750 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x38c>;
		};

		gpio202_cfg_func {
			pinctrl-v500,pad = <0x6c 0x00>;
			pinctrl-v500,bias-pulldown = <0x02 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x38d>;
		};

		gpio202_cfg_idle {
			pinctrl-v500,pad = <0x6c 0x00>;
			pinctrl-v500,bias-pulldown = <0x02 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x38e>;
		};

		gpio203_cfg_func {
			pinctrl-v500,pad = <0x754 0x00>;
			pinctrl-v500,bias-pulldown = <0x02 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x38f>;
		};

		gpio203_cfg_idle {
			pinctrl-v500,pad = <0x754 0x00>;
			pinctrl-v500,bias-pulldown = <0x02 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x390>;
		};

		gpio204_cfg_func {
			pinctrl-v500,pad = <0x758 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x391>;
		};

		gpio204_cfg_idle {
			pinctrl-v500,pad = <0x758 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x392>;
		};

		gpio205_cfg_func {
			pinctrl-v500,pad = <0x75c 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x393>;
		};

		gpio205_cfg_idle {
			pinctrl-v500,pad = <0x75c 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x394>;
		};

		gpio206_cfg_func {
			pinctrl-v500,pad = <0x760 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x395>;
		};

		gpio206_cfg_idle {
			pinctrl-v500,pad = <0x760 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x396>;
		};

		gpio207_cfg_func {
			pinctrl-v500,pad = <0x70 0x00>;
			pinctrl-v500,bias-pulldown = <0x02 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x397>;
		};

		gpio207_cfg_idle {
			pinctrl-v500,pad = <0x70 0x00>;
			pinctrl-v500,bias-pulldown = <0x02 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x398>;
		};

		gpio208_cfg_func {
			pinctrl-v500,pad = <0x764 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x399>;
		};

		gpio208_cfg_idle {
			pinctrl-v500,pad = <0x764 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x39a>;
		};

		gpio209_cfg_func {
			pinctrl-v500,pad = <0x80 0x00>;
			phandle = <0x39b>;
		};

		gpio209_cfg_idle {
			pinctrl-v500,pad = <0x80 0x00>;
			phandle = <0x39c>;
		};

		gpio210_cfg_func {
			pinctrl-v500,pad = <0x84 0x00>;
			phandle = <0x39d>;
		};

		gpio210_cfg_idle {
			pinctrl-v500,pad = <0x84 0x00>;
			phandle = <0x39e>;
		};

		gpio211_cfg_func {
			pinctrl-v500,pad = <0x88 0x00>;
			phandle = <0x39f>;
		};

		gpio211_cfg_idle {
			pinctrl-v500,pad = <0x88 0x00>;
			phandle = <0x3a0>;
		};

		gpio212_cfg_func {
			pinctrl-v500,pad = <0x8c 0x00>;
			phandle = <0x3a1>;
		};

		gpio212_cfg_idle {
			pinctrl-v500,pad = <0x8c 0x00>;
			phandle = <0x3a2>;
		};

		gpio213_cfg_func {
			pinctrl-v500,pad = <0x90 0x00>;
			phandle = <0x3a3>;
		};

		gpio213_cfg_idle {
			pinctrl-v500,pad = <0x90 0x00>;
			phandle = <0x3a4>;
		};

		gpio214_cfg_func {
			pinctrl-v500,pad = <0x768 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x3a5>;
		};

		gpio214_cfg_idle {
			pinctrl-v500,pad = <0x768 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x3a6>;
		};

		gpio215_cfg_func {
			pinctrl-v500,pad = <0x94 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x3a7>;
		};

		gpio215_cfg_idle {
			pinctrl-v500,pad = <0x94 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x3a8>;
		};

		gpio216_cfg_func {
			pinctrl-v500,pad = <0x98 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x3a9>;
		};

		gpio216_cfg_idle {
			pinctrl-v500,pad = <0x98 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x3aa>;
		};

		gpio217_cfg_func {
			pinctrl-v500,pad = <0x9c 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x3ab>;
		};

		gpio217_cfg_idle {
			pinctrl-v500,pad = <0x9c 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x3ac>;
		};

		gpio218_cfg_func {
			pinctrl-v500,pad = <0xa0 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x3ad>;
		};

		gpio218_cfg_idle {
			pinctrl-v500,pad = <0xa0 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x3ae>;
		};

		gpio219_cfg_func {
			pinctrl-v500,pad = <0x76c 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x01 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x3af>;
		};

		gpio219_cfg_idle {
			pinctrl-v500,pad = <0x76c 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x01 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x3b0>;
		};

		gpio220_cfg_func {
			pinctrl-v500,pad = <0x770 0x00>;
			pinctrl-v500,bias-pulldown = <0x02 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x3b1>;
		};

		gpio220_cfg_idle {
			pinctrl-v500,pad = <0x770 0x00>;
			pinctrl-v500,bias-pulldown = <0x02 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x3b2>;
		};

		gpio221_cfg_func {
			pinctrl-v500,pad = <0x774 0x00>;
			pinctrl-v500,bias-pulldown = <0x02 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x3b3>;
		};

		gpio221_cfg_idle {
			pinctrl-v500,pad = <0x774 0x00>;
			pinctrl-v500,bias-pulldown = <0x02 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x3b4>;
		};

		gpio222_cfg_func {
			pinctrl-v500,pad = <0x778 0x00>;
			pinctrl-v500,bias-pulldown = <0x02 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x3b5>;
		};

		gpio222_cfg_idle {
			pinctrl-v500,pad = <0x778 0x00>;
			pinctrl-v500,bias-pulldown = <0x02 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x3b6>;
		};

		gpio223_cfg_func {
			pinctrl-v500,pad = <0x77c 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x3b7>;
		};

		gpio223_cfg_idle {
			pinctrl-v500,pad = <0x77c 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x3b8>;
		};

		gpio224_cfg_func {
			pinctrl-v500,pad = <0xa4 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x10 0x70>;
			phandle = <0x3b9>;
		};

		gpio224_cfg_idle {
			pinctrl-v500,pad = <0xa4 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x10 0x70>;
			phandle = <0x3ba>;
		};

		gpio225_cfg_func {
			pinctrl-v500,pad = <0x780 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x3bb>;
		};

		gpio225_cfg_idle {
			pinctrl-v500,pad = <0x780 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x3bc>;
		};

		gpio226_cfg_func {
			pinctrl-v500,pad = <0x784 0x00>;
			pinctrl-v500,bias-pulldown = <0x02 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0xb5>;
		};

		gpio226_cfg_idle {
			pinctrl-v500,pad = <0x784 0x00>;
			pinctrl-v500,bias-pulldown = <0x02 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0xbb>;
		};

		gpio227_cfg_func {
			pinctrl-v500,pad = <0x788 0x00>;
			pinctrl-v500,bias-pulldown = <0x02 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0xb6>;
		};

		gpio227_cfg_idle {
			pinctrl-v500,pad = <0x788 0x00>;
			pinctrl-v500,bias-pulldown = <0x02 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0xbc>;
		};

		gpio228_cfg_func {
			pinctrl-v500,pad = <0x78c 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x01 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0xb7>;
		};

		gpio228_cfg_idle {
			pinctrl-v500,pad = <0x78c 0x00>;
			pinctrl-v500,bias-pulldown = <0x02 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0xbd>;
		};

		gpio230_cfg_func {
			pinctrl-v500,pad = <0x794 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x54>;
		};

		gpio230_cfg_idle {
			pinctrl-v500,pad = <0x794 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x58>;
		};

		gpio231_cfg_func {
			pinctrl-v500,pad = <0x798 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x55>;
		};

		gpio231_cfg_idle {
			pinctrl-v500,pad = <0x798 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x59>;
		};

		gpio234_cfg_func {
			pinctrl-v500,pad = <0xb0 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x3bd>;
		};

		gpio234_cfg_idle {
			pinctrl-v500,pad = <0xb0 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x3be>;
		};

		gpio235_cfg_func {
			pinctrl-v500,pad = <0xb4 0x00>;
			pinctrl-v500,bias-pulldown = <0x02 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x3bf>;
		};

		gpio235_cfg_idle {
			pinctrl-v500,pad = <0xb4 0x00>;
			pinctrl-v500,bias-pulldown = <0x02 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x3c0>;
		};

		gpio236_cfg_func {
			pinctrl-v500,pad = <0xb8 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x01 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x3c1>;
		};

		gpio236_cfg_idle {
			pinctrl-v500,pad = <0xb8 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x01 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x3c2>;
		};

		gpio237_cfg_func {
			pinctrl-v500,pad = <0xbc 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x01 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x3c3>;
		};

		gpio237_cfg_idle {
			pinctrl-v500,pad = <0xbc 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x01 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x3c4>;
		};

		gpio238_cfg_func {
			pinctrl-v500,pad = <0xc0 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x01 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x3c5>;
		};

		gpio238_cfg_idle {
			pinctrl-v500,pad = <0xc0 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x01 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x3c6>;
		};

		gpio239_cfg_func {
			pinctrl-v500,pad = <0x79c 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x01 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x3c7>;
		};

		gpio239_cfg_idle {
			pinctrl-v500,pad = <0x79c 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x01 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x3c8>;
		};

		gpio240_cfg_func {
			pinctrl-v500,pad = <0x7a0 0x00>;
			pinctrl-v500,bias-pulldown = <0x02 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x3c9>;
		};

		gpio240_cfg_idle {
			pinctrl-v500,pad = <0x7a0 0x00>;
			pinctrl-v500,bias-pulldown = <0x02 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x3ca>;
		};

		gpio241_cfg_func {
			pinctrl-v500,pad = <0x7a4 0x00>;
			pinctrl-v500,bias-pulldown = <0x02 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x3cb>;
		};

		gpio241_cfg_idle {
			pinctrl-v500,pad = <0x7a4 0x00>;
			pinctrl-v500,bias-pulldown = <0x02 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x3cc>;
		};

		gpio242_cfg_func {
			pinctrl-v500,pad = <0x7a8 0x00>;
			pinctrl-v500,bias-pulldown = <0x02 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x3cd>;
		};

		gpio242_cfg_idle {
			pinctrl-v500,pad = <0x7a8 0x00>;
			pinctrl-v500,bias-pulldown = <0x02 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x3ce>;
		};

		gpio243_cfg_func {
			pinctrl-v500,pad = <0xc4 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x01 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x6a>;
		};

		gpio243_cfg_idle {
			pinctrl-v500,pad = <0xc4 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x01 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x72>;
		};

		gpio244_cfg_func {
			pinctrl-v500,pad = <0xc8 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x6b>;
		};

		gpio244_cfg_idle {
			pinctrl-v500,pad = <0xc8 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x73>;
		};

		gpio245_cfg_func {
			pinctrl-v500,pad = <0xcc 0x00>;
			pinctrl-v500,bias-pulldown = <0x02 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			phandle = <0x6c>;
		};

		gpio245_cfg_idle {
			pinctrl-v500,pad = <0xcc 0x00>;
			pinctrl-v500,bias-pulldown = <0x02 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			phandle = <0x74>;
		};

		gpio246_cfg_func {
			pinctrl-v500,pad = <0xd0 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x6d>;
		};

		gpio246_cfg_idle {
			pinctrl-v500,pad = <0xd0 0x00>;
			pinctrl-v500,bias-pulldown = <0x02 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x75>;
		};

		gpio247_cfg_func {
			pinctrl-v500,pad = <0xd4 0x00>;
			pinctrl-v500,bias-pulldown = <0x02 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x3cf>;
		};

		gpio247_cfg_idle {
			pinctrl-v500,pad = <0xd4 0x00>;
			pinctrl-v500,bias-pulldown = <0x02 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x3d0>;
		};

		gpio248_cfg_func {
			pinctrl-v500,pad = <0xd8 0x00>;
			pinctrl-v500,bias-pulldown = <0x02 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x3d1>;
		};

		gpio248_cfg_idle {
			pinctrl-v500,pad = <0xd8 0x00>;
			pinctrl-v500,bias-pulldown = <0x02 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x3d2>;
		};

		gpio249_cfg_func {
			pinctrl-v500,pad = <0xdc 0x00>;
			pinctrl-v500,bias-pulldown = <0x02 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x3d3>;
		};

		gpio249_cfg_idle {
			pinctrl-v500,pad = <0xdc 0x00>;
			pinctrl-v500,bias-pulldown = <0x02 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x3d4>;
		};

		gpio250_cfg_func {
			pinctrl-v500,pad = <0xe0 0x00>;
			pinctrl-v500,bias-pulldown = <0x02 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x3d5>;
		};

		gpio250_cfg_idle {
			pinctrl-v500,pad = <0xe0 0x00>;
			pinctrl-v500,bias-pulldown = <0x02 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x3d6>;
		};

		gpio251_cfg_func {
			pinctrl-v500,pad = <0xe4 0x00>;
			pinctrl-v500,bias-pulldown = <0x02 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x3d7>;
		};

		gpio251_cfg_idle {
			pinctrl-v500,pad = <0xe4 0x00>;
			pinctrl-v500,bias-pulldown = <0x02 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x3d8>;
		};

		gpio252_cfg_func {
			pinctrl-v500,pad = <0xe8 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x3d9>;
		};

		gpio252_cfg_idle {
			pinctrl-v500,pad = <0xe8 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x3da>;
		};

		gpio253_cfg_func {
			pinctrl-v500,pad = <0xec 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x3db>;
		};

		gpio253_cfg_idle {
			pinctrl-v500,pad = <0xec 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x3dc>;
		};

		gpio254_cfg_func {
			pinctrl-v500,pad = <0xf0 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x3dd>;
		};

		gpio254_cfg_idle {
			pinctrl-v500,pad = <0xf0 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x3de>;
		};

		gpio255_cfg_func {
			pinctrl-v500,pad = <0xf4 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x3df>;
		};

		gpio255_cfg_idle {
			pinctrl-v500,pad = <0xf4 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x3e0>;
		};

		gpio256_cfg_func {
			pinctrl-v500,pad = <0x7ac 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x33>;
		};

		gpio256_cfg_idle {
			pinctrl-v500,pad = <0x7ac 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x37>;
		};

		gpio257_cfg_func {
			pinctrl-v500,pad = <0x7b0 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x34>;
		};

		gpio257_cfg_idle {
			pinctrl-v500,pad = <0x7b0 0x00>;
			pinctrl-v500,bias-pulldown = <0x00 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x38>;
		};

		gpio258_cfg_func {
			pinctrl-v500,pad = <0xf8 0x00>;
			pinctrl-v500,bias-pulldown = <0x02 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x3e1>;
		};

		gpio258_cfg_idle {
			pinctrl-v500,pad = <0xf8 0x00>;
			pinctrl-v500,bias-pulldown = <0x02 0x02 0x00 0x02>;
			pinctrl-v500,bias-pullup = <0x00 0x01 0x00 0x01>;
			pinctrl-v500,drive-strength = <0x20 0x70>;
			phandle = <0x3e2>;
		};
	};

	amba {
		ranges;
		interrupt-parent = <0x01>;
		compatible = "arm,amba-bus";
		#address-cells = <0x02>;
		#size-cells = <0x02>;
		phandle = <0x3e3>;

		dx_cc63p@fdf0e000 {
			status = "disabled";
			interrupts = <0x00 0x87 0x04>;
			interrupt-parent = <0x01>;
			reg = <0x00 0xfdf0e000 0x00 0x1000>;
			compatible = "dx,cc63p";
		};

		watchdog@fae7c000 {
			status = "ok";
			reg = <0x00 0xfae7c000 0x00 0x1000>;
			compatible = "hisilicon,iomcu-watchdog";
		};

		i2c@FF88B000 {
			#address-cells = <0x01>;
			#size-cells = <0x00>;
			compatible = "hisilicon,hisi-i2c-master";
			reg = <0x00 0xff88b000 0x00 0x1000>;
			interrupts = <0x00 0x164 0x04>;
			clocks = <0x25 0x26>;
			clock-names = "clk_i2c", "apb_pclk";
			delay-off = <0x12c>;
			reset-reg-base = <0x00 0xffb85000 0x00 0x1000>;
			reset-controller-reg = <0x78 0x7c 0x80 0x06>;
			i2c-ioc-base = <0x00 0xff800000 0x00 0x1000>;
			i2c-pad-ioc-base = <0x00 0xff801000 0x00 0x1000>;
			i2c-recover-val = <0x3c 0x02 0x02 0x00>;
			status = "disabled";
			clock-rate = <0x00 0x6acfc00>;
			pinctrl-names = "default", "idle";
			pinctrl-0 = <0x27 0x28 0x29 0x2a>;
			pinctrl-1 = <0x2b 0x2c 0x2d 0x2e>;
			cs-gpios = <0x2f 0x0c 0x00 0x2f 0x0c 0x00>;
			phandle = <0x3e4>;
		};

		i2c@FF88C000 {
			hold-time = <0x430043>;
			#address-cells = <0x01>;
			#size-cells = <0x00>;
			compatible = "hisilicon,hisi-i2c-master";
			reg = <0x00 0xff88c000 0x00 0x1000>;
			interrupts = <0x00 0x165 0x04>;
			clocks = <0x30 0x26>;
			clock-names = "clk_i2c", "apb_pclk";
			delay-off = <0x12c>;
			reset-reg-base = <0x00 0xffb85000 0x00 0x1000>;
			reset-controller-reg = <0x78 0x7c 0x80 0x07>;
			i2c-ioc-base = <0x00 0xfb228000 0x00 0x1000>;
			i2c-pad-ioc-base = <0x00 0xfb229000 0x00 0x1000>;
			i2c-recover-val = <0x7b0 0x01 0x01 0x00>;
			status = "ok";
			clock-rate = <0x00 0x6acfc00>;
			pinctrl-names = "default", "idle";
			pinctrl-0 = <0x31 0x32 0x33 0x34>;
			pinctrl-1 = <0x35 0x36 0x37 0x38>;
			cs-gpios = <0x39 0x00 0x00 0x39 0x01 0x00>;
			phandle = <0x3e5>;

			hwcxext_codec_v1@33 {
				init_regs = <0x6d87 0xff 0x03 0x00 0x01 0x6d84 0xff 0x6c 0x00 0x01 0x7190 0xfff 0x00 0x00 0x01 0x7194 0xfff 0x00 0x00 0x01 0x7198 0xfff 0x00 0x00 0x01 0x719c 0xfff 0x100 0x00 0x01 0x71a0 0xfff 0x2f 0x00 0x01 0x6d85 0xff 0x01 0x00 0x01 0x6d84 0xff 0xec 0x00 0x01 0x6e00 0xffffffff 0x4e7f4e7f 0x00 0x01 0x6e04 0xffffffff 0x88002000 0x00 0x01 0x6e08 0xffffffff 0x88002000 0x00 0x01 0x458 0xff 0x12 0x00 0x01 0x464 0xff 0x12 0x00 0x01 0x420 0xff 0x80 0x00 0x01 0x6e17 0xff 0x13 0x00 0x01 0x7230 0xfff 0xc4 0x00 0x01 0x70b4 0xfff 0x7ff 0x00 0x01 0x70bc 0x83f 0x00 0x00 0x01 0x7100 0xfff 0x40 0x00 0x01 0x43c8 0xff 0x31 0x00 0x01 0x47c8 0xff 0x31 0x00 0x01 0x414 0xff 0x03 0x00 0x01 0x4014 0xff 0x03 0x00 0x01 0x4414 0xff 0x03 0x00 0x01 0x5c14 0xff 0x03 0x00 0x01 0x5c04 0xff 0x01 0x00 0x01 0x5c1c 0xff 0x00 0x00 0x01 0x5814 0xff 0x03 0x00 0x01 0x5804 0xff 0x00 0x00 0x01 0x581c 0xff 0x00 0x00 0x01 0x5820 0xff 0x00 0x00 0x01 0x4fc8 0xff 0x31 0x00 0x01 0x4c04 0xff 0x01 0x00 0x01 0x4c14 0xff 0x03 0x00 0x01 0x5014 0xff 0x03 0x00 0x01 0x6414 0xff 0x03 0x00 0x01 0x641c 0xff 0x01 0x00 0x01 0x6580 0xff 0x01 0x00 0x01 0x65a0 0xff 0x01 0x00 0x01 0x6014 0xff 0x03 0x00 0x01 0x601c 0xff 0x00 0x00 0x01 0x6020 0xff 0x00 0x00 0x01 0x6180 0xff 0x01 0x00 0x01 0x61a0 0xff 0x01 0x00 0x01 0x7200 0xfff 0x408 0x00 0x01 0x6814 0xff 0x03 0x00 0x01 0x681c 0xff 0x00 0x00 0x01 0x6820 0xff 0x00 0x00 0x01 0x6980 0xff 0x01 0x00 0x01 0x69a0 0xff 0x01 0x00 0x01>;
				status = "ok";
				irq_flags = <0x02>;
				plug_btn_irq_gpio = <0x43 0x01 0x00>;
				max_times_hs_recognize = <0x03>;
				clk_pmuaudioclk;
				reg = <0x33>;
				compatible = "huawei,hwcxext_codec_v1";

				regmap_cfg {
					regs_size = <0x200 0x04 0x208 0x04 0x210 0x04 0x610 0x04 0x620 0x04 0x628 0x04 0x63c 0x04 0x644 0x04 0x470 0x04 0x480 0x04 0x480 0x04 0x4224 0x04 0x4228 0x04 0x423c 0x04 0x4248 0x04 0x4624 0x04 0x4628 0x04 0x463c 0x04 0x4648 0x04 0x4a24 0x04 0x4a48 0x04 0x4e24 0x04 0x4e28 0x04 0x4e34 0x04 0x4e3c 0x04 0x4d00 0x04 0x4d04 0x04 0x5224 0x04 0x5228 0x04 0x5234 0x04 0x523c 0x04 0x5100 0x04 0x5624 0x04 0x5634 0x04 0x563c 0x04 0x5500 0x04 0x5a24 0x04 0x5a30 0x04 0x5a3c 0x04 0x5900 0x04 0x5824 0x04 0x5870 0x04 0x5e24 0x04 0x5e30 0x04 0x5e3c 0x04 0x5d00 0x04 0x5c70 0x04 0x6224 0x04 0x6230 0x04 0x6234 0x04 0x623c 0x04 0x6100 0x04 0x6024 0x04 0x6070 0x04 0x6624 0x04 0x6630 0x04 0x6634 0x04 0x663c 0x04 0x6424 0x04 0x6470 0x04 0x6a24 0x04 0x6a30 0x04 0x6a34 0x04 0x6a3c 0x04 0x6870 0x04 0x6824 0x04 0x7624 0x04 0x7630 0x04 0x763c 0x04 0x7500 0x04 0x7424 0x04 0x7470 0x04 0x7a24 0x04 0x7a30 0x04 0x7a34 0x04 0x7a3c 0x04 0x7824 0x04 0x7870 0x04 0x7e24 0x04 0x7e30 0x04 0x7e34 0x04 0x7e3c 0x04 0x7c70 0x04 0x8224 0x04 0x8228 0x04 0x823c 0x04 0x8624 0x04 0x8630 0x04 0x863c 0x04 0x8500 0x04 0x8470 0x04 0x8a24 0x04 0x8a28 0x04 0x8a3c 0x04 0x8a48 0x04 0x8e24 0x04 0x8e28 0x04 0x8e3c 0x04 0x8e48 0x04 0x9224 0x04 0x9228 0x04 0x9234 0x04 0x923c 0x04 0x9100 0x04 0x9624 0x04 0x9628 0x04 0x9634 0x04 0x963c 0x04 0x9500 0x04 0x9a24 0x04 0x9a30 0x04 0x9a3c 0x04 0x9900 0x04 0x9824 0x04 0x9870 0x04 0x9e24 0x04 0x9e30 0x04 0x9e34 0x04 0x9e3c 0x04 0x9c24 0x04 0x9c70 0x04 0x6e00 0x04 0x6e04 0x04 0x6e08 0x04 0x6e0c 0x04 0x6e10 0x04 0x6e18 0x04 0x6e20 0x04 0x6e24 0x04 0x6e28 0x04 0x6e2c 0x04 0x614 0x02 0x43c8 0x02 0x47c8 0x02 0x4fc8 0x02 0x53c8 0x02 0x83c8 0x02 0x8bc8 0x02 0x8fc8 0x02 0x93c8 0x02 0x97c8 0x02 0x6d00 0x02 0x6d02 0x02 0x6d04 0x02 0x6d06 0x02 0x6d08 0x02 0x6d0a 0x02 0x6d84 0x02 0x7100 0x02 0x7104 0x02 0x7108 0x02 0x710c 0x02 0x7110 0x02 0x7114 0x02 0x7118 0x02 0x711c 0x02 0x7120 0x02 0x7124 0x02 0x7128 0x02 0x712c 0x02 0x7134 0x02 0x713c 0x02 0x7300 0x02 0x7304 0x02 0x7308 0x02 0x730c 0x02 0x7310 0x02 0x7314 0x02 0x7318 0x02 0x731c 0x02 0x7320 0x02 0x7324 0x02 0x732c 0x02 0x7334 0x02 0x70a0 0x02 0x70a4 0x02 0x70a8 0x02 0x70ac 0x02 0x70b0 0x02 0x70b4 0x02 0x70b8 0x02 0x70bc 0x02 0x7200 0x02 0x7204 0x02 0x7208 0x02 0x7210 0x02 0x7214 0x02 0x7218 0x02 0x721c 0x02 0x7220 0x02 0x7224 0x02 0x7228 0x02 0x722c 0x02 0x7230 0x02 0x7234 0x02 0x7238 0x02 0x723c 0x02 0x7094 0x02 0x7098 0x02 0x709c 0x02 0x7180 0x02 0x7184 0x02 0x7188 0x02 0x718c 0x02 0x7190 0x02 0x7194 0x02 0x7198 0x02 0x719c 0x02 0x71a0 0x02 0x71a4 0x02 0x71a8 0x02 0x71ac 0x02 0x71b0 0x02 0x71b4 0x02 0x71b8 0x02 0x71bc 0x02 0x7280 0x02 0x7284 0x02 0x6014 0x02 0x7414 0x02>;
					reg_volatile = <0x200 0x208 0x6e17 0x722c 0x5824 0x6024 0x6424 0x6824 0x6d0d 0x454>;
					reg_readable = <0x70 0xdc 0x200 0x208 0x210 0x25c 0x414 0x420 0x454 0x458 0x45c 0x460 0x464 0x468 0x470 0x480 0x610 0x614 0x620 0x628 0x62c 0x63c 0x644 0x4014 0x4018 0x4030 0x41c0 0x41e0 0x4224 0x4228 0x422c 0x423c 0x4248 0x43c8 0x4414 0x4418 0x4430 0x45c0 0x45e0 0x4624 0x4628 0x462c 0x463c 0x4648 0x47c8 0x4828 0x49e0 0x4a24 0x4a48 0x4c04 0x4c14 0x4c18 0x4c30 0x4d00 0x4d04 0x4d80 0x4d84 0x4d88 0x4d8c 0x4d90 0x4da0 0x4da4 0x4da8 0x4dac 0x4db0 0x4e24 0x4e28 0x4e2c 0x4e34 0x4e38 0x4e3c 0x4fc8 0x5004 0x5014 0x5018 0x5030 0x5100 0x5180 0x5184 0x5188 0x51a0 0x51a4 0x51a8 0x5224 0x5228 0x522c 0x5234 0x5238 0x523c 0x53c8 0x5414 0x5500 0x5580 0x5584 0x55a0 0x55a4 0x5624 0x5634 0x5638 0x563c 0x5804 0x5814 0x581c 0x5820 0x5824 0x5830 0x5870 0x5900 0x5a24 0x5a30 0x5a38 0x5a3c 0x5c04 0x5c14 0x5c1c 0x5c30 0x5c70 0x5d00 0x5e24 0x5e30 0x5e38 0x5e3c 0x6004 0x6014 0x601c 0x6020 0x6024 0x6030 0x6070 0x6100 0x6180 0x61a0 0x6224 0x6230 0x6234 0x6238 0x623c 0x6414 0x641c 0x6420 0x6424 0x6470 0x6580 0x65a0 0x6624 0x6630 0x6634 0x663c 0x6814 0x681c 0x6820 0x6824 0x6870 0x6980 0x69a0 0x6a24 0x6a30 0x6a34 0x6a3c 0x6d00 0x6d01 0x6d02 0x6d03 0x6d04 0x6d05 0x6d06 0x6d07 0x6d08 0x6d09 0x6d0a 0x6d0b 0x6d0c 0x6d0d 0x6d0e 0x6d10 0x6d11 0x6d12 0x6d13 0x6d14 0x6d15 0x6d16 0x6d17 0x6d18 0x6d19 0x6d1a 0x6d80 0x6d81 0x6d82 0x6d83 0x6d84 0x6d85 0x6d86 0x6d87 0x6d88 0x6d89 0x6d8a 0x6d8b 0x6d8c 0x6d8d 0x6d8f 0x6d90 0x6d91 0x6d92 0x6d93 0x6d9f 0x6da0 0x6da1 0x6da2 0x6da3 0x6e00 0x6e04 0x6e08 0x6e0c 0x6e10 0x6e14 0x6e16 0x6e17 0x6e18 0x6e1c 0x6e1d 0x6e20 0x6e24 0x6e28 0x6e2c 0x6e8c 0x6e8d 0x6e8f 0x6e9c 0x6e9d 0x6e9e 0x7080 0x7084 0x7088 0x708c 0x7090 0x7094 0x7098 0x709c 0x70a0 0x70a4 0x70a8 0x70ac 0x70b0 0x70b4 0x70b8 0x70bc 0x7100 0x7104 0x7108 0x710c 0x7110 0x7114 0x7118 0x711c 0x7120 0x7124 0x7128 0x712c 0x7130 0x7134 0x7138 0x713c 0x7180 0x7184 0x7188 0x718c 0x7190 0x7194 0x7198 0x719c 0x71a0 0x71a4 0x71a8 0x71ac 0x71b0 0x71b4 0x71b8 0x71bc 0x7200 0x7204 0x7208 0x720c 0x7210 0x7214 0x7218 0x721c 0x7220 0x7224 0x7228 0x722c 0x7230 0x7234 0x7238 0x723c 0x7280 0x7284 0x7300 0x7304 0x7308 0x730c 0x7310 0x7314 0x7318 0x731c 0x7320 0x7324 0x7328 0x732c 0x7330 0x7334 0x7338 0x8014 0x8018 0x8034 0x8224 0x8228 0x822c 0x823c 0x83c8 0x8414 0x841c 0x8470 0x8500 0x8624 0x8630 0x8638 0x863c>;
					reg_defaults = <0x70 0x00 0xdc 0x04 0x414 0x633 0x420 0x00 0x454 0x00 0x458 0x00 0x45c 0x00 0x460 0x00 0x464 0x00 0x468 0x00 0x470 0x00 0x480 0x14f10101 0x43c8 0x31 0x41c0 0x4a 0x41e0 0x4a 0x4014 0x433 0x4018 0x00 0x4030 0x00 0x47c8 0x31 0x45c0 0x4a 0x45e0 0x4a 0x4414 0x433 0x4418 0x00 0x4430 0x00 0x49e0 0x03 0x4828 0x00 0x4fc8 0x31 0x4d80 0x4a 0x4da0 0x4a 0x4d84 0x4a 0x4da4 0x4a 0x4d88 0x4a 0x4da8 0x4a 0x4d8c 0x4a 0x4dac 0x4a 0x4d90 0x4a 0x4db0 0x4a 0x4c04 0x00 0x4c14 0x433 0x4c18 0x00 0x4c30 0x00 0x53c8 0x31 0x5180 0x4a 0x51a0 0x4a 0x5184 0x4a 0x51a4 0x4a 0x5188 0x4a 0x51a8 0x4a 0x5004 0x00 0x5014 0x433 0x5018 0x00 0x5030 0x00 0x5580 0x4a 0x55a0 0x4a 0x5584 0x4a 0x55a4 0x4a 0x5414 0x433 0x5804 0x00 0x5814 0x433 0x581c 0xc0 0x5820 0x00 0x5830 0x02 0x5870 0x42140f0 0x5c04 0x00 0x5c14 0x433 0x5c1c 0x40 0x5c30 0x02 0x5c70 0x901700f0 0x6180 0x00 0x61a0 0x00 0x6004 0x00 0x6014 0x433 0x601c 0x00 0x6020 0x00 0x6024 0x00 0x6030 0x02 0x6070 0x481302e 0x6580 0x00 0x65a0 0x00 0x6414 0x433 0x641c 0x00 0x6420 0x00 0x6470 0x4a19020 0x6980 0x00 0x69a0 0x00 0x6814 0x433 0x681c 0x00 0x6820 0x00 0x6870 0x90a701f0 0x83c8 0x31 0x8014 0x433 0x8018 0x00 0x8414 0x433 0x841c 0x00 0x8470 0x44510f0 0x6d00 0x720c 0x6d02 0x00 0x6d04 0x00 0x6d06 0x00 0x6d08 0x00 0x6d0a 0x00 0x6d0c 0x00 0x6d0d 0x00 0x6d0e 0x00 0x6d10 0xa4 0x6d11 0x65 0x6d12 0x00 0x6d13 0x04 0x6d14 0x24 0x6d15 0x00 0x6d16 0x7b 0x6d17 0x00 0x6d18 0x00 0x6d19 0x00 0x6d1a 0x00 0x6d80 0x1f008a 0x6d84 0x990026 0x6e00 0x10001 0x6e04 0x00 0x6e08 0x00 0x6e0c 0x00 0x6e10 0xb000000 0x6e18 0x00 0x6e20 0x00 0x6e24 0x00 0x6e28 0xb000000 0x6e2c 0x00 0x6e17 0x00 0x7100 0x00 0x7104 0x00 0x7108 0x00 0x710c 0x00 0x7110 0x404 0x7114 0x32 0x7118 0x00 0x711c 0x00 0x7120 0x00 0x7124 0x04 0x7128 0x01 0x712c 0x100 0x7130 0x00 0x7134 0x00 0x7138 0x00 0x713c 0x00 0x7300 0x00 0x7304 0x00 0x730c 0x183 0x7310 0x300 0x7314 0x06 0x7318 0x00 0x731c 0x00 0x7320 0x00 0x7324 0x00 0x7328 0x08 0x732c 0x00 0x7330 0x00 0x7334 0xd0 0x7338 0x00 0x70a0 0x280 0x70a4 0x814 0x70a8 0x242 0x70ac 0x67f 0x70b8 0x18 0x70bc 0x00 0x7200 0x404 0x7204 0x242 0x7208 0xb0 0x720c 0x00 0x7210 0x19 0x7214 0x600 0x7218 0x18 0x721c 0x1f 0x7220 0x01 0x7224 0x00 0x722c 0x00 0x7230 0x84 0x7234 0x00 0x7238 0x500 0x723c 0xf3 0x7080 0x21 0x7084 0x18 0x7088 0x24 0x708c 0x01 0x7090 0x02 0x7094 0x00 0x7098 0x00 0x709c 0x82 0x7180 0x00 0x7184 0x05 0x7188 0x00 0x718c 0x00 0x7190 0x00 0x7194 0x00 0x7198 0x59a 0x719c 0xa7 0x71a0 0x17 0x71a4 0x900 0x71a8 0x00 0x71ac 0x00 0x71b0 0x00 0x71b4 0x00 0x71b8 0x00 0x71bc 0x00>;
					need_custom_read_write_func;
					item_type = <0x00>;
					max_register = <0xa3c8>;
					cache_type = <0x00>;
					val_bits = <0x20>;
					reg_bits = <0x10>;
				};
			};

			fusb30x_kirin980_i2c3@22 {
				compatible = "fairchild,fusb302";
				reg = <0x22>;
				status = "disabled";
				vconn_swap_to_on_supported;
				vconn_swap_to_off_supported;
				dp_enabled;
				modal_operation_supported;
				discover_mode_supported;
				enter_mode_supported;
				discover_svid_supported;
			};

			superswitch_fusb3601_kirin980_i2c3@25 {
				compatible = "fairchild,fusb3601";
				reg = <0x25>;
				status = "disabled";
			};

			tusb422_kirin980_i2c3@20 {
				compatible = "ti,tusb422-usb-pd";
				reg = <0x20>;
				status = "disabled";
				ti,usb-comm-capable;
				ti,no-usb-suspend;
				ti,dual-role-data;
				ti,auto-accept-swap-to-dfp;
				ti,auto-accept-swap-to-ufp;
				ti,auto-accept-swap-to-source;
				ti,auto-accept-swap-to-sink;
				ti,auto-accept-vconn-swap;
				ti,src-settling-time-ms = <0x32>;
				ti,fast-role-swap-support = <0x00>;
				ti,pdo-priority = <0x00>;
				ti,role = <0x02>;
				ti,rp-val = <0x00>;
				ti,flags = <0x02>;
				ti,id-header-vdo = <0xd50012d1>;
				ti,cert-stat-vdo = <0x00>;
				ti,product-vdo = <0x107e0000>;
				ti,num-product-type-vdos = <0x00>;
				ti,product-type-vdo-1 = <0x00>;
				ti,product-type-vdo-2 = <0x00>;
				ti,product-type-vdo-3 = <0x00>;
				ti,num-svids = <0x01>;
				ti,svid-1 = <0xff01>;
				ti,svid-2 = <0x00>;
				ti,svid-3 = <0x00>;
				ti,mode-1 = <0x1c46>;
				ti,mode-2 = <0x00>;
				ti,mode-3 = <0x00>;

				source1 {
					ti,current-flow = <0x00>;
					ti,supply-type = <0x00>;
					ti,pdo-number = <0x00>;
					ti,min-voltage = <0x1388>;
					ti,max-voltage = <0x00>;
					ti,peak-current = <0x00>;
					ti,max-current = <0x3e8>;
					ti,max-power = <0x00>;
				};

				sink1 {
					ti,current-flow = <0x01>;
					ti,supply-type = <0x00>;
					ti,pdo-number = <0x00>;
					ti,min-voltage = <0x1388>;
					ti,max-voltage = <0x00>;
					ti,max-operating-curr = <0x7d0>;
					ti,min-operating-curr = <0x64>;
					ti,operational-curr = <0x7d0>;
					ti,max-operating-pwr = <0x00>;
					ti,min-operating-pwr = <0x00>;
					ti,operational-pwr = <0x00>;
					ti,peak-current = <0x00>;
				};

				sink2 {
					ti,current-flow = <0x01>;
					ti,supply-type = <0x00>;
					ti,pdo-number = <0x01>;
					ti,min-voltage = <0x2328>;
					ti,max-voltage = <0x00>;
					ti,max-operating-curr = <0x7d0>;
					ti,min-operating-curr = <0x64>;
					ti,operational-curr = <0x7d0>;
					ti,max-operating-pwr = <0x00>;
					ti,min-operating-pwr = <0x00>;
					ti,operational-pwr = <0x00>;
					ti,peak-current = <0x00>;
				};
			};

			rt1711_kirin980_i2c3@4e {
				compatible = "richtek,rt1711";
				reg = <0x4e>;
				status = "disabled";
				rt-dual,supported_modes = <0x00>;
				rt-tcpc,name = "type_c_port0";
				rt-tcpc,role_def = <0x04>;
				rt-tcpc,rp_level = <0x00>;
				rt-tcpc,notifier_supply_num = <0x00>;

				pd-data {
					pd,source-pdo-size = <0x01>;
					pd,source-pdo-data = <0x19064>;
					pd,sink-pdo-size = <0x02>;
					pd,sink-pdo-data = <0x190c8 0x2d0c8>;
					pd,id-vdo-size = <0x03>;
					pd,id-vdo-data = <0xd40012d1 0x00 0x107e0000>;
				};

				dpm_caps {
					local_dr_power;
					local_dr_data;
					local_usb_comm;
					local_no_suspend;
					local_vconn_supply;
					attemp_enter_dp_mode;
					attemp_discover_cable;
					attemp_discover_id;
					pr_check = <0x00>;
					pr_check_gp_source;
					dr_check = <0x00>;
					snk_prefer_low_voltage;
				};

				displayport {
					1st_connection = "dfp_d";
					2nd_connection = "dfp_d";
					signal,dp_v13;
					typec,receptacle;

					ufp_d {
					};

					dfp_d {
						pin_assignment,mode_c;
						pin_assignment,mode_d;
						pin_assignment,mode_e;
						pin_assignment,mode_f;
					};
				};
			};
		};

		i2c@FF88D000 {
			hold-time = <0x430043>;
			speed-mode = <0x00>;
			#address-cells = <0x01>;
			#size-cells = <0x00>;
			compatible = "hisilicon,hisi-i2c-master";
			reg = <0x00 0xff88d000 0x00 0x1000>;
			interrupts = <0x00 0x166 0x04>;
			clocks = <0x3a 0x26>;
			clock-names = "clk_i2c", "apb_pclk";
			delay-off = <0x12c>;
			reset-reg-base = <0x00 0xffb85000 0x00 0x1000>;
			reset-controller-reg = <0x78 0x7c 0x80 0x1b>;
			i2c-ioc-base = <0x00 0xff800000 0x00 0x1000>;
			i2c-pad-ioc-base = <0x00 0xff801000 0x00 0x1000>;
			i2c-recover-val = <0x704 0x01 0x01 0x00>;
			status = "ok";
			clock-rate = <0x00 0x6acfc00>;
			pinctrl-names = "default", "idle";
			pinctrl-0 = <0x3b 0x3c 0x3d 0x3e>;
			pinctrl-1 = <0x3f 0x40 0x41 0x42>;
			cs-gpios = <0x2f 0x12 0x00 0x2f 0x13 0x00>;
			phandle = <0x3e6>;

			ktz,ktz8864@11 {
				status = "ok";
				only_bias = <0x00>;
				ktz8864_pull_up_boost = <0x24>;
				ktz8864_enable_vsp_vsn = <0x99>;
				ktz8864_pull_down_boost = <0x14>;
				ktz8864_pull_boost_support = <0x01>;
				ktz8864_check_fault_support = <0x01>;
				ktz8864_hidden_reg_support = <0x00>;
				ktz8864_bl_max_level = <0x800>;
				ktz8864_bl_option_2 = <0x74>;
				ktz8864_bl_option_1 = <0x86>;
				ktz8864_vneg_bias = <0x1e>;
				ktz8864_vpos_bias = <0x1e>;
				ktz8864_lcm_boost_bias = <0x24>;
				ktz8864_display_bias_config_3 = <0x00>;
				ktz8864_display_bias_config_2 = <0x11>;
				ktz8864_display_bias_config_1 = <0x99>;
				ktz8864_bl_en = <0x13>;
				ktz8864_auto_freq_high = <0x00>;
				ktz8864_auto_freq_low = <0x00>;
				ktz8864_bl_brightness_msb = <0xe1>;
				ktz8864_bl_brightness_lsb = <0x00>;
				ktz8864_bl_config_2 = <0x82>;
				ktz8864_bl_config_1 = <0x70>;
				ktz8864_hw_en_gpio = <0x1a>;
				ktz8864_i2c_bus_id = <0x04>;
				reg = <0x11>;
				ktz8864_support = <0x01>;
				compatible = "ktz,ktz8864";
			};

			hw_aw3642@7F {
				status = "ok";
				vendor,torch_current = <0x17>;
				vendor,flash_current = <0x1f>;
				vendor,flash-chipid = <0x36>;
				vendor,led-type = <0x00>;
				vendor,flash-pin = <0x23 0x3e7 0x3e7>;
				vendor,slave-address = <0x63>;
				vendor,need-wakelock = <0x00>;
				vendor,flash-type = <0x00>;
				vendor,flash-index = <0x00>;
				vendor,flash-name = "aw3642";
				reg = <0x63>;
				compatible = "vendor,aw3642";
			};

			hw_mp3331@67 {
				status = "disabled";
				vendor,flash-chipid = <0x18>;
				vendor,torch_current = <0x05>;
				vendor,flash_current = <0x18>;
				vendor,led-type = <0x00>;
				vendor,flash-pin = <0x23 0x3e7 0x3e7>;
				vendor,slave-address = <0x67>;
				vendor,need-wakelock = <0x00>;
				vendor,flash-type = <0x00>;
				vendor,flash-index = <0x00>;
				vendor,flash-name = "mp3331";
				reg = <0x67>;
				compatible = "vendor,mp3331";
			};

			hw_lm3642@63 {
				status = "disabled";
				vendor,torch_current = <0x02>;
				vendor,flash_current = <0x07>;
				vendor,flash-chipid = <0x00>;
				vendor,led-type = <0x00>;
				vendor,flash-pin = <0x23 0x3e7 0x3e7>;
				vendor,slave-address = <0x63>;
				vendor,need-wakelock = <0x00>;
				vendor,flash-type = <0x00>;
				vendor,flash-index = <0x00>;
				vendor,flash-name = "lm3642";
				reg = <0x63>;
				compatible = "vendor,lm3642";
			};

			hi6563_pmic@17 {
				#address-cells = <0x01>;
				#interrupt-cells = <0x02>;
				compatible = "hisilicon,pmic-i2c";
				reg = <0x17>;
				interrupt-controller;
				gpios = <0x43 0x1c 0x00>;
				pmic-irq-name = "hi6563-irq";
				hisilicon,pmic-chip-irq-name = "hi6563-chip-irq";
				pmic-irq-num = <0x08>;
				pmic-irq-array = <0x01>;
				pmic-irq-mask-addr = <0x16>;
				pmic-irq-addr = <0x10>;
				status = "ok";
				phandle = <0x3e7>;

				hi6563_buck1 {
					compatible = "pmic-ldo";
					regulator-name = "hi6563_buck1";
					regulator-min-microvolt = <0x61a80>;
					regulator-max-microvolt = <0x13d620>;
					pmic-ctrl = <0x6f 0x01>;
					pmic-vset = <0x70 0x7f>;
					pmic-n-voltages = <0x5b>;
					pmic-vset-table = <0x61a80 0x64190 0x668a0 0x68fb0 0x6b6c0 0x6ddd0 0x704e0 0x72bf0 0x75300 0x77a10 0x7a120 0x7c830 0x7ef40 0x81650 0x83d60 0x86470 0x88b80 0x8b290 0x8d9a0 0x900b0 0x927c0 0x94ed0 0x975e0 0x99cf0 0x9c400 0x9eb10 0xa1220 0xa3930 0xa6040 0xa8750 0xaae60 0xad570 0xafc80 0xb2390 0xb4aa0 0xb71b0 0xb98c0 0xbbfd0 0xbe6e0 0xc0df0 0xc3500 0xc5c10 0xc8320 0xcaa30 0xcd140 0xcf850 0xd1f60 0xd4670 0xd6d80 0xd9490 0xdbba0 0xde2b0 0xe09c0 0xe30d0 0xe57e0 0xe7ef0 0xea600 0xecd10 0xef420 0xf1b30 0xf4240 0xf6950 0xf9060 0xfb770 0xfde80 0x100590 0x102ca0 0x1053b0 0x107ac0 0x10a1d0 0x10c8e0 0x10eff0 0x111700 0x113e10 0x116520 0x118c30 0x11b340 0x11da50 0x120160 0x122870 0x124f80 0x127690 0x129da0 0x12c4b0 0x12ebc0 0x1312d0 0x1339e0 0x1360f0 0x138800 0x13af10 0x13d620>;
					pmic-off-on-delay-us = <0x3e8>;
					pmic-enable-time-us = <0x64>;
					pmic-valid-modes-mask = <0x02>;
					pmic-valid-idle-mask = <0x0d>;
					phandle = <0x3e8>;
				};

				hi6563_ldo1 {
					compatible = "pmic-ldo";
					regulator-name = "hi6563_ldo1";
					regulator-min-microvolt = <0x2932e0>;
					regulator-max-microvolt = <0x36ee80>;
					pmic-ctrl = <0x87 0x01>;
					pmic-vset = <0x86 0x3f>;
					pmic-n-voltages = <0x25>;
					pmic-vset-table = <0x2932e0 0x299488 0x29f630 0x2a57d8 0x2ab980 0x2b1b28 0x2b7cd0 0x2bde78 0x2c4020 0x2ca1c8 0x2d0370 0x2d6518 0x2dc6c0 0x2e2868 0x2e8a10 0x2eebb8 0x2f4d60 0x2faf08 0x3010b0 0x307258 0x30d400 0x3135a8 0x319750 0x31f8f8 0x325aa0 0x32bc48 0x331df0 0x337f98 0x33e140 0x3442e8 0x34a490 0x350638 0x3567e0 0x35c988 0x362b30 0x368cd8 0x36ee80>;
					pmic-off-on-delay-us = <0x3e8>;
					pmic-enable-time-us = <0x50>;
					pmic-valid-modes-mask = <0x02>;
					pmic-valid-idle-mask = <0x0d>;
					phandle = <0x3e9>;
				};

				hi6563_ldo2 {
					compatible = "pmic-ldo";
					regulator-name = "hi6563_ldo2";
					regulator-min-microvolt = <0x2932e0>;
					regulator-max-microvolt = <0x36ee80>;
					pmic-ctrl = <0x8c 0x01>;
					pmic-vset = <0x8b 0x3f>;
					pmic-n-voltages = <0x25>;
					pmic-vset-table = <0x2932e0 0x299488 0x29f630 0x2a57d8 0x2ab980 0x2b1b28 0x2b7cd0 0x2bde78 0x2c4020 0x2ca1c8 0x2d0370 0x2d6518 0x2dc6c0 0x2e2868 0x2e8a10 0x2eebb8 0x2f4d60 0x2faf08 0x3010b0 0x307258 0x30d400 0x3135a8 0x319750 0x31f8f8 0x325aa0 0x32bc48 0x331df0 0x337f98 0x33e140 0x3442e8 0x34a490 0x350638 0x3567e0 0x35c988 0x362b30 0x368cd8 0x36ee80>;
					pmic-off-on-delay-us = <0x3e8>;
					pmic-enable-time-us = <0x50>;
					pmic-valid-modes-mask = <0x02>;
					pmic-valid-idle-mask = <0x0d>;
					phandle = <0x3ea>;
				};

				hi6563_ldo3 {
					compatible = "pmic-ldo";
					regulator-name = "hi6563_ldo3";
					regulator-min-microvolt = <0x2932e0>;
					regulator-max-microvolt = <0x36ee80>;
					pmic-ctrl = <0x91 0x01>;
					pmic-vset = <0x90 0x3f>;
					pmic-n-voltages = <0x25>;
					pmic-vset-table = <0x2932e0 0x299488 0x29f630 0x2a57d8 0x2ab980 0x2b1b28 0x2b7cd0 0x2bde78 0x2c4020 0x2ca1c8 0x2d0370 0x2d6518 0x2dc6c0 0x2e2868 0x2e8a10 0x2eebb8 0x2f4d60 0x2faf08 0x3010b0 0x307258 0x30d400 0x3135a8 0x319750 0x31f8f8 0x325aa0 0x32bc48 0x331df0 0x337f98 0x33e140 0x3442e8 0x34a490 0x350638 0x3567e0 0x35c988 0x362b30 0x368cd8 0x36ee80>;
					pmic-off-on-delay-us = <0x3e8>;
					pmic-enable-time-us = <0x50>;
					pmic-valid-modes-mask = <0x02>;
					pmic-valid-idle-mask = <0x0d>;
					phandle = <0x3eb>;
				};

				hi6563_ldo4 {
					compatible = "pmic-ldo";
					regulator-name = "hi6563_ldo4";
					regulator-min-microvolt = <0x2932e0>;
					regulator-max-microvolt = <0x36ee80>;
					pmic-ctrl = <0x96 0x01>;
					pmic-vset = <0x95 0x3f>;
					pmic-n-voltages = <0x25>;
					pmic-vset-table = <0x2932e0 0x299488 0x29f630 0x2a57d8 0x2ab980 0x2b1b28 0x2b7cd0 0x2bde78 0x2c4020 0x2ca1c8 0x2d0370 0x2d6518 0x2dc6c0 0x2e2868 0x2e8a10 0x2eebb8 0x2f4d60 0x2faf08 0x3010b0 0x307258 0x30d400 0x3135a8 0x319750 0x31f8f8 0x325aa0 0x32bc48 0x331df0 0x337f98 0x33e140 0x3442e8 0x34a490 0x350638 0x3567e0 0x35c988 0x362b30 0x368cd8 0x36ee80>;
					pmic-off-on-delay-us = <0x3e8>;
					pmic-enable-time-us = <0x50>;
					pmic-valid-modes-mask = <0x02>;
					pmic-valid-idle-mask = <0x0d>;
					phandle = <0x3ec>;
				};

				hi6563_ldo5 {
					compatible = "pmic-ldo";
					regulator-name = "hi6563_ldo5";
					regulator-min-microvolt = <0x19f0a0>;
					regulator-max-microvolt = <0x1cfde0>;
					pmic-ctrl = <0x9b 0x01>;
					pmic-vset = <0x9a 0x07>;
					pmic-n-voltages = <0x08>;
					pmic-vset-table = <0x19f0a0 0x1ab3f0 0x1b1598 0x1b7740 0x1bd8e8 0x1c3a90 0x1c9c38 0x1cfde0>;
					pmic-off-on-delay-us = <0x3e8>;
					pmic-enable-time-us = <0x50>;
					pmic-valid-modes-mask = <0x02>;
					pmic-valid-idle-mask = <0x0d>;
					phandle = <0x3ed>;
				};

				hi6563_ldo6 {
					compatible = "pmic-ldo";
					regulator-name = "hi6563_ldo6";
					regulator-min-microvolt = <0x19f0a0>;
					regulator-max-microvolt = <0x1cfde0>;
					pmic-ctrl = <0xa0 0x01>;
					pmic-vset = <0x9f 0x07>;
					pmic-n-voltages = <0x08>;
					pmic-vset-table = <0x19f0a0 0x1ab3f0 0x1b1598 0x1b7740 0x1bd8e8 0x1c3a90 0x1c9c38 0x1cfde0>;
					pmic-off-on-delay-us = <0x3e8>;
					pmic-enable-time-us = <0x50>;
					pmic-valid-modes-mask = <0x02>;
					pmic-valid-idle-mask = <0x0d>;
					phandle = <0x3ee>;
				};

				hi6563_ldo7 {
					compatible = "pmic-ldo";
					regulator-name = "hi6563_ldo7";
					regulator-min-microvolt = <0x2932e0>;
					regulator-max-microvolt = <0x36ee80>;
					pmic-ctrl = <0xa5 0x01>;
					pmic-vset = <0xa4 0x3f>;
					pmic-n-voltages = <0x25>;
					pmic-vset-table = <0x2932e0 0x299488 0x29f630 0x2a57d8 0x2ab980 0x2b1b28 0x2b7cd0 0x2bde78 0x2c4020 0x2ca1c8 0x2d0370 0x2d6518 0x2dc6c0 0x2e2868 0x2e8a10 0x2eebb8 0x2f4d60 0x2faf08 0x3010b0 0x307258 0x30d400 0x3135a8 0x319750 0x31f8f8 0x325aa0 0x32bc48 0x331df0 0x337f98 0x33e140 0x3442e8 0x34a490 0x350638 0x3567e0 0x35c988 0x362b30 0x368cd8 0x36ee80>;
					pmic-off-on-delay-us = <0x3e8>;
					pmic-enable-time-us = <0x50>;
					pmic-valid-modes-mask = <0x02>;
					pmic-valid-idle-mask = <0x0d>;
					phandle = <0x3ef>;
				};

				hi6563_ldo8 {
					compatible = "pmic-ldo";
					regulator-name = "hi6563_ldo8";
					regulator-min-microvolt = <0x2932e0>;
					regulator-max-microvolt = <0x36ee80>;
					pmic-ctrl = <0xaa 0x01>;
					pmic-vset = <0xa9 0x3f>;
					pmic-n-voltages = <0x25>;
					pmic-vset-table = <0x2932e0 0x299488 0x29f630 0x2a57d8 0x2ab980 0x2b1b28 0x2b7cd0 0x2bde78 0x2c4020 0x2ca1c8 0x2d0370 0x2d6518 0x2dc6c0 0x2e2868 0x2e8a10 0x2eebb8 0x2f4d60 0x2faf08 0x3010b0 0x307258 0x30d400 0x3135a8 0x319750 0x31f8f8 0x325aa0 0x32bc48 0x331df0 0x337f98 0x33e140 0x3442e8 0x34a490 0x350638 0x3567e0 0x35c988 0x362b30 0x368cd8 0x36ee80>;
					pmic-off-on-delay-us = <0x3e8>;
					pmic-enable-time-us = <0x50>;
					pmic-valid-modes-mask = <0x02>;
					pmic-valid-idle-mask = <0x0d>;
					phandle = <0x3f0>;
				};

				hi6563_ldo9 {
					compatible = "pmic-ldo";
					regulator-name = "hi6563_ldo9";
					regulator-min-microvolt = <0xe7ef0>;
					regulator-max-microvolt = <0x14689c>;
					pmic-ctrl = <0xb0 0x01>;
					pmic-vset = <0xaf 0x1f>;
					pmic-n-voltages = <0x20>;
					pmic-vset-table = <0xe7ef0 0xeafc4 0xee098 0xf116c 0xf4240 0xf7314 0xfa3e8 0xfd4bc 0x100590 0x103664 0x106738 0x10980c 0x10c8e0 0x10f9b4 0x112a88 0x115b5c 0x118c30 0x11bd04 0x11edd8 0x121eac 0x124f80 0x128054 0x12b128 0x12e1fc 0x1312d0 0x1343a4 0x137478 0x13a54c 0x13d620 0x1406f4 0x1437c8 0x14689c>;
					pmic-off-on-delay-us = <0x3e8>;
					pmic-enable-time-us = <0x50>;
					pmic-valid-modes-mask = <0x02>;
					pmic-valid-idle-mask = <0x0d>;
					phandle = <0x3f1>;
				};

				hi6563_buckboost {
					compatible = "pmic-ldo";
					regulator-name = "hi6563_buckboost";
					regulator-min-microvolt = <0x2932e0>;
					regulator-max-microvolt = <0x4dd1e0>;
					pmic-ctrl = <0xd0 0x01>;
					pmic-vset = <0xd1 0x7f>;
					pmic-n-voltages = <0x61>;
					pmic-vset-table = <0x2932e0 0x299488 0x29f630 0x2a57d8 0x2ab980 0x2b1b28 0x2b7cd0 0x2bde78 0x2c4020 0x2ca1c8 0x2d0370 0x2d6518 0x2dc6c0 0x2e2868 0x2e8a10 0x2eebb8 0x2f4d60 0x2faf08 0x3010b0 0x307258 0x30d400 0x3135a8 0x319750 0x31f8f8 0x325aa0 0x32bc48 0x331df0 0x337f98 0x33e140 0x3442e8 0x34a490 0x350638 0x3567e0 0x35c988 0x362b30 0x368cd8 0x36ee80 0x375028 0x37b1d0 0x381378 0x387520 0x38d6c8 0x393870 0x399a18 0x39fbc0 0x3a5d68 0x3abf10 0x3b20b8 0x3b8260 0x3be408 0x3c45b0 0x3ca758 0x3d0900 0x3d6aa8 0x3dcc50 0x3e2df8 0x3e8fa0 0x3ef148 0x3f52f0 0x3fb498 0x401640 0x4077e8 0x40d990 0x413b38 0x419ce0 0x41fe88 0x426030 0x42c1d8 0x432380 0x438528 0x43e6d0 0x444878 0x44aa20 0x450bc8 0x456d70 0x45cf18 0x4630c0 0x469268 0x46f410 0x4755b8 0x47b760 0x481908 0x487ab0 0x48dc58 0x493e00 0x499fa8 0x4a0150 0x4a62f8 0x4ac4a0 0x4b2648 0x4b87f0 0x4be998 0x4c4b40 0x4cace8 0x4d0e90 0x4d7038 0x4dd1e0>;
					pmic-off-on-delay-us = <0x3e8>;
					pmic-enable-time-us = <0x50>;
					pmic-valid-modes-mask = <0x02>;
					pmic-valid-idle-mask = <0x0d>;
					phandle = <0x3f2>;
				};
			};

			vendor,lm3646@67 {
				compatible = "vendor,lm3646";
				reg = <0x67>;
				vendor,flash-name = "lm3646";
				vendor,flash-index = <0x00>;
				vendor,flash-type = <0x00>;
				vendor,slave-address = <0x67>;
				vendor,flash-ctrltype = <0x01>;
				vendor,need-wakelock = <0x00>;
				vendor,flash-chipid = <0x11>;
				vendor,flash_led_num = <0x150>;
				vendor,flash_led = <0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0a>;
				vendor,torch_led_num = <0x150>;
				vendor,torch_led = <0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07>;
				vendor,led-type = <0x01>;
				vendor,flash-current = <0x7c 0x7f 0x00>;
				status = "disabled";
			};

			vendor,mp3336@27 {
				compatible = "vendor,mp3336";
				reg = <0x27>;
				vendor,flash-name = "mp3336";
				vendor,flash-index = <0x00>;
				vendor,flash-type = <0x00>;
				vendor,slave-address = <0x27>;
				vendor,flash-ctrltype = <0x01>;
				vendor,need-wakelock = <0x00>;
				vendor,flash-chipid = <0x38>;
				vendor,flash_led_num = <0x150>;
				vendor,flash_led = <0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0a>;
				vendor,torch_led_num = <0x150>;
				vendor,torch_led = <0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07>;
				vendor,led-type = <0x01>;
				vendor,flash-current = <0xbe 0xbe 0x00>;
				status = "disabled";
			};

			mipi2hdmi {
				product-type = <0x01>;
				power-control-type = <0x01>;
				hpd-irq-gpio = <0x26>;
				function-gpio = <0x41 0x01 0x00 0x15d 0x01 0x00>;
				power-gpio-sequence;
				power-down-on-probe;
				shutdown-sequence;
				pre-enable-sequence;
				enable-sequence = <0x01 0x00 0x01 0x00 0x01 0x01 0x01 0x00 0x04 0x01 0x0a>;
				disable-sequence = <0x04 0x00 0x00 0x01 0x01 0x00 0x0a>;
				post-disable-sequence;
				suspend-sequence;
				resume-sequence;
				status = "ok";
			};

			lt,lt9611ux@2B {
				compatible = "lt,lt9611ux";
				reg = <0x2b>;
				dsi-bit-clk = <0x1c0>;
				status = "ok";

				port {

					endpoint {
						remote-endpoint = <0x44>;
						phandle = <0x17e>;
					};
				};
			};

			smartpa@31 {
				compatible = "huawei,max98925";
				smartpa_type = <0x00>;
				reg = <0x31>;
				gain = <0x14>;
				gain_incall = <0x14>;
				iv_slot_change = <0x00>;
				status = "disabled";
				phandle = <0x3f3>;
			};

			smartpa@34 {
				dump_regs = <0x00 0x100 0x00>;
				version_regs = <0x03 0x01 0x00>;
				chip_model = "tfa9874";
				chip_id = <0x00>;
				chip_vendor = <0x01>;
				compatible = "huawei,smartpakit_i2c";
				smartpa_type = <0x01>;
				reg = <0x34>;
				gain = <0x34>;
				gain_incall = <0x36>;
				iv_slot_change = <0x00>;
				status = "ok";
				phandle = <0x3f4>;

				regmap_cfg {
					reg_defaults = <0x00 0x1801 0x01 0x14>;
					max_register = <0xff>;
					cache_type = <0x00>;
					val_bits = <0x10>;
					reg_bits = <0x08>;
				};

				irq_handler {
					rw_sequence = <0x10 0x01 0x00 0x11 0x01 0x00 0x13 0x01 0x00 0x14 0x01 0x00 0x40 0x01 0x00 0x41 0x01 0x00 0x42 0x01 0x00>;
					need_reset;
					irq_flags = <0x02>;
					gpio_irq = <0xdb>;
				};

				hw_reset {
					ctl_sequence = <0x01 0x01 0x00 0x01>;
					gpio_reset = <0xcc>;
				};
			};

			smartpa@35 {
				compatible = "huawei,tfa9872";
				smartpa_type = <0x00>;
				reg = <0x35>;
				gain = <0x14>;
				gain_incall = <0x14>;
				status = "disabled";
				phandle = <0x3f5>;
			};

			smartpa@36 {
				dump_regs = <0x00 0x100 0x00>;
				version_regs = <0x03 0x01 0x00>;
				chip_model = "tfa9874";
				chip_id = <0x01>;
				chip_vendor = <0x01>;
				compatible = "huawei,smartpakit_i2c";
				smartpa_type = <0x01>;
				reg = <0x36>;
				gain = <0x34>;
				gain_incall = <0x36>;
				status = "ok";
				phandle = <0x3f6>;

				regmap_cfg {
					reg_defaults = <0x00 0x1801 0x01 0x14>;
					max_register = <0xff>;
					cache_type = <0x00>;
					val_bits = <0x10>;
					reg_bits = <0x08>;
				};

				irq_handler {
					rw_sequence = <0x10 0x01 0x00 0x11 0x01 0x00 0x13 0x01 0x00 0x14 0x01 0x00 0x40 0x01 0x00 0x41 0x01 0x00 0x42 0x01 0x00>;
					need_reset;
					irq_flags = <0x02>;
					gpio_irq = <0xdb>;
				};

				hw_reset {
					ctl_sequence = <0x01 0x01 0x00 0x01>;
					gpio_reset = <0xcc>;
				};
			};

			smartpa@4C {
				compatible = "huawei,tas2560";
				smartpa_type = <0x00>;
				reg = <0x4c>;
				status = "disabled";
				phandle = <0x3f7>;
			};

			smartpa@4F {
				compatible = "huawei,tas2560";
				smartpa_type = <0x01>;
				reg = <0x4f>;
				status = "disabled";
				phandle = <0x3f8>;
			};

			wireless_cps8601_i2c4@41 {
				compatible = "cps,cps8601_aux";
				reg = <0x41>;
				status = "disabled";
				phandle = <0x3f9>;
			};

			wireless_mt5806_i2c4@2B {
				compatible = "mt,mt5806_aux";
				reg = <0x2b>;
				status = "disabled";
				phandle = <0x3fa>;
			};

			fusb30x_i2c4@22 {
				compatible = "fairchild,fusb302";
				reg = <0x22>;
				status = "disabled";
				vconn_swap_to_on_supported;
				vconn_swap_to_off_supported;
				dp_enabled;
				modal_operation_supported;
				discover_mode_supported;
				enter_mode_supported;
				discover_svid_supported;
			};

			rt1711_i2c4@4e {
				compatible = "richtek,rt1711";
				reg = <0x4e>;
				status = "disabled";
				rt-dual,supported_modes = <0x00>;
				rt-tcpc,name = "type_c_port0";
				rt-tcpc,role_def = <0x04>;
				rt-tcpc,rp_level = <0x00>;
				rt-tcpc,notifier_supply_num = <0x00>;

				pd-data {
					pd,source-pdo-size = <0x01>;
					pd,source-pdo-data = <0x19064>;
					pd,sink-pdo-size = <0x02>;
					pd,sink-pdo-data = <0x190c8 0x2d0c8>;
					pd,id-vdo-size = <0x03>;
					pd,id-vdo-data = <0xd40012d1 0x00 0x107e0000>;
				};

				dpm_caps {
					local_dr_power;
					local_dr_data;
					local_usb_comm;
					local_no_suspend;
					local_vconn_supply;
					attemp_enter_dp_mode;
					attemp_discover_cable;
					attemp_discover_id;
					pr_check = <0x00>;
					pr_check_gp_source;
					dr_check = <0x00>;
					snk_prefer_low_voltage;
				};

				displayport {
					1st_connection = "dfp_d";
					2nd_connection = "dfp_d";
					signal,dp_v13;
					typec,receptacle;

					ufp_d {
					};

					dfp_d {
						pin_assignment,mode_c;
						pin_assignment,mode_d;
					};
				};
			};

			ktz,ktz8864 {
				status = "ok";
			};
		};

		i2c@FF88E000 {
			#address-cells = <0x01>;
			#size-cells = <0x00>;
			compatible = "hisilicon,hisi-i2c-master";
			reg = <0x00 0xff88e000 0x00 0x1000>;
			interrupts = <0x00 0x167 0x04>;
			clocks = <0x45 0x26>;
			clock-names = "clk_i2c", "apb_pclk";
			delay-off = <0x12c>;
			reset-reg-base = <0x00 0xffb85000 0x00 0x1000>;
			reset-controller-reg = <0x60 0x64 0x68 0x13>;
			i2c-ioc-base = <0x00 0xff810000 0x00 0x1000>;
			i2c-pad-ioc-base = <0x00 0xff811000 0x00 0x1000>;
			i2c-recover-val = <0x14 0x01 0x01 0x00>;
			status = "ok";
			clock-rate = <0x00 0x6acfc00>;
			pinctrl-names = "default", "idle";
			pinctrl-0 = <0x46 0x47 0x48 0x49>;
			pinctrl-1 = <0x4a 0x4b 0x4c 0x4d>;
			cs-gpios = <0x4e 0x0c 0x00 0x4e 0x0d 0x00>;
			phandle = <0x3fb>;

			scharger_v700@6B {
				compatible = "hisilicon,scharger-v700";
				#interrupt-cells = <0x02>;
				interrupt-controller;
				reg = <0x6c>;
				chip_version = <0x01>;
				gpios = <0x4f 0x16 0x00>;
				pinctrl-names = "default";
				pinctrl-0;
				scharger-irq-num = <0x07>;
				scharger-irq-array = <0x01>;
				scharger-irq-mask-addr = <0x80d>;
				scharger-irq-addr = <0x800>;
				status = "disabled";
				phandle = <0x50>;

				scharger_v700_buck {
					compatible = "hisilicon,scharger-v700-buck";
					interrupt-parent = <0x50>;
					interrupts = <0x05 0x00 0x04 0x00 0x02 0x00>;
					interrupt-names = "buck_irq", "ovp_psw_irq", "others_irq";
					bat_comp_h = <0x1e>;
					bat_comp_l = <0x3c>;
					vclamp_h = <0xfa>;
					vclamp_l = <0xfa>;
					vusb_ovp = <0x0b>;
					phandle = <0x3fc>;
				};

				hisi_usb_typec_v700 {
					compatible = "hisilicon,hisi-usb-typec";
					check_hardreset_state;
					status = "ok";
					phandle = <0x3fd>;

					hisi_tcpc {
						compatible = "hisilicon,hisi_tcpc";
						status = "ok";
						hisi-tcpc,supported_modes = <0x00>;
						hisi-tcpc,name = "hisi-tcpc";
						hisi-tcpc,role_def = <0x05>;
						hisi-tcpc,rp_level = <0x00>;

						hisi_tcpc_regs {
							cdr_cfg_0 = <0x150>;
							dbg_cfg_1 = <0x153>;
							sc_buck_en = <0x333>;
							irq_gbl_msk = <0x80d>;
							irq_msk_pd_bit = <0x02>;
							abnormal_irq_sts = <0x80c>;
							abnormal_irq_msk = <0x819>;
							cc_ovp_irq = <0x04>;
							cfg_reg_1 = <0x9b0>;
							jtag_sbu_en = <0x90c>;
							aux_sbu_en = <0x33b>;
						};

						pd-data-objects {
							pd,source-pdo-size = <0x01>;
							pd,source-pdo-data = <0x19064>;
							pd,sink-pdo-size = <0x02>;
							pd,sink-pdo-data = <0x190c8 0x2d0c8>;
							pd,id-vdo-size = <0x06>;
							pd,id-vdo-data = <0xd50012d1 0x00 0x107e0000 0x30080000 0x00 0x30000000>;
						};

						dpm-caps {
							local_dr_power;
							local_dr_data;
							local_usb_comm;
							local_no_suspend;
							local_vconn_supply;
							attemp_enter_dp_mode;
							attemp_discover_cable;
							attemp_discover_id;
							pr_check = <0x00>;
							pr_check_gp_source;
							dr_check = <0x00>;
							snk_prefer_low_voltage;
						};

						display-port {
							1st_connection = "dfp_d";
							2nd_connection = "dfp_d";
							signal,dp_v13;
							typec,receptacle;

							ufp_d {
							};

							dfp_d {
								pin_assignment,mode_c;
								pin_assignment,mode_d;
								pin_assignment,mode_e;
								pin_assignment,mode_f;
							};
						};
					};
				};

				scharger_v700_watchdog {
					compatible = "hisilicon,scharger-v700-wdg";
					phandle = <0x3fe>;
				};

				scharger_v700_fcp {
					#address-cells = <0x01>;
					#size-cells = <0x00>;
					compatible = "hisilicon,scharger-v700-fcp";
					fcp_support = <0x01>;
					phandle = <0x3ff>;
				};

				scharger_v700_dc {
					compatible = "hisilicon,scharger-v700-dc";
					scp_support = <0x00>;
					phandle = <0x400>;
				};

				scharger_v700_batctl {
					compatible = "hisilicon,scharger-v700-batctl";
					phandle = <0x401>;
				};

				scharger_v700_adc {
					compatible = "hisilicon,scharger-v700-adc";
					phandle = <0x402>;
				};

				scharger_v700_water_det {
					compatible = "hisilicon,scharger-v700-water-detect";
					sbu1_th = <0xfff>;
					sbu2_th = <0xfff>;
					dplus_th = <0xe6>;
					phandle = <0x403>;
				};

				scharger_v700_tcpc {
					compatible = "hisilicon,scharger-v700-tcpc";
					interrupt-parent = <0x50>;
					interrupts = <0x01 0x00>;
					interrupt-names = "tcpc_irq";
					phandle = <0x404>;
				};

				bat_par_ctrl {
					compatible = "huawei,bat_par_ctrl";
					status = "disabled";
					phandle = <0x405>;
				};

				scharger_cv {
					compatible = "hisilicon,scharger_cv";
					vbat_max = <0x10cc>;
					ibat_thre = <0xaa>;
					vbat_max_margin = <0x0a>;
					delta_cv_max = <0x14>;
					force_trim_enable = <0x00>;
					cv_ibat_min_thre = <0x0a>;
					phandle = <0x406>;
				};

				scharger_v700_coul {
					compatible = "hisilicon,scharger_coul";
					interrupt-parent = <0x50>;
					interrupts = <0x06 0x00>;
					interrupt-names = "coul_irq";
					phandle = <0x407>;

					batt_l {
						compatible = "hisilicon,coul_algo_core";
						batt_index = <0x01>;
						batt_name = "battery_gauge_aux";
						batt_indentify_fcc = <0x00>;
						adc_batt_id = <0x0b>;
						r_pcb = <0x00>;
						r_coul_uohm = <0x3e8>;
						ntc_compensation_is = <0x00>;
						current_offset_a = <0xf4240>;
						current_full_enable = <0x00>;
						low_temp_opt_enable = <0x00>;
						soc_at_term = <0x61>;
						normal_cutoff_vol_mv = <0xc4e>;
						sleep_cutoff_vol_mv = <0xd16>;
						low_vol_filter_cnt = <0x03>;
						dischg_ocv_soc = <0x05>;
						wakelock_low_batt_soc = <0x00>;
						phandle = <0x408>;
					};

					batt_h {
						compatible = "hisilicon,coul_algo_core";
						batt_index = <0x00>;
						batt_name = "battery_gauge";
						batt_indentify_fcc = <0x00>;
						adc_batt_id = <0x0c>;
						r_pcb = <0x00>;
						r_coul_uohm = <0x3e8>;
						ntc_compensation_is = <0x00>;
						current_offset_a = <0xf4240>;
						current_full_enable = <0x00>;
						low_temp_opt_enable = <0x00>;
						soc_at_term = <0x61>;
						normal_cutoff_vol_mv = <0xc4e>;
						sleep_cutoff_vol_mv = <0xd16>;
						low_vol_filter_cnt = <0x03>;
						dischg_ocv_soc = <0x05>;
						wakelock_low_batt_soc = <0x00>;
						phandle = <0x409>;
					};
				};

				hisi_scharger_eis@1 {
					compatible = "hisilicon,scharger_eis";
					batt_l_index = <0x01>;
					batt_h_index = <0x00>;
					scharger_eis_freq_support = <0x01>;
					scharger_eis_time_support = <0x00>;
					scharger_eis_wavelet_support = <0x00>;
					scharger_eis_support = <0x01>;
					status = "disabled";
					phandle = <0x40a>;
				};
			};

			bq25892_charger_i2c6@6B {
				compatible = "huawei,bq25892_charger";
				reg = <0x6b>;
				bat_comp = <0x3c>;
				vclamp = <0xc0>;
				rilim = <0x7c>;
				adc_channel_iin = <0x05>;
				adc_channel_vbat_sys = <0x0e>;
				fcp_support = <0x00>;
				ico_current_mode = <0x00>;
				status = "disabled";
				phandle = <0x40b>;
			};

			hi6523_charger_i2c6@6B {
				compatible = "huawei,hi6523_charger";
				reg = <0x6b>;
				bat_comp = <0x3c>;
				vclamp = <0xc0>;
				adc_channel_vbat_sys = <0x0e>;
				single_phase_buck = <0x00>;
				fcp_support = <0x00>;
				status = "disabled";
				phandle = <0x40c>;
			};

			hi6526_charger_i2c6@6B {
				compatible = "huawei,hi6526_charger";
				reg = <0x6b>;
				chip_version = <0x00>;
				gpio_int = <0x43 0x0f 0x00>;
				bat_comp = <0x3c>;
				vclamp = <0xc0>;
				default_vterm = <0x1130>;
				adc_channel_vbat_sys = <0x0e>;
				fcp_support = <0x01>;
				scp_support = <0x01>;
				lvc_ibat_regulator = <0x2fa8>;
				lvc_vbat_regulator = <0x1194>;
				lvc_vout_regulator = <0x11c6>;
				lvc_ibus_regulator = <0x15e0>;
				sc_ibat_regulator = <0x2fa8>;
				sc_vbat_regulator = <0x1194>;
				sc_vout_regulator = <0x11c6>;
				sc_ibus_regulator = <0x15e0>;
				lvc_vusb2vbus_drop_en = <0x01>;
				sc_vusb2vbus_drop_en = <0x01>;
				vusb_uv_flag = <0x01>;
				scp_post_exit = <0x00>;
				status = "disabled";
				phandle = <0x40d>;

				hisi_usb_typec_v600 {
					compatible = "hisilicon,hisi-usb-typec";
					check_hardreset_state;
					status = "ok";
					phandle = <0x40e>;

					hisi_tcpc {
						compatible = "hisilicon,hisi_tcpc";
						status = "ok";
						hisi-tcpc,supported_modes = <0x00>;
						hisi-tcpc,name = "hisi-tcpc";
						hisi-tcpc,role_def = <0x05>;
						hisi-tcpc,rp_level = <0x00>;

						hisi_tcpc_regs {
							cdr_cfg_0 = <0xd8>;
							dbg_cfg_1 = <0xdb>;
							sc_buck_en = <0xfe>;
							irq_gbl_msk = <0x1c8>;
							irq_msk_pd_bit = <0x04>;
							abnormal_irq_sts = <0xe8>;
							abnormal_irq_msk = <0x1ce>;
							cc_ovp_irq = <0x80>;
							cfg_reg_1 = <0x28e>;
							aux_sbu_en = <0x00>;
							jtag_sbu_en = <0x00>;
						};

						pd-data-objects {
							pd,source-pdo-size = <0x01>;
							pd,source-pdo-data = <0x19064>;
							pd,sink-pdo-size = <0x02>;
							pd,sink-pdo-data = <0x190c8 0x2d0c8>;
							pd,id-vdo-size = <0x06>;
							pd,id-vdo-data = <0xd50012d1 0x00 0x107e0000 0x30080000 0x00 0x30000000>;
						};

						dpm-caps {
							local_dr_power;
							local_dr_data;
							local_usb_comm;
							local_no_suspend;
							local_vconn_supply;
							attemp_enter_dp_mode;
							attemp_discover_cable;
							attemp_discover_id;
							pr_check = <0x00>;
							pr_check_gp_source;
							dr_check = <0x00>;
							snk_prefer_low_voltage;
						};

						display-port {
							1st_connection = "dfp_d";
							2nd_connection = "dfp_d";
							signal,dp_v13;
							typec,receptacle;

							ufp_d {
							};

							dfp_d {
								pin_assignment,mode_c;
								pin_assignment,mode_d;
								pin_assignment,mode_e;
								pin_assignment,mode_f;
							};
						};
					};
				};

				hi6526_cv {
					compatible = "hisilicon,scharger_cv";
					vbat_max = <0x10cc>;
					ibat_thre = <0xc8>;
					vbat_max_margin = <0x0a>;
					delta_cv_max = <0x14>;
					cv_ibat_min_thre = <0x0a>;
					status = "ok";
					phandle = <0x40f>;
				};

				hi6526v510_ufcs {
					gpios = <0x43 0x11 0x00>;
					compatible = "hisilicon,ufcs-driver";
					status = "disabled";
				};
			};

			wireless_idtp9221_i2c6@61 {
				compatible = "huawei, wireless_idtp9221";
				reg = <0x61>;
				rx_fod_5v = <0x14c1 0x10a0 0x1098 0x1098 0x109b 0x109c 0x1414 0x00>;
				rx_fod_9v = <0x2d96 0x2d88 0x2888 0x2886 0x1986 0x1986 0x00 0x00>;
				rx_fod_12v = <0x2d96 0x2d88 0x2888 0x2886 0x1986 0x1986 0x00 0x00>;
				rx_ss_good_lth = <0x5f>;
				status = "disabled";
				phandle = <0x410>;
			};

			fusb30x_kirin980_i2c6@22 {
				compatible = "fairchild,fusb302";
				reg = <0x22>;
				status = "disabled";
				vconn_swap_to_on_supported;
				vconn_swap_to_off_supported;
				dp_enabled;
				modal_operation_supported;
				discover_mode_supported;
				enter_mode_supported;
				discover_svid_supported;
			};

			superswitch_fusb3601_kirin980_i2c6@25 {
				compatible = "fairchild,fusb3601";
				reg = <0x25>;
				status = "disabled";
			};

			tusb422_kirin980_i2c6@20 {
				compatible = "ti,tusb422-usb-pd";
				reg = <0x20>;
				status = "disabled";
				ti,usb-comm-capable;
				ti,no-usb-suspend;
				ti,dual-role-data;
				ti,auto-accept-swap-to-dfp;
				ti,auto-accept-swap-to-ufp;
				ti,auto-accept-swap-to-source;
				ti,auto-accept-swap-to-sink;
				ti,auto-accept-vconn-swap;
				ti,src-settling-time-ms = <0x32>;
				ti,fast-role-swap-support = <0x00>;
				ti,pdo-priority = <0x00>;
				ti,role = <0x02>;
				ti,rp-val = <0x00>;
				ti,flags = <0x02>;
				ti,id-header-vdo = <0xd50012d1>;
				ti,cert-stat-vdo = <0x00>;
				ti,product-vdo = <0x107e0000>;
				ti,num-product-type-vdos = <0x00>;
				ti,product-type-vdo-1 = <0x00>;
				ti,product-type-vdo-2 = <0x00>;
				ti,product-type-vdo-3 = <0x00>;
				ti,num-svids = <0x01>;
				ti,svid-1 = <0xff01>;
				ti,svid-2 = <0x00>;
				ti,svid-3 = <0x00>;
				ti,mode-1 = <0x1c46>;
				ti,mode-2 = <0x00>;
				ti,mode-3 = <0x00>;

				source1 {
					ti,current-flow = <0x00>;
					ti,supply-type = <0x00>;
					ti,pdo-number = <0x00>;
					ti,min-voltage = <0x1388>;
					ti,max-voltage = <0x00>;
					ti,peak-current = <0x00>;
					ti,max-current = <0x3e8>;
					ti,max-power = <0x00>;
				};

				sink1 {
					ti,current-flow = <0x01>;
					ti,supply-type = <0x00>;
					ti,pdo-number = <0x00>;
					ti,min-voltage = <0x1388>;
					ti,max-voltage = <0x00>;
					ti,max-operating-curr = <0x7d0>;
					ti,min-operating-curr = <0x64>;
					ti,operational-curr = <0x7d0>;
					ti,max-operating-pwr = <0x00>;
					ti,min-operating-pwr = <0x00>;
					ti,operational-pwr = <0x00>;
					ti,peak-current = <0x00>;
				};

				sink2 {
					ti,current-flow = <0x01>;
					ti,supply-type = <0x00>;
					ti,pdo-number = <0x01>;
					ti,min-voltage = <0x2328>;
					ti,max-voltage = <0x00>;
					ti,max-operating-curr = <0x7d0>;
					ti,min-operating-curr = <0x64>;
					ti,operational-curr = <0x7d0>;
					ti,max-operating-pwr = <0x00>;
					ti,min-operating-pwr = <0x00>;
					ti,operational-pwr = <0x00>;
					ti,peak-current = <0x00>;
				};
			};

			rt1711_kirin980_i2c6@4e {
				compatible = "richtek,rt1711";
				reg = <0x4e>;
				status = "disabled";
				rt-dual,supported_modes = <0x00>;
				rt-tcpc,name = "type_c_port0";
				rt-tcpc,role_def = <0x04>;
				rt-tcpc,rp_level = <0x00>;
				rt-tcpc,vconn_supply = <0x01>;
				rt-tcpc,notifier_supply_num = <0x00>;

				pd-data {
					pd,source-pdo-size = <0x01>;
					pd,source-pdo-data = <0x19064>;
					pd,sink-pdo-size = <0x02>;
					pd,sink-pdo-data = <0x190c8 0x2d0c8>;
					pd,id-vdo-size = <0x03>;
					pd,id-vdo-data = <0xd40012d1 0x00 0x107e0000>;
				};

				dpm_caps {
					local_dr_power;
					local_dr_data;
					local_usb_comm;
					local_no_suspend;
					local_vconn_supply;
					attemp_enter_dp_mode;
					attemp_discover_cable;
					attemp_discover_id;
					pr_check = <0x00>;
					pr_check_gp_source;
					dr_check = <0x00>;
					snk_prefer_low_voltage;
				};

				displayport {
					1st_connection = "dfp_d";
					2nd_connection = "dfp_d";
					signal,dp_v13;
					typec,receptacle;

					ufp_d {
					};

					dfp_d {
						pin_assignment,mode_c;
						pin_assignment,mode_d;
						pin_assignment,mode_e;
						pin_assignment,mode_f;
					};
				};
			};
		};

		i2c@FF88F000 {
			hold-time = <0x430043>;
			#address-cells = <0x01>;
			#size-cells = <0x00>;
			compatible = "hisilicon,hisi-i2c-master";
			reg = <0x00 0xff88f000 0x00 0x1000>;
			interrupts = <0x00 0x168 0x04>;
			clocks = <0x51 0x26>;
			clock-names = "clk_i2c", "apb_pclk";
			delay-off = <0x12c>;
			reset-reg-base = <0x00 0xffb85000 0x00 0x1000>;
			reset-controller-reg = <0x60 0x64 0x68 0x0e>;
			i2c-ioc-base = <0x00 0xfb228000 0x00 0x1000>;
			i2c-pad-ioc-base = <0x00 0xfb229000 0x00 0x1000>;
			i2c-recover-val = <0x798 0x04 0x04 0x00>;
			status = "ok";
			clock-rate = <0x00 0x6acfc00>;
			pinctrl-names = "default", "idle";
			pinctrl-0 = <0x52 0x53 0x54 0x55>;
			pinctrl-1 = <0x56 0x57 0x58 0x59>;
			cs-gpios = <0x43 0x06 0x00 0x43 0x07 0x00>;
			phandle = <0x411>;

			echub_i2c@38 {
				status = "ok";
				reg = <0x38>;
				compatible = "huawei,echub_i2c";

				echub_mcu {
					phandle = <0x88c>;
					status = "ok";
					state_sync_cmd = <0x6a5>;
					s4_signal = <0x03>;
					s0_signal = <0x02>;
					s5_signal = <0x01>;
					compatible = "huawei,echub_mcu_state_sync";
				};

				overheat {
					phandle = <0x88b>;
					status = "ok";
					temp_trigger_fallback_info = "2", "60000", "120000";
					temp_adc_map = "1", "7", "2", "4";
					compatible = "huawei,echub_overheat";
				};

				fan0 {
					phandle = <0x88a>;
					status = "ok";
					temp_trigger_fallback_table2 = "1", "37000", "35000", "1", "40000", "38000", "1", "44000", "42000", "1", "49000", "47000", "1", "56000", "54000";
					switch_table2_conds = "2", "36000", "34000";
					temp_trigger_fallback_table1 = "1", "30000", "28000", "1", "40000", "38000", "1", "46000", "43000", "1", "51000", "49000", "1", "62000", "60000";
					fan_gear_table = "900", "1700", "2100", "2500", "2700", "3000";
					time_to_trigger = <0x02>;
					fan_idx = <0x00>;
					pwms = <0x180 0x00 0x9c40>;
					compatible = "huawei,echub_fan0";
				};

				echub_rtc {
					status = "ok";
					compatible = "huawei,echub-rtc";
				};

				echub_lid {
					phandle = <0x889>;
					status = "disabled";
					gpio-key-lid = <0xc3>;
					compatible = "huawei,echub-lid";
				};

				muteled {
					phandle = <0x888>;
					status = "disabled";
					muteled_reg_addr = <0x277>;
					compatible = "huawei,echub-muteled";
				};

				echub_battery {
					phandle = <0x887>;
					status = "disabled";
					vth_correct_para = <0x06 0xe42 0x0a 0xe6a>;
					vth_correct_en = <0x01>;
					bci_soc_at_term = <0x64>;
					bci_work_interval_para = "0", "10", "5000", "10", "90", "10000", "90", "100", "30000";
					temp_below_vr_min = <0x00>;
					temp_shutdown = <0x44>;
					temp_throttling = <0x00>;
					battery_board_type = <0x01>;
					battery_is_removable = <0x00>;
					ac_status_gpio = <0x4e 0x03 0x00>;
					compatible = "huawei,echub_battery";
				};

				power@0 {
					compatible = "huawei,echub-power";

					regulators {

						LDO6 {
							status = "disabled";
							regulator-name = "EC_CAM_PWR_EN";
						};

						LDO5 {
							phandle = <0xff3>;
							status = "disabled";
							regulator-name = "EC_3V3_EN";
						};

						LDO4 {
							phandle = <0x886>;
							status = "disabled";
							regulator-name = "EC_1V1_EN";
						};

						LDO3 {
							phandle = <0xfeb>;
							status = "disabled";
							regulator-name = "EC_1V8_EN";
						};

						LDO2 {
							phandle = <0x885>;
							status = "disabled";
							regulator-name = "EC_HDMI_VDD_ON";
						};

						LDO1 {
							phandle = <0xfea>;
							status = "disabled";
							regulator-name = "EC_DSI_VCCIO_ON";
						};

						LDO0 {
							phandle = <0xfe9>;
							status = "disabled";
							regulator-name = "EC_1V2_EN";
						};
					};
				};
			};
		};

		i2c@FB227000 {
			#address-cells = <0x01>;
			#size-cells = <0x00>;
			compatible = "hisilicon,hisi-i2c-master";
			reg = <0x00 0xfb227000 0x00 0x1000>;
			interrupts = <0x00 0x37 0x04>;
			clocks = <0x5a 0x26>;
			clock-names = "clk_i2c", "apb_pclk";
			delay-off = <0x12c>;
			reset-reg-base = <0x00 0xfb21b000 0x00 0x1000>;
			reset-controller-reg = <0x218 0x21c 0x220 0x15>;
			i2c-ioc-base = <0x00 0xee265000 0x00 0x1000>;
			i2c-pad-ioc-base = <0x00 0xee266000 0x00 0x1000>;
			i2c-recover-val = <0x1c 0x01 0x01 0x00>;
			status = "disabled";
			clock-rate = <0x00 0x6422c40>;
			pinctrl-names = "default", "idle";
			pinctrl-0 = <0x5b 0x5c 0x5d 0x5e>;
			pinctrl-1 = <0x5f 0x60 0x61 0x62>;
			cs-gpios = <0x63 0x07 0x00 0x63 0x08 0x00>;
			phandle = <0x412>;
		};

		uart@ff894000 {
			compatible = "hisilicon,uart";
			reg = <0x00 0xff894000 0x00 0x1000>;
			interrupts = <0x00 0x18b 0x04>;
			dma-names = [00 00];
			dmas;
			clocks = <0x64 0x65>;
			clock-names = "clk_uart0_fac", "apb_pclk";
			reset-enable-flag = <0x00>;
			reset-reg-base = <0x00 0xffb85000 0x00 0x1000>;
			reset-controller-reg = <0x78 0x7c 0x80 0x0a>;
			status = "ok";
			pinctrl-names = "default", "idle";
			pinctrl-0 = <0x66 0x67 0x68 0x69 0x6a 0x6b 0x6c 0x6d>;
			pinctrl-1 = <0x6e 0x6f 0x70 0x71 0x72 0x73 0x74 0x75>;
			clock-rate = <0x00 0x6acfc00>;
			console-fifo-enable = <0x01>;
			console-fifo-size = <0x40000>;
			console-fifo-cpuon = <0x03>;
			cts-flag = <0x01>;
			phandle = <0x413>;
		};

		uart@ff881000 {
			compatible = "hisilicon,uart";
			reg = <0x00 0xff881000 0x00 0x1000>;
			interrupts = <0x00 0x18c 0x04>;
			dma-names = "rx", "tx";
			dmas = <0x76 0x06 0x76 0x07>;
			clocks = <0x77 0x78>;
			clock-names = "clk_uart4", "apb_pclk";
			reset-enable-flag = <0x01>;
			reset-reg-base = <0x00 0xffb85000 0x00 0x1000>;
			reset-controller-reg = <0x78 0x7c 0x80 0x0e>;
			status = "ok";
			pinctrl-names = "default", "idle";
			pinctrl-0 = <0x79 0x7a 0x7b 0x7c 0x7d 0x7e 0x7f 0x80>;
			pinctrl-1 = <0x81 0x82 0x83 0x84 0x85 0x86 0x87 0x88>;
			clock-rate = <0x00 0xa037a00>;
			bind-interrupt-flag = <0x01>;
			rx-use-global-sg-buf = <0x01>;
			cts-flag = <0x01>;
			phandle = <0x414>;
		};

		uart@ff885000 {
			compatible = "hisilicon,uart";
			reg = <0x00 0xff885000 0x00 0x1000>;
			interrupts = <0x00 0x18d 0x04>;
			dma-names = "rx", "tx";
			dmas = <0x76 0x08 0x76 0x09>;
			clocks = <0x89 0x89>;
			clock-names = "clk_uart5", "apb_pclk";
			reset-enable-flag = <0x01>;
			reset-reg-base = <0x00 0xffb85000 0x00 0x1000>;
			reset-controller-reg = <0x78 0x7c 0x80 0x0f>;
			status = "ok";
			pinctrl-names = "default", "idle";
			pinctrl-0 = <0x8a 0x8b 0x8c 0x8d 0x8e 0x8f 0x90 0x91>;
			pinctrl-1 = <0x92 0x93 0x94 0x95 0x96 0x97 0x98 0x99>;
			clock-rate = <0x00 0x6acfc00>;
			bind-interrupt-flag = <0x01>;
			rx-use-global-sg-buf = <0x01>;
			cts-flag = <0x01>;
			phandle = <0x415>;
		};

		uart@ffb82000 {
			compatible = "hisilicon,uart";
			reg = <0x00 0xffb82000 0x00 0x1000>;
			interrupts = <0x00 0x18e 0x04>;
			clocks = <0x9a 0x26>;
			clock-names = "uart6clk", "apb_pclk";
			reset-enable-flag = <0x00>;
			reset-reg-base = <0x00 0xfb21b000 0x00 0x1000>;
			reset-controller-reg = <0x970 0x974 0x978 0x09>;
			status = "ok";
			pinctrl-names = "default", "idle";
			pinctrl-0 = <0x9b 0x9c 0x9d 0x9e>;
			pinctrl-1 = <0x9f 0xa0 0xa1 0xa2>;
			clock-rate = <0x00 0x124f800>;
			console-fifo-enable = <0x01>;
			console-fifo-size = <0x40000>;
			console-fifo-cpuon = <0x03>;
			cts-flag = <0x01>;
			phandle = <0x416>;
		};

		spi@ff888000 {
			#address-cells = <0x01>;
			#size-cells = <0x00>;
			compatible = "spi-v500-master";
			status = "disabled";
			reg = <0x00 0xff888000 0x00 0x1000>;
			interrupts = <0x00 0x17b 0x04>;
			clocks = <0xa3 0xa3>;
			clock-names = "clk_spi1", "apb_pclk";
			bus-id = <0x01>;
			enable-dma = <0x01>;
			dmas = <0x76 0x0a 0x76 0x0b>;
			dma-names = "rx", "tx";
			num-cs = <0x04>;
			clock-rate = <0x00 0x1ab3f00>;
			pinctrl-names = "default", "idle";
			pinctrl-0;
			pinctrl-1;
			phandle = <0x417>;

			spi_dev13@13 {
				pl022,slave-tx-disable = <0x00>;
				pl022,duplex = <0x00>;
				pl022,wait-state = <0x00>;
				pl022,ctrl-len = <0x07>;
				pl022,tx-level-trig = <0x03>;
				pl022,rx-level-trig = <0x03>;
				pl022,interface = <0x00>;
				pl022,com-mode = <0x02>;
				reg = <0x03>;
				spi-max-frequency = <0xc65d40>;
				compatible = "spi_dev13";
			};

			spi_dev12@12 {
				pl022,slave-tx-disable = <0x00>;
				pl022,duplex = <0x00>;
				pl022,wait-state = <0x00>;
				pl022,ctrl-len = <0x07>;
				pl022,tx-level-trig = <0x03>;
				pl022,rx-level-trig = <0x03>;
				pl022,interface = <0x00>;
				pl022,com-mode = <0x01>;
				reg = <0x02>;
				spi-max-frequency = <0xc65d40>;
				compatible = "spi_dev12";
			};

			spi_dev11@11 {
				pl022,slave-tx-disable = <0x00>;
				pl022,duplex = <0x00>;
				pl022,wait-state = <0x00>;
				pl022,ctrl-len = <0x07>;
				pl022,tx-level-trig = <0x03>;
				pl022,rx-level-trig = <0x03>;
				pl022,interface = <0x00>;
				pl022,com-mode = <0x00>;
				reg = <0x01>;
				spi-max-frequency = <0xc65d40>;
				compatible = "spi_dev11";
			};
		};

		spi@fb21f000 {
			hardware-mutex = <0x01>;
			#address-cells = <0x01>;
			#size-cells = <0x00>;
			compatible = "spi-v500-master";
			status = "ok";
			interrupts = <0x00 0x17c 0x04>;
			reg = <0x00 0xfb21f000 0x00 0x1000>;
			clocks = <0xa4 0xa4>;
			clock-names = "clk_spi3", "apb_pclk";
			bus-id = <0x03>;
			enable-dma = <0x01>;
			dmas = <0x76 0x0c 0x76 0x0d>;
			dma-names = "rx", "tx";
			num-cs = <0x04>;
			clock-rate = <0x00 0x328b740>;
			pinctrl-names = "default", "idle";
			pinctrl-0 = <0xa5 0xa6 0xa7 0xa8 0xa9 0xaa>;
			pinctrl-1 = <0xab 0xac 0xad 0xae 0xaf 0xb0>;
			phandle = <0x418>;

			spi_dev33@33 {
				pl022,slave-tx-disable = <0x00>;
				pl022,duplex = <0x00>;
				pl022,wait-state = <0x00>;
				pl022,ctrl-len = <0x07>;
				pl022,tx-level-trig = <0x03>;
				pl022,rx-level-trig = <0x03>;
				pl022,interface = <0x00>;
				pl022,com-mode = <0x02>;
				reg = <0x03>;
				spi-max-frequency = <0xc65d40>;
				compatible = "spi_dev33";
			};

			spi_dev32@32 {
				pl022,slave-tx-disable = <0x00>;
				pl022,duplex = <0x00>;
				pl022,wait-state = <0x00>;
				pl022,ctrl-len = <0x07>;
				pl022,tx-level-trig = <0x03>;
				pl022,rx-level-trig = <0x03>;
				pl022,interface = <0x00>;
				pl022,com-mode = <0x01>;
				reg = <0x02>;
				spi-max-frequency = <0xc65d40>;
				compatible = "spi_dev32";
			};

			spi_dev31@31 {
				pl022,slave-tx-disable = <0x00>;
				pl022,duplex = <0x00>;
				pl022,wait-state = <0x00>;
				pl022,ctrl-len = <0x07>;
				pl022,tx-level-trig = <0x03>;
				pl022,rx-level-trig = <0x03>;
				pl022,interface = <0x00>;
				pl022,com-mode = <0x00>;
				reg = <0x01>;
				spi-max-frequency = <0xc65d40>;
				compatible = "spi_dev31";
			};

			huawei_thp@10 {
				thp-vcc-value = <0x2f4d60>;
				thp-vcc-supply = <0x659>;
				thp-vcc-type = <0x01>;
				thp-iovdd-gpio = <0x4e 0x09 0x00>;
				thp-iovdd-type = <0x02>;
				pt_station_test = <0x00>;
				use_hwlock = <0x01>;
				supported_func_indicater = <0x00>;
				spi_sync_cs_low_delay_ns = <0x0a>;
				spi_sync_cs_hi_delay_ns = <0xc8>;
				suspend_reset_after_delay_ms = <0x01>;
				resume_reset_after_delay_ms = <0x01>;
				boot_reset_after_delay_ms = <0x00>;
				boot_reset_low_delay_ms = <0x00>;
				boot_reset_hi_delay_ms = <0x01>;
				rst_gpio = <0x166 0x01 0x00>;
				cs_gpio = <0x4f 0x11 0x00>;
				irq_gpio = <0x4f 0x12 0x00>;
				pl022,slave-tx-disable = <0x00>;
				pl022,duplex = <0x00>;
				pl022,wait-state = <0x00>;
				pl022,ctrl-len = <0x07>;
				pl022,tx-level-trig = <0x03>;
				pl022,rx-level-trig = <0x03>;
				pl022,interface = <0x00>;
				pl022,com-mode = <0x02>;
				use_fb_notify_to_sr = <0x01>;
				kirin-udp;
				spi-mode = <0x00>;
				reg = <0x00>;
				spi-bus-id = <0x03>;
				spi-max-frequency = <0x989680>;
				irq_flag = <0x02>;
				status = "ok";
				compatible = "huawei,thp";

				goodix_thp {
					need_resume_reset = <0x01>;
					support_oem_info = <0x00>;
					delay_work_for_pm = <0x00>;
					resume_reset_after_delay_ms = <0x02>;
					boot_reset_after_delay_ms = <0x64>;
					boot_reset_low_delay_ms = <0x01>;
					boot_reset_hi_delay_ms = <0x01>;
					spi_sync_cs_low_delay_ns = <0x64>;
					spi_sync_cs_hi_delay_ns = <0x64>;
					spi-max-frequency = <0xb71b00>;
					support_vendor_ic_type = <0x01>;
					project_in_tp = <0x01>;
				};

				thp_input_dev {
					abs_max_y = <0x924>;
					abs_max_x = <0x438>;
					compatible = "huawei,thp_input";
				};
			};
		};

		spi@fb215000 {
			#address-cells = <0x01>;
			#size-cells = <0x00>;
			compatible = "spi-v500-master";
			status = "ok";
			interrupts = <0x00 0x35 0x04>;
			reg = <0x00 0xfb215000 0x00 0x1000>;
			clocks = <0xb1 0xa4>;
			clock-names = "clk_spi5", "apb_pclk";
			bus-id = <0x05>;
			enable-dma = <0x01>;
			dmas = <0x76 0x02 0x76 0x03>;
			dma-names = "rx", "tx";
			num-cs = <0x04>;
			clock-rate = <0x00 0x328b740>;
			pinctrl-names = "default", "idle";
			pinctrl-0 = <0xb2 0xb3 0xb4 0xb5 0xb6 0xb7>;
			pinctrl-1 = <0xb8 0xb9 0xba 0xbb 0xbc 0xbd>;
			phandle = <0x419>;

			spi_dev53@53 {
				pl022,slave-tx-disable = <0x00>;
				pl022,duplex = <0x00>;
				pl022,wait-state = <0x00>;
				pl022,ctrl-len = <0x07>;
				pl022,tx-level-trig = <0x03>;
				pl022,rx-level-trig = <0x03>;
				pl022,interface = <0x00>;
				pl022,com-mode = <0x02>;
				reg = <0x03>;
				spi-max-frequency = <0xc65d40>;
				compatible = "spi_dev53";
			};

			spi_dev52@52 {
				pl022,slave-tx-disable = <0x00>;
				pl022,duplex = <0x00>;
				pl022,wait-state = <0x00>;
				pl022,ctrl-len = <0x07>;
				pl022,tx-level-trig = <0x03>;
				pl022,rx-level-trig = <0x03>;
				pl022,interface = <0x00>;
				pl022,com-mode = <0x01>;
				reg = <0x02>;
				spi-max-frequency = <0xc65d40>;
				compatible = "spi_dev52";
			};

			spi_dev51@51 {
				pl022,slave-tx-disable = <0x00>;
				pl022,duplex = <0x00>;
				pl022,wait-state = <0x00>;
				pl022,ctrl-len = <0x07>;
				pl022,tx-level-trig = <0x03>;
				pl022,rx-level-trig = <0x03>;
				pl022,interface = <0x00>;
				pl022,com-mode = <0x00>;
				reg = <0x01>;
				spi-max-frequency = <0xc65d40>;
				compatible = "spi_dev51";
			};
		};

		spi@ff88a000 {
			cs-gpios = <0x196 0x15 0x01>;
			#address-cells = <0x01>;
			#size-cells = <0x00>;
			compatible = "spi-v500-master";
			status = "ok";
			interrupts = <0x00 0x2a3 0x04>;
			reg = <0x00 0xff88a000 0x00 0x1000>;
			bus-id = <0x06>;
			enable-dma = <0x01>;
			dmas = <0x76 0x04 0x76 0x05>;
			dma-names = "rx", "tx";
			num-cs = <0x04>;
			clocks = <0xbe 0xbe>;
			clock-names = "clk_spi6", "apb_pclk";
			clock-rate = <0x00 0x18cba80>;
			pinctrl-names = "default", "idle";
			pinctrl-0 = <0x250 0x252 0x254 0x27b 0x27d 0x27f>;
			pinctrl-1 = <0x251 0x253 0x255 0x27c 0x27e 0x280>;
			phandle = <0x41a>;

			spi_dev63@63 {
				status = "disabled";
				pl022,slave-tx-disable = <0x00>;
				pl022,duplex = <0x00>;
				pl022,wait-state = <0x00>;
				pl022,ctrl-len = <0x07>;
				pl022,tx-level-trig = <0x03>;
				pl022,rx-level-trig = <0x03>;
				pl022,interface = <0x00>;
				pl022,com-mode = <0x02>;
				reg = <0x03>;
				spi-max-frequency = <0xc65d40>;
				compatible = "spi_dev63";
			};

			spi_dev62@62 {
				status = "disabled";
				pl022,slave-tx-disable = <0x00>;
				pl022,duplex = <0x00>;
				pl022,wait-state = <0x00>;
				pl022,ctrl-len = <0x07>;
				pl022,tx-level-trig = <0x03>;
				pl022,rx-level-trig = <0x03>;
				pl022,interface = <0x00>;
				pl022,com-mode = <0x01>;
				reg = <0x02>;
				spi-max-frequency = <0xc65d40>;
				compatible = "spi_dev62";
			};

			spi_dev61@61 {
				status = "disabled";
				pl022,slave-tx-disable = <0x00>;
				pl022,duplex = <0x00>;
				pl022,wait-state = <0x00>;
				pl022,ctrl-len = <0x07>;
				pl022,tx-level-trig = <0x03>;
				pl022,rx-level-trig = <0x03>;
				pl022,interface = <0x00>;
				pl022,com-mode = <0x00>;
				reg = <0x01>;
				spi-max-frequency = <0xc65d40>;
				compatible = "spi_dev61";
			};

			tpm_tis_spi@0 {
				status = "disabled";
				pl022,slave-tx-disable = <0x00>;
				pl022,duplex = <0x00>;
				pl022,wait-state = <0x00>;
				pl022,ctrl-len = <0x07>;
				pl022,tx-level-trig = <0x03>;
				pl022,rx-level-trig = <0x03>;
				pl022,interface = <0x00>;
				pl022,com-mode = <0x01>;
				spi-max-frequency = <0xc65d40>;
				reg = <0x00>;
				compatible = "nationz,z32h330tc", "tcg,tpm_tis-spi";
			};
		};

		gpio@ff802000 {
			#address-cells = <0x02>;
			compatible = "arm,hiv500", "arm,primecell", "arm,primecell0";
			reg = <0x00 0xff802000 0x00 0x1000>;
			arm,primecell-periphid = <0x48500>;
			base,offset = <0x00>;
			interrupts = <0x00 0x23a 0x04>;
			gpio-controller;
			#gpio-cells = <0x02>;
			gpio-ranges = <0xbf 0x01 0x01 0x11 0xbf 0x14 0x12 0x0c>;
			interrupt-controller;
			#interrupt-cells = <0x02>;
			clocks = <0xc0 0x26>;
			clock-names = "pclk_gpio0", "apb_pclk";
			status = "ok";
			phandle = <0x2f>;
		};

		gpio@ff806000 {
			#address-cells = <0x02>;
			compatible = "arm,hiv500", "arm,primecell", "arm,primecell1";
			reg = <0x00 0xff806000 0x00 0x1000>;
			arm,primecell-periphid = <0x48500>;
			base,offset = <0x20>;
			interrupts = <0x00 0x23b 0x04>;
			gpio-controller;
			#gpio-cells = <0x02>;
			gpio-ranges = <0xbf 0x00 0x1e 0x11>;
			interrupt-controller;
			#interrupt-cells = <0x02>;
			clocks = <0xc1 0x26>;
			clock-names = "pclk_gpio1", "apb_pclk";
			status = "ok";
			phandle = <0x166>;
		};

		gpio@ff812000 {
			#address-cells = <0x02>;
			compatible = "arm,hiv500", "arm,primecell", "arm,primecell2";
			reg = <0x00 0xff812000 0x00 0x1000>;
			arm,primecell-periphid = <0x48500>;
			base,offset = <0x40>;
			interrupts = <0x00 0x23e 0x04>;
			gpio-controller;
			#gpio-cells = <0x02>;
			gpio-ranges = <0xc2 0x01 0x00 0x01 0xc2 0x07 0x01 0x03 0xc2 0x0c 0x04 0x02>;
			interrupt-controller;
			#interrupt-cells = <0x02>;
			clocks = <0xc3 0x26>;
			clock-names = "pclk_gpio2", "apb_pclk";
			status = "ok";
			phandle = <0x4e>;
		};

		gpio@ee267000 {
			#address-cells = <0x02>;
			compatible = "arm,hiv500", "arm,primecell", "arm,primecell3";
			reg = <0x00 0xee267000 0x00 0x1000>;
			arm,primecell-periphid = <0x48500>;
			base,offset = <0x60>;
			interrupts = <0x00 0x248 0x04>;
			gpio-controller;
			#gpio-cells = <0x02>;
			gpio-ranges = <0xc4 0x00 0x00 0x06 0xc4 0x07 0x06 0x02 0xc4 0x0a 0x08 0x01>;
			interrupt-controller;
			#interrupt-cells = <0x02>;
			clocks = <0xc5 0x26>;
			clock-names = "pclk_gpio3", "apb_pclk";
			status = "ok";
			phandle = <0x63>;
		};

		gpio@fb22a000 {
			#address-cells = <0x02>;
			compatible = "arm,hiv500", "arm,primecell", "arm,primecell5";
			reg = <0x00 0xfb22a000 0x00 0x1000>;
			arm,primecell-periphid = <0x48500>;
			base,offset = <0xa0>;
			interrupts = <0x00 0x240 0x04>;
			gpio-controller;
			#gpio-cells = <0x02>;
			gpio-ranges = <0xc6 0x00 0x06 0x04 0xc6 0x16 0x0b 0x0a>;
			interrupt-controller;
			#interrupt-cells = <0x02>;
			clocks = <0xc7 0x26>;
			clock-names = "pclk_gpio5", "apb_pclk";
			status = "ok";
			phandle = <0x4f>;
		};

		gpio@fb22e000 {
			#address-cells = <0x02>;
			compatible = "arm,hiv500", "arm,primecell", "arm,primecell6";
			reg = <0x00 0xfb22e000 0x00 0x1000>;
			arm,primecell-periphid = <0x48500>;
			base,offset = <0xc0>;
			interrupts = <0x00 0x241 0x04>;
			gpio-controller;
			#gpio-cells = <0x02>;
			gpio-ranges = <0xc6 0x00 0x15 0x06 0xc6 0x0a 0x1b 0x01 0xc6 0x0f 0x1c 0x01 0xc6 0x11 0x20 0x05 0xc6 0x17 0x25 0x04>;
			interrupt-controller;
			#interrupt-cells = <0x02>;
			clocks = <0xc8 0x26>;
			clock-names = "pclk_gpio6", "apb_pclk";
			status = "ok";
			phandle = <0xf5>;
		};

		gpio@fb232000 {
			#address-cells = <0x02>;
			compatible = "arm,hiv500", "arm,primecell", "arm,primecell7";
			reg = <0x00 0xfb232000 0x00 0x1000>;
			arm,primecell-periphid = <0x48500>;
			base,offset = <0xe0>;
			interrupts = <0x00 0x242 0x04>;
			gpio-controller;
			#gpio-cells = <0x02>;
			gpio-ranges = <0xc6 0x00 0x29 0x01 0xc6 0x08 0x2a 0x02 0xc6 0x0b 0x2d 0x04 0xc6 0x13 0x31 0x0d>;
			interrupt-controller;
			#interrupt-cells = <0x02>;
			clocks = <0xc9 0x26>;
			clock-names = "pclk_gpio7", "apb_pclk";
			status = "ok";
			phandle = <0x43>;
		};

		gpio@fb236000 {
			#address-cells = <0x02>;
			compatible = "arm,hiv500", "arm,primecell", "arm,primecell8";
			reg = <0x00 0xfb236000 0x00 0x1000>;
			arm,primecell-periphid = <0x48500>;
			base,offset = <0x100>;
			interrupts = <0x00 0x243 0x04>;
			gpio-controller;
			#gpio-cells = <0x02>;
			gpio-ranges = <0xc6 0x02 0x3e 0x01>;
			interrupt-controller;
			#interrupt-cells = <0x02>;
			clocks = <0xca 0x26>;
			clock-names = "pclk_gpio8", "apb_pclk";
			status = "ok";
			phandle = <0x39>;
		};

		gpio@efb05000 {
			#address-cells = <0x02>;
			compatible = "arm,hiv500", "arm,primecell", "arm,primecell9";
			reg = <0x00 0xefb05000 0x00 0x1000>;
			arm,primecell-periphid = <0x48500>;
			base,offset = <0x140>;
			interrupts = <0x00 0x24a 0x04>;
			gpio-controller;
			#gpio-cells = <0x02>;
			gpio-ranges = <0xcb 0x00 0x00 0x0c 0xcb 0x19 0x15 0x04>;
			interrupt-controller;
			#interrupt-cells = <0x02>;
			clocks = <0xcc 0x26>;
			clock-names = "pclk_gpio9", "apb_pclk";
			status = "ok";
			phandle = <0x196>;
		};

		gpio@efb06000 {
			#address-cells = <0x02>;
			compatible = "arm,hiv500", "arm,primecell", "arm,primecell10";
			reg = <0x00 0xefb06000 0x00 0x1000>;
			arm,primecell-periphid = <0x48500>;
			base,offset = <0x160>;
			interrupts = <0x00 0x2a4 0x04>;
			gpio-controller;
			#gpio-cells = <0x02>;
			interrupt-controller;
			#interrupt-cells = <0x02>;
			clocks = <0xcd 0x26>;
			clock-names = "pclk_gpio10", "apb_pclk";
			status = "ok";
			phandle = <0x41b>;
		};

		etm@0,fd040000 {
			compatible = "arm,embedded-trace-extension";
			reg = <0x00 0xfd040000 0x00 0x10000>;
			arm,primecell-periphid = <0xbbd05>;
			clocks = <0x26>;
			clock-names = "apb_pclk";
			cpu = <0x18>;
			cti_name = "cti_cpu0";
			cluster_etb = <0xce>;
			cluster_funnel = <0xcf>;

			port {

				endpoint {
					remote-endpoint = <0xd0>;
					phandle = <0xd8>;
				};
			};
		};

		cti_cpu0@0,fd020000 {
			compatible = "arm,coresight-cti";
			reg = <0x00 0xfd020000 0x00 0x10000>;
			clocks = <0x26>;
			clock-names = "apb_pclk";
			cpu = <0x18>;
			coresight-name = "cti_cpu0";
			phandle = <0x41c>;
		};

		etm@1,fd140000 {
			compatible = "arm,embedded-trace-extension";
			reg = <0x00 0xfd140000 0x00 0x10000>;
			arm,primecell-periphid = <0xbbd05>;
			clocks = <0x26>;
			clock-names = "apb_pclk";
			cpu = <0x19>;
			cti_name = "cti_cpu1";
			cluster_etb = <0xce>;
			cluster_funnel = <0xcf>;

			port {

				endpoint {
					remote-endpoint = <0xd1>;
					phandle = <0xd9>;
				};
			};
		};

		cti_cpu1@1,fd120000 {
			compatible = "arm,coresight-cti";
			reg = <0x00 0xfd120000 0x00 0x10000>;
			clocks = <0x26>;
			clock-names = "apb_pclk";
			cpu = <0x19>;
			coresight-name = "cti_cpu1";
			phandle = <0x41d>;
		};

		etm@2,fd240000 {
			compatible = "arm,embedded-trace-extension";
			reg = <0x00 0xfd240000 0x00 0x10000>;
			arm,primecell-periphid = <0xbbd05>;
			clocks = <0x26>;
			clock-names = "apb_pclk";
			cpu = <0x1a>;
			cti_name = "cti_cpu2";
			cluster_etb = <0xce>;
			cluster_funnel = <0xcf>;

			port {

				endpoint {
					remote-endpoint = <0xd2>;
					phandle = <0xda>;
				};
			};
		};

		cti_cpu2@2,fd220000 {
			compatible = "arm,coresight-cti";
			reg = <0x00 0xfd220000 0x00 0x10000>;
			clocks = <0x26>;
			clock-names = "apb_pclk";
			cpu = <0x1a>;
			coresight-name = "cti_cpu2";
			phandle = <0x41e>;
		};

		etm@3,fd340000 {
			compatible = "arm,embedded-trace-extension";
			reg = <0x00 0xfd340000 0x00 0x10000>;
			arm,primecell-periphid = <0xbbd05>;
			clocks = <0x26>;
			clock-names = "apb_pclk";
			cpu = <0x1b>;
			cti_name = "cti_cpu3";
			cluster_etb = <0xce>;
			cluster_funnel = <0xcf>;

			port {

				endpoint {
					remote-endpoint = <0xd3>;
					phandle = <0xdb>;
				};
			};
		};

		cti_cpu3@3,fd320000 {
			compatible = "arm,coresight-cti";
			reg = <0x00 0xfd320000 0x00 0x10000>;
			clocks = <0x26>;
			clock-names = "apb_pclk";
			cpu = <0x1b>;
			coresight-name = "cti_cpu3";
			phandle = <0x41f>;
		};

		etm@4,fd440000 {
			compatible = "arm,coresight-etm4x", "arm,primecell";
			reg = <0x00 0xfd440000 0x00 0x10000>;
			arm,primecell-periphid = <0xb6d42>;
			clocks = <0x26>;
			clock-names = "apb_pclk";
			cpu = <0x1c>;
			cti_name = "cti_cpu4";
			cluster_etb = <0xce>;
			cluster_funnel = <0xcf>;

			port {

				endpoint {
					remote-endpoint = <0xd4>;
					phandle = <0xdc>;
				};
			};
		};

		cti_cpu4@4,fd420000 {
			compatible = "arm,coresight-cti";
			reg = <0x00 0xfd420000 0x00 0x10000>;
			clocks = <0x26>;
			clock-names = "apb_pclk";
			cpu = <0x1c>;
			coresight-name = "cti_cpu4";
			phandle = <0x420>;
		};

		etm@5,fd640000 {
			compatible = "arm,coresight-etm4x", "arm,primecell";
			reg = <0x00 0xfd640000 0x00 0x10000>;
			arm,primecell-periphid = <0xb6d42>;
			clocks = <0x26>;
			clock-names = "apb_pclk";
			cpu = <0x1e>;
			cti_name = "cti_cpu5";
			cluster_etb = <0xce>;
			cluster_funnel = <0xcf>;

			port {

				endpoint {
					remote-endpoint = <0xd5>;
					phandle = <0xdd>;
				};
			};
		};

		cti_cpu5@5,fd620000 {
			compatible = "arm,coresight-cti";
			reg = <0x00 0xfd620000 0x00 0x10000>;
			clocks = <0x26>;
			clock-names = "apb_pclk";
			cpu = <0x1e>;
			coresight-name = "cti_cpu5";
			phandle = <0x421>;
		};

		etm@6,fd840000 {
			compatible = "arm,coresight-etm4x", "arm,primecell";
			reg = <0x00 0xfd840000 0x00 0x10000>;
			arm,primecell-periphid = <0xb6d42>;
			clocks = <0x26>;
			clock-names = "apb_pclk";
			cpu = <0x20>;
			cti_name = "cti_cpu6";
			cluster_etb = <0xce>;
			cluster_funnel = <0xcf>;

			port {

				endpoint {
					remote-endpoint = <0xd6>;
					phandle = <0xde>;
				};
			};
		};

		cti_cpu6@6,fd820000 {
			compatible = "arm,coresight-cti";
			reg = <0x00 0xfd820000 0x00 0x10000>;
			clocks = <0x26>;
			clock-names = "apb_pclk";
			cpu = <0x20>;
			coresight-name = "cti_cpu6";
			phandle = <0x422>;
		};

		etm@7,fda40000 {
			compatible = "arm,coresight-etm4x", "arm,primecell";
			reg = <0x00 0xfda40000 0x00 0x10000>;
			arm,primecell-periphid = <0xb6d02>;
			clocks = <0x26>;
			clock-names = "apb_pclk";
			cpu = <0x22>;
			cti_name = "cti_cpu7";
			cluster_etb = <0xce>;
			cluster_funnel = <0xcf>;

			port {

				endpoint {
					remote-endpoint = <0xd7>;
					phandle = <0xdf>;
				};
			};
		};

		cti_cpu7@7,fda20000 {
			compatible = "arm,coresight-cti";
			reg = <0x00 0xfda20000 0x00 0x10000>;
			clocks = <0x26>;
			clock-names = "apb_pclk";
			cpu = <0x22>;
			coresight-name = "cti_cpu7";
			phandle = <0x423>;
		};

		funnel@1,fd001000 {
			compatible = "arm,coresight-funnel", "arm,primecell";
			reg = <0x00 0xfd001000 0x00 0x1000>;
			arm,primecell-periphid = <0x3b908>;
			clocks = <0x26>;
			clock-names = "apb_pclk";
			phandle = <0xcf>;

			ports {
				#address-cells = <0x01>;
				#size-cells = <0x00>;

				port@2 {
					#address-cells = <0x01>;
					#size-cells = <0x00>;
					reg = <0x02>;

					endpoint@0 {
						reg = <0x00>;
						slave-mode;
						remote-endpoint = <0xd8>;
						phandle = <0xd0>;
					};

					endpoint@1 {
						reg = <0x01>;
						slave-mode;
						remote-endpoint = <0xd9>;
						phandle = <0xd1>;
					};
				};

				port@3 {
					#address-cells = <0x01>;
					#size-cells = <0x00>;
					reg = <0x03>;

					endpoint@0 {
						reg = <0x00>;
						slave-mode;
						remote-endpoint = <0xda>;
						phandle = <0xd2>;
					};

					endpoint@1 {
						reg = <0x01>;
						slave-mode;
						remote-endpoint = <0xdb>;
						phandle = <0xd3>;
					};
				};

				port@4 {
					reg = <0x04>;

					endpoint {
						slave-mode;
						remote-endpoint = <0xdc>;
						phandle = <0xd4>;
					};
				};

				port@5 {
					reg = <0x05>;

					endpoint {
						slave-mode;
						remote-endpoint = <0xdd>;
						phandle = <0xd5>;
					};
				};

				port@6 {
					reg = <0x06>;

					endpoint {
						slave-mode;
						remote-endpoint = <0xde>;
						phandle = <0xd6>;
					};
				};

				port@7 {
					reg = <0x07>;

					endpoint {
						slave-mode;
						remote-endpoint = <0xdf>;
						phandle = <0xd7>;
					};
				};

				port@8 {
					reg = <0x08>;

					endpoint {
						remote-endpoint = <0xe0>;
						phandle = <0xe1>;
					};
				};
			};
		};

		etb@1,fd002000 {
			compatible = "arm,coresight-tmc", "arm,primecell";
			reg = <0x00 0xfd002000 0x00 0x1000>;
			arm,primecell-periphid = <0x3b961>;
			arm,buffer-size = <0x4000>;
			#coresight-default-sink;
			clocks = <0x26>;
			clock-names = "apb_pclk";
			tmc_type = "etf";
			phandle = <0xce>;

			ports {
				#address-cells = <0x01>;
				#size-cells = <0x00>;

				port@0 {
					reg = <0x00>;

					endpoint {
						slave-mode;
						remote-endpoint = <0xe1>;
						phandle = <0xe0>;
					};
				};

				port@1 {
					reg = <0x01>;

					endpoint {
						remote-endpoint = <0xe2>;
						phandle = <0xe5>;
					};
				};
			};
		};

		funnel@2,fc031000 {
			compatible = "arm,coresight-funnel", "arm,primecell";
			reg = <0x00 0xfc031000 0x00 0x1000>;
			clocks = <0xe3 0x26 0xe4>;
			clock-names = "clk_topcs_atclk", "apb_pclk", "atclk_to_cpu";

			ports {
				#address-cells = <0x01>;
				#size-cells = <0x00>;

				port@4 {
					reg = <0x04>;

					endpoint {
						slave-mode;
						remote-endpoint = <0xe5>;
						phandle = <0xe2>;
					};
				};

				port@8 {
					reg = <0x08>;

					endpoint {
						remote-endpoint = <0xe6>;
						phandle = <0xe7>;
					};
				};
			};
		};

		etb@2,fc036000 {
			compatible = "arm,coresight-tmc", "arm,primecell";
			reg = <0x00 0xfc036000 0x00 0x1000>;
			#coresight-default-sink;
			clocks = <0xe3 0x26 0xe4>;
			clock-names = "clk_topcs_atclk", "apb_pclk", "atclk_to_cpu";
			tmc_type = "etf";
			arm,buffer-size = <0x1000>;

			ports {
				#address-cells = <0x01>;
				#size-cells = <0x00>;

				port@0 {
					reg = <0x00>;

					endpoint {
						slave-mode;
						remote-endpoint = <0xe7>;
						phandle = <0xe6>;
					};
				};

				port@1 {
					reg = <0x01>;

					endpoint {
						remote-endpoint = <0xe8>;
						phandle = <0xe9>;
					};
				};
			};
		};

		etr@0,fc033000 {
			compatible = "arm,coresight-tmc", "arm,primecell";
			reg = <0x00 0xfc033000 0x00 0x1000>;
			coresight-default-sink;
			clocks = <0xe3 0x26 0xe4>;
			clock-names = "clk_topcs_atclk", "apb_pclk", "atclk_to_cpu";
			tmc_type = "etr";
			arm,buffer-size = <0x800000>;

			ports {

				port {

					endpoint {
						slave-mode;
						remote-endpoint = <0xe9>;
						phandle = <0xe8>;
					};
				};
			};
		};

		tsgen@0,fc037000 {
			compatible = "arm,coresight-tsgen";
			reg = <0x00 0xfc037000 0x00 0x1000>;
			clocks = <0xea>;
			clock-names = "clk_timestamp";
			clock-frequency = <0x1ba8140>;
		};
	};

	thermal-zones {

		soc_thermal {
			governor_name = "power_allocator";
			polling-delay = <0xc8>;
			polling-delay-passive = <0x32>;
			sustainable-power = <0x157c>;
			k_po = <0x00>;
			k_pu = <0x00>;
			k_i = <0x01>;
			integral_cutoff = <0x08>;
			thermal-sensors = <0xeb 0xff>;

			trips {

				trip-point@0 {
					temperature = <0x13880>;
					hysteresis = <0x3e8>;
					type = "passive";
					phandle = <0x424>;
				};

				trip-point@1 {
					temperature = <0x15f90>;
					hysteresis = <0x3e8>;
					type = "passive";
					phandle = <0x425>;
				};

				trip-point@2 {
					temperature = <0x15f90>;
					hysteresis = <0x3e8>;
					type = "passive";
					phandle = <0xec>;
				};
			};

			cooling-maps {

				map0 {
					trip = <0xec>;
					cooling-device = <0xed 0xffffffff 0xffffffff 0x01>;
					contribution = <0x300>;
				};

				map1 {
					trip = <0xec>;
					cooling-device = <0xee 0xffffffff 0xffffffff 0x01>;
					contribution = <0x100>;
				};

				map2 {
					trip = <0xec>;
					cooling-device = <0xef 0xffffffff 0xffffffff 0x01>;
					contribution = <0x100>;
				};

				map3 {
					trip = <0xec>;
					cooling-device = <0xf0 0xffffffff 0xffffffff 0x01>;
					contribution = <0x100>;
				};
			};
		};

		board_thermal {
			governor_name = "power_allocator";
			polling-delay = <0xc8>;
			polling-delay-passive = <0x32>;
			sustainable-power = <0x2328>;
			k_po = <0x00>;
			k_pu = <0x00>;
			k_i = <0x01>;
			integral_cutoff = <0x08>;
			thermal-sensors = <0xf1 0x00>;

			trips {

				trip-point@0 {
					temperature = <0xfde8>;
					hysteresis = <0x3e8>;
					type = "passive";
					phandle = <0x426>;
				};

				trip-point@1 {
					temperature = <0x14c08>;
					hysteresis = <0x3e8>;
					type = "passive";
					phandle = <0xf2>;
				};
			};

			cooling-maps {

				map0 {
					trip = <0xf2>;
					cooling-device = <0xed 0xffffffff 0xffffffff 0x01>;
					contribution = <0x300>;
				};

				map1 {
					trip = <0xf2>;
					cooling-device = <0xee 0xffffffff 0xffffffff 0x01>;
					contribution = <0x100>;
				};

				map2 {
					trip = <0xf2>;
					cooling-device = <0xef 0xffffffff 0xffffffff 0x01>;
					contribution = <0x100>;
				};

				map3 {
					trip = <0xf2>;
					cooling-device = <0xf0 0xffffffff 0xffffffff 0x01>;
					contribution = <0x100>;
				};
			};
		};
	};

	ip_freq_autodown@0xFFB85000 {
		compatible = "hisilicon,freq-autodown";
		reg = <0x00 0xe8d01000 0x00 0x1000 0x00 0xffb85000 0x00 0x1000 0x00 0xe93f0000 0x00 0x1000>;
		freq-autodown-baseaddress-num = <0x03>;
		freq-autodown-num = <0x06>;
		freq-autodown-names = "vivobus", "vcodecbus", "dssbus", "vencaclk", "vdecbus", "vencbus";
		freq-autodown-state = <0x01>;
		phandle = <0x427>;

		vivobus_freq_autodown {
			compatible = "hisilicon,freq-autodown-vivobus";
			freq_autodown_disable_bypass = <0x16c 0x00 0x00>;
			freq_autodown_enable_clock = <0x20 0x07 0x00>;
		};

		vcodecbus_freq_autodown {
			compatible = "hisilicon,freq-autodown-vcodecbus";
			freq_autodown_disable_bypass = <0x168 0x00 0x02>;
			freq_autodown_enable_clock = <0x00 0x0b 0x02>;
		};

		dssbus_freq_autodown {
			compatible = "hisilicon,freq-autodown-dssbus";
			freq_autodown_disable_bypass = <0x170 0x00 0x00>;
			freq_autodown_enable_clock = <0x20 0x05 0x00>;
		};

		vencaclk_freq_autodown {
			compatible = "hisilicon,freq-autodown-vencaclk";
			freq_autodown_disable_bypass = <0x164 0x00 0x02>;
			freq_autodown_enable_clock = <0x00 0x14 0x02>;
		};

		vdecbus_freq_autodown {
			compatible = "hisilicon,freq-autodown-vdecbus";
			freq_autodown_disable_bypass = <0x160 0x00 0x00>;
			freq_autodown_enable_clock = <0x20 0x06 0x00>;
		};

		vencbus_freq_autodown {
			compatible = "hisilicon,freq-autodown-vencbus";
			freq_autodown_disable_bypass = <0x160 0x00 0x02>;
			freq_autodown_enable_clock = <0x00 0x06 0x02>;
		};
	};

	mali@FED40000 {
		status = "disabled";
		fpga-gpu-exist = <0x01>;
		phandle = <0x428>;
	};

	ipa-sensor@0 {
		type = "tsens_max";
		compatible = "arm,ipa-thermal0";
		#thermal-sensor-cells = <0x01>;
		status = "ok";
		phandle = <0xeb>;
	};

	jtagtosd {
	};

	watchdog0 {
		compatible = "hisilicon,wdtv500";
		reg = <0x00 0xff4e1000 0x00 0x1000>;
		default-timeout = <0x18>;
		interrupts = <0x00 0x18f 0x04>;
		clocks = <0xf3 0x26>;
		clock-names = "pclk_wd0", "apb_pclk";
		status = "ok";
		phandle = <0x429>;
	};

	rdr {
		compatible = "hisilicon,rdr";
		bbox_addr = <0xf4>;
		rdr-dumpctl = "1111111111100000";
		rdr-log-max-size = <0x2bc00000>;
		rdr-log-max-nums = <0x14>;
		rdr-diaginfo-size = <0x20000>;
		wait-dumplog-timeout = <0x1d4c0>;
		rdr_area_num = <0x17>;
		unexpected-max-reboot-times = <0x05>;
		bbox_area_names = "AP", "CP", "TEEOS", "HIFI", "LPM3", "IOM3", "ISP", "IVP", "EMMC", "MODEMAP", "CLK", "REGULATOR", "BFM", "HISEE", "NPU", "CONN", "EXCEPTIONTRACE", "DSS", "SILS", "RDA_AP", "DDR", "GPU", "FFTS";
		bbox_area_coreid = <0x01 0x02 0x04 0x08 0x10 0x20 0x40 0x80 0x100 0x200 0x400 0x800 0x1000 0x2000 0x4000 0x8000 0x10000 0x20000 0x40000 0x80000 0x100000 0x200000 0x400000>;
		rdr_area_sizes = <0x00 0x00 0x40000 0x40000 0x70000 0x40000 0x40000 0x00 0x00 0x00 0x20000 0x20000 0x10000 0x10000 0x10000 0x2000 0x40000 0x00 0x00 0x00 0x40000 0x00 0x00>;
		status = "ok";
		phandle = <0x42a>;
	};

	mntn_switch {
		compatible = "hisilicon,dfx-mntnswitch";
		mntn_switch = "011111111111101000101100000000000000011010000010001";
		commercial_mntn_switch = "011111111111101000101100000000000000011010000010001";
		phandle = <0x42b>;
	};

	codec_controller@e82b9000 {
		pm_runtime_support;
		data_io_driver = <0x07>;
		clk_io_driver = <0x07>;
		gpio_ssi_mux = <0x10>;
		compatible = "hisilicon,codec-controller";
		reg = <0x00 0xff480000 0x00 0x800>;
		gpios = <0xf5 0x05 0x00>;
		gpio_irq = <0xc5>;
		gpio_reset = <0xfb>;
		codec-sel = "da_combine_v5";
		bus-sel = <0x00>;
		reg-8bit-begin-addr = " ", "p";
		reg-8bit-end-addr = <0x20007fff>;
		ldo8_supply = <0x01>;
		gpio_codec_ssi = <0xca>;
		gpio_codec_ssi_func = <0x01>;
		pmu_clkcodec_addr = <0x46>;
		pmu_clkcodec_addr_bit = <0x00>;
		status = "disabled";
		phandle = <0x42c>;

		codec_irq {
			compatible = "hisilicon,da_combine-irq";
			#interrupt-cells = <0x02>;
			interrupt-controller;
			status = "disabled";
			#address-cells = <0x02>;
			phandle = <0x88f>;

			hi6402_pinctrl {
				status = "disabled";
			};

			hi6402_codec {
				status = "disabled";
				mic_num = <0x02>;
			};

			da_combine_v3_codec {
				compatible = "hisilicon,da_combine_v3-codec";
				classh_rcv_hp_switch = <0x00>;
				hp_high_low_change_enable = <0x00>;
				hp_res_detect_enable = <0x00>;
				mic_num = <0x02>;
				hs_det = <0x00>;
				hs_ctrl = <0x31>;
				hs_det_trigger = <0x00>;
				coefficient = <0xa8c>;
				hs_3_pole_min_voltage = <0x00>;
				hs_3_pole_max_voltage = <0x08>;
				hs_4_pole_min_voltage = <0x47e>;
				hs_4_pole_max_voltage = <0xa5a>;
				btn_play_min_voltage = <0x00>;
				btn_play_max_voltage = <0x64>;
				btn_voice_assistant_min_voltage = <0x6e>;
				btn_voice_assistant_max_voltage = <0xb4>;
				btn_volume_up_min_voltage = <0xb5>;
				btn_volume_up_max_voltage = <0x140>;
				btn_volume_down_min_voltage = <0x140>;
				btn_volume_down_max_voltage = <0x2bc>;
				status = "disabled";
				phandle = <0x42e>;
			};

			da_combine_v5_codec {
				pll_state = <0x01>;
				ultra_pll_sync_i2s_id = <0x01>;
				wakeup_audio_algo_support = <0x01>;
				hs_detect_extern_cable = <0x01>;
				compatible = "hisilicon,da_combine_v5-codec";
				mic_num = <0x02>;
				mic_map = <0x00 0x04 0x03 0x01>;
				coefficient = <0xa8c>;
				hs_3_pole_min_voltage = <0x00>;
				hs_3_pole_max_voltage = <0x08>;
				hs_4_pole_min_voltage = <0x47e>;
				hs_4_pole_max_voltage = <0xa5a>;
				btn_play_min_voltage = <0x00>;
				btn_play_max_voltage = <0x64>;
				btn_voice_assistant_min_voltage = <0x6e>;
				btn_voice_assistant_max_voltage = <0xb4>;
				btn_volume_up_min_voltage = <0xb5>;
				btn_volume_up_max_voltage = <0x140>;
				btn_volume_down_min_voltage = <0x140>;
				btn_volume_down_max_voltage = <0x2bc>;
				hs_extern_cable_min_voltage = <0xa5b>;
				hs_extern_cable_max_voltage = <0xa8c>;
				status = "disabled";
				phandle = <0x890>;
			};

			test_codec_irq {
				compatible = "hisilicon,test-da_combine-irq";
				status = "disabled";
				phandle = <0x430>;
			};
		};

		test_codec_controller {
			compatible = "hisilicon,test-codec-controller";
			status = "disabled";
			phandle = <0x431>;
		};
	};

	sysctrl_reason {
		compatible = "hisilicon,sysctrl_reason";
		sysctrl_reason_string = "AP_S_TSENSOR0", "AP_S_TSENSOR1", "G3D_S_G3DTSENSOR", "softreset", "AP_S_AWDT", "CHARGER_S_WDT", "LPM3_S_LPMCURST", "CP_S_CPTSENSOR", "IOM3_S_IOMCURST", "ASP_S_ASPWD", "CP_S_CPWD", "CP_S_CPWD", "IVP_S_IVPWD", "ISP_S_ISPWD", "AP_S_DDR_SELFREFLASH", "AP_S_DDR_FATAL_INTER", "AP_S_DDR_FATAL_INTER", "AP_S_DDR_FATAL_INTER", "AP_S_DDR_FATAL_INTER", "AP_S_DDR_UCE_WD", "AP_S_DDR_UCE_WD", "AP_S_DDR_UCE_WD", "AP_S_DDR_UCE_WD", "OCBC_S_WD";
		sysctrl_reason_offset = <0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x17>;
	};

	modem_pinctrl {
		compatible = "arm,modem_pinctrl";
		pinctrl-names = "init", "default", "idle";
		pinctrl-0 = <0x00 0x14 0x48 0x03 0x48 0x02 0xffff 0xffff 0x48 0x03 0x00 0x15 0x4c 0x03 0x4c 0x00 0xffff 0xffff 0x4c 0x03 0x00 0x16 0x50 0x03 0x50 0x00 0xffff 0xffff 0x50 0x03 0x00 0x17 0x54 0x03 0x54 0x00 0xffff 0xffff 0x54 0x03 0x00 0x18 0x58 0x03 0x58 0x00 0xffff 0xffff 0x58 0x03 0x00 0x19 0x5c 0x00 0x5c 0x02 0x00 0xffff 0x5c 0x00 0x00 0x1b 0x64 0x00 0x64 0x00 0x01 0x00 0x64 0x00 0x00 0x1c 0x68 0x00 0x68 0x01 0x01 0x01 0x68 0x00 0x00 0x1d 0x6c 0x02 0x6c 0x00 0xffff 0xffff 0x6c 0x02 0x00 0x1e 0x70 0x02 0x70 0x01 0xffff 0xffff 0x70 0x02 0x00 0x1f 0x74 0x00 0x74 0x02 0x00 0xffff 0x74 0x00 0x01 0x00 0x78 0x01 0x78 0x00 0xffff 0xffff 0x78 0x01 0x01 0x03 0x84 0x06 0x84 0x01 0xffff 0xffff 0x84 0x06 0x01 0x04 0x88 0x00 0x88 0x00 0x01 0x00 0x88 0x00 0x01 0x0d 0xac 0x01 0xac 0x00 0xffff 0xffff 0xac 0x01 0x07 0x08 0xa8 0x00 0xa8 0x01 0x00 0xffff 0xa8 0x00 0x07 0x09 0xac 0x00 0xac 0x01 0x00 0xffff 0xac 0x00>;
		pinctrl-1 = <0x00 0x14 0x48 0x03 0x48 0x02 0xffff 0xffff 0x48 0x03 0x00 0x15 0x4c 0x03 0x4c 0x00 0xffff 0xffff 0x4c 0x03 0x00 0x16 0x50 0x03 0x50 0x00 0xffff 0xffff 0x50 0x03 0x00 0x17 0x54 0x03 0x54 0x00 0xffff 0xffff 0x54 0x03 0x00 0x18 0x58 0x03 0x58 0x00 0xffff 0xffff 0x58 0x03 0x00 0x19 0x5c 0x00 0x5c 0x02 0x00 0xffff 0x5c 0x00 0x00 0x1b 0x64 0x00 0x64 0x00 0x01 0xffff 0x64 0x00 0x00 0x1c 0x68 0x00 0x68 0x01 0x01 0x01 0x68 0x00 0x00 0x1d 0x6c 0x02 0x6c 0x00 0xffff 0xffff 0x6c 0x02 0x00 0x1e 0x70 0x02 0x70 0x01 0xffff 0xffff 0x70 0x02 0x00 0x1f 0x74 0x00 0x74 0x02 0x00 0xffff 0x74 0x00 0x01 0x00 0x78 0x01 0x78 0x00 0xffff 0xffff 0x78 0x01 0x01 0x03 0x84 0x06 0x84 0x01 0xffff 0xffff 0x84 0x06 0x01 0x04 0x88 0x06 0x88 0x00 0xffff 0xffff 0x88 0x06 0x01 0x0d 0xac 0x01 0xac 0x00 0xffff 0xffff 0xac 0x01 0x07 0x08 0xa8 0x00 0xa8 0x01 0x00 0xffff 0xa8 0x00 0x07 0x09 0xac 0x00 0xac 0x01 0x00 0xffff 0xac 0x00>;
		pinctrl-2 = <0x00 0x14 0x48 0x03 0x48 0x02 0xffff 0xffff 0x48 0x03 0x00 0x15 0x4c 0x03 0x4c 0x00 0xffff 0xffff 0x4c 0x03 0x00 0x16 0x50 0x03 0x50 0x00 0xffff 0xffff 0x50 0x03 0x00 0x17 0x54 0x03 0x54 0x00 0xffff 0xffff 0x54 0x03 0x00 0x18 0x58 0x03 0x58 0x00 0xffff 0xffff 0x58 0x03 0x00 0x19 0x5c 0x00 0x5c 0x02 0x00 0xffff 0x5c 0x00 0x00 0x1b 0x64 0x00 0x64 0x00 0x01 0xffff 0x64 0x00 0x00 0x1c 0x68 0x00 0x68 0x00 0x01 0x01 0x68 0x00 0x00 0x1d 0x6c 0x02 0x6c 0x00 0xffff 0xffff 0x6c 0x02 0x00 0x1e 0x70 0x02 0x70 0x01 0xffff 0xffff 0x70 0x02 0x00 0x1f 0x74 0x00 0x74 0x02 0x00 0xffff 0x74 0x00 0x01 0x00 0x78 0x01 0x78 0x00 0xffff 0xffff 0x78 0x01 0x01 0x03 0x84 0x06 0x84 0x01 0xffff 0xffff 0x84 0x06 0x01 0x04 0x88 0x06 0x88 0x00 0xffff 0xffff 0x88 0x06 0x01 0x0d 0xac 0x01 0xac 0x00 0xffff 0xffff 0xac 0x01 0x07 0x08 0xa8 0x00 0xa8 0x01 0x00 0xffff 0xa8 0x00 0x07 0x09 0xac 0x00 0xac 0x01 0x00 0xffff 0xac 0x00>;
		pinctrl-num = <0x11 0x11 0x11>;
		status = "ok";
		phandle = <0x432>;
	};

	arpp@E9800000 {
		compatible = "hisilicon,arpp";
		fpga_flag = <0x01>;
		iommus = <0xf6 0x08 0x0d>;
		reg = <0x00 0xe9900000 0x00 0x10000 0x00 0xe99f8000 0x00 0x1000 0x00 0xe9bd3000 0x00 0x1000 0x00 0xe9bd4000 0x00 0x1000 0x00 0xe9bd5000 0x00 0x1000 0x00 0xe9bd6000 0x00 0x1000 0x00 0xe9bd7000 0x00 0x2000 0x00 0xe9bd8000 0x00 0x1000 0x00 0xe9bd9000 0x00 0x1000 0x00 0xe9bda000 0x00 0x2000 0x00 0xe9bdc000 0x00 0x2000 0x00 0xe9bde000 0x00 0x1000 0x00 0xe9bdf000 0x00 0x1000 0x00 0xe9be0000 0x00 0x1000 0x00 0xe9be1000 0x00 0x3000 0x00 0xe9be4000 0x00 0x3000 0x00 0xe9df8000 0x00 0x1000>;
		interrupts = <0x00 0x1c2 0x04 0x00 0x1c3 0x04 0x00 0x1c4 0x04>;
		interrupt-names = "ARPP_IPC0", "ARPP_IPC1", "ARPP_IPC2";
		sid-ssid = <0x08 0x0d>;
		media2-regulator-supply = <0xf7>;
		vcodecsubsys-regulator-supply = <0xf8>;
		arpp-regulator-supply = <0xf9>;
		smmu-tcu-regulator-supply = <0xfa>;
		clocks = <0xfb>;
		clock-names = "clk_arpp_top";
		arpp_low_clk_rate = <0x197380c0>;
		arpp_medium_clk_rate = <0x21055e80>;
		arpp_high_clk_rate = <0x2625a000>;
		arpp_turbo_clk_rate = <0x3178cb80>;
		arpp_lowtemp_clk_rate = <0x2625a000>;
		arpp_pd_clk_rate = <0x632ea00>;
		arpp_lp_clk_rate = <0x18cba80>;
		status = "disabled";

		iova_info {
			start-addr = <0x00 0x800000>;
			size = <0x00 0xbf800000>;
			iova-align = <0x00 0x8000>;
		};
	};

	interrupt-controller@ff000000 {
		compatible = "arm,gic-v3";
		#interrupt-cells = <0x03>;
		#address-cells = <0x02>;
		#size-cells = <0x02>;
		ranges;
		interrupt-controller;
		redistributor-stride = <0x00 0x20000>;
		redistributor-region = <0x01>;
		reg = <0x00 0xff000000 0x00 0x10000 0x00 0xff040000 0x00 0x180000>;
		interrupts = <0x01 0x09 0x04>;
		phandle = <0x01>;
	};

	timer {
		compatible = "arm,armv8-timer";
		interrupt-parent = <0x01>;
		interrupts = <0x01 0x0d 0xff08 0x01 0x0e 0xff08 0x01 0x0b 0xff08 0x01 0x0a 0xff08>;
		clock-frequency = <0x1d4c00>;
		arm,no-tick-in-suspend;
	};

	prktimer@fb21b000 {
		compatible = "hisilicon,prktimer";
		fpga_flag = <0x00>;
		reg = <0x00 0xfb21b000 0x00 0x1000>;
		status = "disabled";
		phandle = <0x433>;
	};

	timer@fae80000 {
		compatible = "arm,sp804", "arm,primecell";
		reg = <0x00 0xfb200000 0x00 0x1000>;
		interrupts = <0x00 0x40 0x04 0x00 0x46 0x04>;
		clocks = <0xfc 0xfc 0x26>;
		clock-names = "osc32khz", "osc32khz", "apb_pclk";
		status = "ok";
		phandle = <0x434>;
	};

	clocks_extreme {
		phandle = <0x435>;

		clkin_sys {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x00>;
			phandle = <0x436>;
		};

		clkin_sys_serdes {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x01>;
			phandle = <0x437>;
		};

		clkin_ref {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x02>;
			phandle = <0x438>;
		};

		clk_fll_src {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x03>;
			phandle = <0x439>;
		};

		clk_ppll1 {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x04>;
			phandle = <0x43a>;
		};

		clk_ppll2 {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x05>;
			phandle = <0x43b>;
		};

		clk_ppll3 {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x06>;
			phandle = <0x43c>;
		};

		clk_ppll5 {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x07>;
			phandle = <0x43d>;
		};

		clk_ppll7 {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x08>;
			phandle = <0x43e>;
		};

		clk_spll {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x09>;
			phandle = <0x43f>;
		};

		clk_modem_base {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x0a>;
			phandle = <0x440>;
		};

		clk_ulppll_1 {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x0b>;
			phandle = <0x441>;
		};

		clk_lbintjpll {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x0c>;
			phandle = <0x442>;
		};

		clk_aupll {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x0d>;
			phandle = <0x443>;
		};

		clk_scpll {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x0e>;
			phandle = <0x444>;
		};

		clk_fnpll {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x0f>;
			phandle = <0x445>;
		};

		clk_ppll_pcie {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x10>;
			phandle = <0x446>;
		};

		clk_ppll_pcie1 {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x11>;
			phandle = <0x447>;
		};

		clk_sdpll {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x12>;
			phandle = <0x448>;
		};

		apb_pclk {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x13>;
			phandle = <0x26>;
		};

		clk_ap_ppll1 {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x14>;
			phandle = <0x449>;
		};

		clk_ap_ppll2 {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x15>;
			phandle = <0x44a>;
		};

		clk_div_ppll2_b {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x16>;
			phandle = <0x44b>;
		};

		clk_ap_ppll2_b {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x17>;
			phandle = <0x44c>;
		};

		clk_ap_ppll3 {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x18>;
			phandle = <0x44d>;
		};

		clk_ap_ppll7 {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x19>;
			phandle = <0x44e>;
		};

		clk_ppll0_media {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x1a>;
			phandle = <0x44f>;
		};

		clk_ppll1_media {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x1b>;
			phandle = <0x450>;
		};

		clk_ppll2_media {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x1c>;
			phandle = <0x451>;
		};

		clk_ppll2b_media {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x1d>;
			phandle = <0x452>;
		};

		clk_ppll3_media {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x1e>;
			phandle = <0x453>;
		};

		clk_ppll7_media {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x1f>;
			phandle = <0x454>;
		};

		clk_ppll0_m2 {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x20>;
			phandle = <0x455>;
		};

		clk_ppll1_m2 {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x21>;
			phandle = <0x456>;
		};

		clk_ppll2_m2 {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x22>;
			phandle = <0x457>;
		};

		clk_ppll2b_m2 {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x23>;
			phandle = <0x458>;
		};

		clk_ppll3_m2 {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x24>;
			phandle = <0x459>;
		};

		clk_ppll_eps {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x25>;
			phandle = <0x45a>;
		};

		clk_hiface {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x26>;
			phandle = <0x45b>;
		};

		clk_sys_ini {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x27>;
			phandle = <0x45c>;
		};

		div_sysbus_pll {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x28>;
			phandle = <0x45d>;
		};

		sc_div_cfgbus {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x29>;
			phandle = <0x45e>;
		};

		pclk_gpio0 {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x2a>;
			phandle = <0xc0>;
		};

		pclk_gpio1 {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x2b>;
			phandle = <0xc1>;
		};

		pclk_gpio2 {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x2c>;
			phandle = <0xc3>;
		};

		pclk_gpio3 {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x2d>;
			phandle = <0xc5>;
		};

		pclk_gpio4 {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x2e>;
			phandle = <0x45f>;
		};

		pclk_gpio5 {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x2f>;
			phandle = <0xc7>;
		};

		pclk_gpio6 {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x30>;
			phandle = <0xc8>;
		};

		pclk_gpio7 {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x31>;
			phandle = <0xc9>;
		};

		pclk_gpio8 {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x32>;
			phandle = <0xca>;
		};

		pclk_gpio9 {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x33>;
			phandle = <0xcc>;
		};

		pclk_gpio10 {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x34>;
			phandle = <0xcd>;
		};

		pclk_gpio11 {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x35>;
			phandle = <0x460>;
		};

		pclk_gpio12 {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x36>;
			phandle = <0x461>;
		};

		pclk_gpio13 {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x37>;
			phandle = <0x462>;
		};

		pclk_gpio14 {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x38>;
			phandle = <0x463>;
		};

		pclk_gpio15 {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x39>;
			phandle = <0x464>;
		};

		pclk_gpio16 {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x3a>;
			phandle = <0x465>;
		};

		pclk_gpio17 {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x3b>;
			phandle = <0x466>;
		};

		pclk_gpio18 {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x3c>;
			phandle = <0x467>;
		};

		pclk_gpio19 {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x3d>;
			phandle = <0x468>;
		};

		pclk_wd0_high {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x3e>;
			phandle = <0x469>;
		};

		clk_wd0_high {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x3f>;
			phandle = <0x46a>;
		};

		pclk_wd0 {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x40>;
			phandle = <0xf3>;
		};

		pclk_wd1 {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x41>;
			phandle = <0x46b>;
		};

		aclk_media_common {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x42>;
			phandle = <0x46c>;
		};

		aclk_qic_dss {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x43>;
			phandle = <0x46d>;
		};

		pclk_media_common {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x44>;
			phandle = <0x46e>;
		};

		pclk_qic_dss_cfg {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x45>;
			phandle = <0x46f>;
		};

		pclk_mmbuf_cfg {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x46>;
			phandle = <0x470>;
		};

		pclk_disp_qic_subsys {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x47>;
			phandle = <0x471>;
		};

		aclk_disp_qic_subsys {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x48>;
			phandle = <0x472>;
		};

		pclk_dss {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x49>;
			phandle = <0x473>;
		};

		sel_codeccssi {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x4a>;
			phandle = <0x474>;
		};

		clk_codecssi {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x4b>;
			phandle = <0x475>;
		};

		pclk_codecssi {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x4c>;
			phandle = <0x476>;
		};

		div_aobus_334M {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x4d>;
			phandle = <0x477>;
		};

		sc_div_aobus {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x4e>;
			phandle = <0x478>;
		};

		clk_factor_tcxo {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x4f>;
			phandle = <0x479>;
		};

		clk_timer5_a {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x50>;
			phandle = <0x47a>;
		};

		clk_hsdt1_usbdp_andgt {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x51>;
			phandle = <0x47b>;
		};

		div_hsdt1_usbdp {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x52>;
			phandle = <0x47c>;
		};

		clk_hsdt1_usbdp {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x53>;
			phandle = <0x154>;
		};

		hclk_usb3otg {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x54>;
			phandle = <0x47d>;
		};

		clkmux_usb_dock {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x55>;
			phandle = <0x47e>;
		};

		pclk_ioc {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x56>;
			phandle = <0x47f>;
		};

		clk_atdvfs {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x57>;
			phandle = <0x480>;
		};

		clk_at {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x58>;
			phandle = <0xe3>;
		};

		clk_at_to_cpu {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x59>;
			phandle = <0xe4>;
		};

		pclk_dbg {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x5a>;
			phandle = <0x481>;
		};

		pclkdiv_dbg {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x5b>;
			phandle = <0x482>;
		};

		clk_timestp_gt {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x5c>;
			phandle = <0xea>;
		};

		clk_timestp_div {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x5d>;
			phandle = <0x483>;
		};

		clk_time_stamp {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x5e>;
			phandle = <0x484>;
		};

		aclk_perf_stat {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x5f>;
			phandle = <0x18d>;
		};

		pclk_perf_stat {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x60>;
			phandle = <0x18e>;
		};

		clk_perf_div {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x61>;
			phandle = <0x485>;
		};

		clk_perf_gt {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x62>;
			phandle = <0x486>;
		};

		clk_perf_stat {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x63>;
			phandle = <0x18c>;
		};

		clk_perf_ctrl {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x64>;
			phandle = <0x18f>;
		};

		clk_cssys_div {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x65>;
			phandle = <0x487>;
		};

		clk_cssysdbg {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x66>;
			phandle = <0x488>;
		};

		clk_dmabus_div {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x67>;
			phandle = <0x489>;
		};

		clk_dmac {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x68>;
			phandle = <0x18b>;
		};

		clk_dma_iomcu {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x69>;
			phandle = <0x48a>;
		};

		clk_odt_acpu {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x6a>;
			phandle = <0x48b>;
		};

		clk_odt_deflat {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x6b>;
			phandle = <0x48c>;
		};

		tclk_odt {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x6c>;
			phandle = <0x48d>;
		};

		clk_pfa_tft {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x6d>;
			phandle = <0x48e>;
		};

		aclk_dss {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x6e>;
			phandle = <0x48f>;
		};

		clk_sdio_sys {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x6f>;
			phandle = <0x490>;
		};

		hclk_sdio {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x70>;
			phandle = <0x491>;
		};

		pclk_dsi0 {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x71>;
			phandle = <0x492>;
		};

		pclk_dsi1 {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x72>;
			phandle = <0x493>;
		};

		clk_ldi0 {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x73>;
			phandle = <0x494>;
		};

		clk_venc2 {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x74>;
			phandle = <0x495>;
		};

		clk_ap_ppll5 {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x75>;
			phandle = <0x496>;
		};

		clk_fd_func {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x76>;
			phandle = <0x497>;
		};

		clk_fdai_func {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x77>;
			phandle = <0x498>;
		};

		clk_div_hsdt1bus {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x78>;
			phandle = <0x499>;
		};

		clkgt_sd_peri {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x79>;
			phandle = <0x49a>;
		};

		clk_div_sd_peri {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x7a>;
			phandle = <0x49b>;
		};

		clk_sd_peri {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x7b>;
			phandle = <0x49c>;
		};

		clk_sd_muxpll {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x7c>;
			phandle = <0x49d>;
		};

		clk_sd_div {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x7d>;
			phandle = <0x49e>;
		};

		clk_sd_gt {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x7e>;
			phandle = <0x49f>;
		};

		clk_sd_sys {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x7f>;
			phandle = <0x4a0>;
		};

		clk_a53hpm_mux {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x80>;
			phandle = <0x4a1>;
		};

		clk_a53hpm_gt {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x81>;
			phandle = <0x4a2>;
		};

		clk_a53hpm_div {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x82>;
			phandle = <0x4a3>;
		};

		gt_clk_320m_pll {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x83>;
			phandle = <0x4a4>;
		};

		sc_div_320m {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x84>;
			phandle = <0x4a5>;
		};

		clk_uart4 {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x85>;
			phandle = <0x77>;
		};

		pclk_uart4 {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x86>;
			phandle = <0x78>;
		};

		clkmux_uarth {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x87>;
			phandle = <0x4a6>;
		};

		clkdiv_uarth {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x88>;
			phandle = <0x4a7>;
		};

		clkgt_uarth {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x89>;
			phandle = <0x4a8>;
		};

		clk_uart5 {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x8a>;
			phandle = <0x89>;
		};

		pclk_uart5 {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x8b>;
			phandle = <0x4a9>;
		};

		clkmux_uartl {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x8c>;
			phandle = <0x4aa>;
		};

		clkdiv_uartl {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x8d>;
			phandle = <0x4ab>;
		};

		clkgt_uartl {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x8e>;
			phandle = <0x4ac>;
		};

		clk_uart0 {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x8f>;
			phandle = <0x4ad>;
		};

		pclk_uart0 {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x90>;
			phandle = <0x65>;
		};

		clkmux_uart0 {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x91>;
			phandle = <0x4ae>;
		};

		clkdiv_uart0 {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x92>;
			phandle = <0x4af>;
		};

		clkgt_uart0 {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x93>;
			phandle = <0x4b0>;
		};

		clk_uart0_fac {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x94>;
			phandle = <0x64>;
		};

		uart0clk_dbg {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x95>;
			phandle = <0x4b1>;
		};

		uart6clk {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x96>;
			phandle = <0x9a>;
		};

		clk_uart3 {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x97>;
			phandle = <0x4b2>;
		};

		clk_uart8 {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x98>;
			phandle = <0x4b3>;
		};

		clk_uart7 {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x99>;
			phandle = <0x4b4>;
		};

		clk_i2c2_acpu {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x9a>;
			phandle = <0x4b5>;
		};

		clk_i2c3 {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x9b>;
			phandle = <0x30>;
		};

		clk_i2c4 {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x9c>;
			phandle = <0x3a>;
		};

		clk_i2c6_acpu {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x9d>;
			phandle = <0x45>;
		};

		clk_i2c7 {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x9e>;
			phandle = <0x51>;
		};

		pclk_i2c2 {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x9f>;
			phandle = <0x4b6>;
		};

		pclk_i2c3 {
			#clock-cells = <0x00>;
			clocks = <0xfd 0xa0>;
			phandle = <0x4b7>;
		};

		pclk_i2c4 {
			#clock-cells = <0x00>;
			clocks = <0xfd 0xa1>;
			phandle = <0x4b8>;
		};

		pclk_i2c6_acpu {
			#clock-cells = <0x00>;
			clocks = <0xfd 0xa2>;
			phandle = <0x4b9>;
		};

		pclk_i2c7 {
			#clock-cells = <0x00>;
			clocks = <0xfd 0xa3>;
			phandle = <0x4ba>;
		};

		clkdiv_i2c {
			#clock-cells = <0x00>;
			clocks = <0xfd 0xa4>;
			phandle = <0x4bb>;
		};

		clkmux_i2c {
			#clock-cells = <0x00>;
			clocks = <0xfd 0xa5>;
			phandle = <0x4bc>;
		};

		clk_i2c0 {
			#clock-cells = <0x00>;
			clocks = <0xfd 0xa6>;
			phandle = <0x4bd>;
		};

		clk_i2c1 {
			#clock-cells = <0x00>;
			clocks = <0xfd 0xa7>;
			phandle = <0x4be>;
		};

		clk_i2c2 {
			#clock-cells = <0x00>;
			clocks = <0xfd 0xa8>;
			phandle = <0x25>;
		};

		clkgt_i3c4 {
			#clock-cells = <0x00>;
			clocks = <0xfd 0xa9>;
			phandle = <0x4bf>;
		};

		clkdiv_i3c4 {
			#clock-cells = <0x00>;
			clocks = <0xfd 0xaa>;
			phandle = <0x4c0>;
		};

		clk_i3c4 {
			#clock-cells = <0x00>;
			clocks = <0xfd 0xab>;
			phandle = <0x4c1>;
		};

		pclk_i3c4 {
			#clock-cells = <0x00>;
			clocks = <0xfd 0xac>;
			phandle = <0x4c2>;
		};

		clkgt_spi1 {
			#clock-cells = <0x00>;
			clocks = <0xfd 0xad>;
			phandle = <0x4c3>;
		};

		clkdiv_spi1 {
			#clock-cells = <0x00>;
			clocks = <0xfd 0xae>;
			phandle = <0x4c4>;
		};

		clkmux_spi1 {
			#clock-cells = <0x00>;
			clocks = <0xfd 0xaf>;
			phandle = <0x4c5>;
		};

		clk_spi1 {
			#clock-cells = <0x00>;
			clocks = <0xfd 0xb0>;
			phandle = <0xa3>;
		};

		clkgt_spi4 {
			#clock-cells = <0x00>;
			clocks = <0xfd 0xb1>;
			phandle = <0x4c6>;
		};

		clkdiv_spi4 {
			#clock-cells = <0x00>;
			clocks = <0xfd 0xb2>;
			phandle = <0x4c7>;
		};

		clkmux_spi4 {
			#clock-cells = <0x00>;
			clocks = <0xfd 0xb3>;
			phandle = <0x4c8>;
		};

		clk_spi4 {
			#clock-cells = <0x00>;
			clocks = <0xfd 0xb4>;
			phandle = <0x4c9>;
		};

		pclk_spi1 {
			#clock-cells = <0x00>;
			clocks = <0xfd 0xb5>;
			phandle = <0x4ca>;
		};

		pclk_spi4 {
			#clock-cells = <0x00>;
			clocks = <0xfd 0xb6>;
			phandle = <0x4cb>;
		};

		clkgt_spi6 {
			#clock-cells = <0x00>;
			clocks = <0xfd 0xb7>;
			phandle = <0x4cc>;
		};

		clkdiv_spi6 {
			#clock-cells = <0x00>;
			clocks = <0xfd 0xb8>;
			phandle = <0x4cd>;
		};

		clkmux_spi6 {
			#clock-cells = <0x00>;
			clocks = <0xfd 0xb9>;
			phandle = <0x4ce>;
		};

		clk_spi6 {
			#clock-cells = <0x00>;
			clocks = <0xfd 0xba>;
			phandle = <0xbe>;
		};

		pclk_spi6 {
			#clock-cells = <0x00>;
			clocks = <0xfd 0xbb>;
			phandle = <0x4cf>;
		};

		clk_spi0 {
			#clock-cells = <0x00>;
			clocks = <0xfd 0xbc>;
			phandle = <0x4d0>;
		};

		clkfac_180m {
			#clock-cells = <0x00>;
			clocks = <0xfd 0xbd>;
			phandle = <0x4d1>;
		};

		clk_gate_peri0 {
			#clock-cells = <0x00>;
			clocks = <0xfd 0xbe>;
			phandle = <0x4d2>;
		};

		clk_spi2 {
			#clock-cells = <0x00>;
			clocks = <0xfd 0xbf>;
			phandle = <0x4d3>;
		};

		clk_usb3otg_ref {
			#clock-cells = <0x00>;
			clocks = <0xfd 0xc0>;
			phandle = <0x4d4>;
		};

		clkdiv_usb3_32k {
			#clock-cells = <0x00>;
			clocks = <0xfd 0xc1>;
			phandle = <0x4d5>;
		};

		clkfac_usb3phy {
			#clock-cells = <0x00>;
			clocks = <0xfd 0xc2>;
			phandle = <0x4d6>;
		};

		clkdiv_usb2phy_ref {
			#clock-cells = <0x00>;
			clocks = <0xfd 0xc3>;
			phandle = <0x4d7>;
		};

		sel_ulpi_ref {
			#clock-cells = <0x00>;
			clocks = <0xfd 0xc4>;
			phandle = <0x4d8>;
		};

		clk_ulpi_ref {
			#clock-cells = <0x00>;
			clocks = <0xfd 0xc5>;
			phandle = <0x4d9>;
		};

		sel_hsdt1_eusb {
			#clock-cells = <0x00>;
			clocks = <0xfd 0xc6>;
			phandle = <0x4da>;
		};

		clk_hsdt1_eusb {
			#clock-cells = <0x00>;
			clocks = <0xfd 0xc7>;
			phandle = <0x4db>;
		};

		clk_abb_usb {
			#clock-cells = <0x00>;
			clocks = <0xfd 0xc8>;
			phandle = <0x4dc>;
		};

		clk_pcie1pll_serdes {
			#clock-cells = <0x00>;
			clocks = <0xfd 0xc9>;
			phandle = <0x4dd>;
		};

		clk_hsdt_subsys_ini {
			#clock-cells = <0x00>;
			clocks = <0xfd 0xca>;
			phandle = <0x4de>;
		};

		pclk_hsdt0_pcie {
			#clock-cells = <0x00>;
			clocks = <0xfd 0xcb>;
			phandle = <0x4df>;
		};

		pclk_hsdt1_pcie1 {
			#clock-cells = <0x00>;
			clocks = <0xfd 0xcc>;
			phandle = <0x4e0>;
		};

		pclk_pcie_div {
			#clock-cells = <0x00>;
			clocks = <0xfd 0xcd>;
			phandle = <0x4e1>;
		};

		pclk_pcie_andgt {
			#clock-cells = <0x00>;
			clocks = <0xfd 0xce>;
			phandle = <0x4e2>;
		};

		clk_ufsphy_ref {
			#clock-cells = <0x00>;
			clocks = <0xfd 0xcf>;
			phandle = <0x4e3>;
		};

		clk_ufsio_ref {
			#clock-cells = <0x00>;
			clocks = <0xfd 0xd0>;
			phandle = <0x13e>;
		};

		clk_ao_asp {
			#clock-cells = <0x00>;
			clocks = <0xfd 0xd1>;
			phandle = <0x4e4>;
		};

		clk_ao_asp_div {
			#clock-cells = <0x00>;
			clocks = <0xfd 0xd2>;
			phandle = <0x4e5>;
		};

		clkmux_ao_asp {
			#clock-cells = <0x00>;
			clocks = <0xfd 0xd3>;
			phandle = <0x4e6>;
		};

		clk_ao_asp_gt {
			#clock-cells = <0x00>;
			clocks = <0xfd 0xd4>;
			phandle = <0x4e7>;
		};

		pclk_pctrl {
			#clock-cells = <0x00>;
			clocks = <0xfd 0xd5>;
			phandle = <0x4e8>;
		};

		clk_ptp_gt {
			#clock-cells = <0x00>;
			clocks = <0xfd 0xd6>;
			phandle = <0x4e9>;
		};

		clk_ptp_div {
			#clock-cells = <0x00>;
			clocks = <0xfd 0xd7>;
			phandle = <0x4ea>;
		};

		clk_blpwm1 {
			#clock-cells = <0x00>;
			clocks = <0xfd 0xd8>;
			phandle = <0x4eb>;
		};

		clk_blpwm {
			#clock-cells = <0x00>;
			clocks = <0xfd 0xd9>;
			phandle = <0x4ec>;
		};

		clk_syscnt_div {
			#clock-cells = <0x00>;
			clocks = <0xfd 0xda>;
			phandle = <0x4ed>;
		};

		clk_gps_ref {
			#clock-cells = <0x00>;
			clocks = <0xfd 0xdb>;
			phandle = <0x4ee>;
		};

		clkmux_gps_ref {
			#clock-cells = <0x00>;
			clocks = <0xfd 0xdc>;
			phandle = <0x4ef>;
		};

		clk_mdm2gps0 {
			#clock-cells = <0x00>;
			clocks = <0xfd 0xdd>;
			phandle = <0x4f0>;
		};

		clk_mdm2gps1 {
			#clock-cells = <0x00>;
			clocks = <0xfd 0xde>;
			phandle = <0x4f1>;
		};

		clk_mdm2gps2 {
			#clock-cells = <0x00>;
			clocks = <0xfd 0xdf>;
			phandle = <0x4f2>;
		};

		clk_ldi1 {
			#clock-cells = <0x00>;
			clocks = <0xfd 0xe0>;
			phandle = <0x4f3>;
		};

		peri_volt_no_avs_l {
			#clock-cells = <0x00>;
			clocks = <0xfd 0xe1>;
			phandle = <0x4f4>;
		};

		peri_volt_hold {
			#clock-cells = <0x00>;
			clocks = <0xfd 0xe2>;
			phandle = <0x4f5>;
		};

		peri_volt_middle {
			#clock-cells = <0x00>;
			clocks = <0xfd 0xe3>;
			phandle = <0x4f6>;
		};

		peri_volt_low {
			#clock-cells = <0x00>;
			clocks = <0xfd 0xe4>;
			phandle = <0x4f7>;
		};

		eps_volt_high {
			#clock-cells = <0x00>;
			clocks = <0xfd 0xe5>;
			phandle = <0x4f8>;
		};

		eps_volt_middle {
			#clock-cells = <0x00>;
			clocks = <0xfd 0xe6>;
			phandle = <0x4f9>;
		};

		eps_volt_low {
			#clock-cells = <0x00>;
			clocks = <0xfd 0xe7>;
			phandle = <0x4fa>;
		};

		venc_volt_hold {
			#clock-cells = <0x00>;
			clocks = <0xfd 0xe8>;
			phandle = <0x4fb>;
		};

		vdec_volt_hold {
			#clock-cells = <0x00>;
			clocks = <0xfd 0xe9>;
			phandle = <0x4fc>;
		};

		edc_volt_hold {
			#clock-cells = <0x00>;
			clocks = <0xfd 0xea>;
			phandle = <0x4fd>;
		};

		efuse_volt_hold {
			#clock-cells = <0x00>;
			clocks = <0xfd 0xeb>;
			phandle = <0x4fe>;
		};

		ldi0_volt_hold {
			#clock-cells = <0x00>;
			clocks = <0xfd 0xec>;
			phandle = <0x4ff>;
		};

		seplat_volt_hold {
			#clock-cells = <0x00>;
			clocks = <0xfd 0xed>;
			phandle = <0x500>;
		};

		clk_mux_16m_dp {
			#clock-cells = <0x00>;
			clocks = <0xfd 0xee>;
			phandle = <0x501>;
		};

		clk_gt_16m_dp {
			#clock-cells = <0x00>;
			clocks = <0xfd 0xef>;
			phandle = <0x502>;
		};

		div_dpctrl16m {
			#clock-cells = <0x00>;
			clocks = <0xfd 0xf0>;
			phandle = <0x503>;
		};

		clk_dpctrl_16m {
			#clock-cells = <0x00>;
			clocks = <0xfd 0xf1>;
			phandle = <0x17b>;
		};

		mux_dpctr_pixel {
			#clock-cells = <0x00>;
			clocks = <0xfd 0xf2>;
			phandle = <0x504>;
		};

		gt_dpctr_pixel {
			#clock-cells = <0x00>;
			clocks = <0xfd 0xf3>;
			phandle = <0x505>;
		};

		div_dpctr_pixel {
			#clock-cells = <0x00>;
			clocks = <0xfd 0xf4>;
			phandle = <0x506>;
		};

		dpctrl_pixel {
			#clock-cells = <0x00>;
			clocks = <0xfd 0xf5>;
			phandle = <0x17d>;
		};

		aclk_dpctrl {
			#clock-cells = <0x00>;
			clocks = <0xfd 0xf6>;
			phandle = <0x507>;
		};

		clk_ispfunc3freq {
			#clock-cells = <0x00>;
			clocks = <0xfd 0xf7>;
			phandle = <0x508>;
		};

		clk_ispfunc4freq {
			#clock-cells = <0x00>;
			clocks = <0xfd 0xf8>;
			phandle = <0x509>;
		};

		clk_ispfunc5freq {
			#clock-cells = <0x00>;
			clocks = <0xfd 0xf9>;
			phandle = <0x50a>;
		};

		clk_ispfunc3 {
			#clock-cells = <0x00>;
			clocks = <0xfd 0xfa>;
			phandle = <0x50b>;
		};

		clk_ispfunc4 {
			#clock-cells = <0x00>;
			clocks = <0xfd 0xfb>;
			phandle = <0x50c>;
		};

		clk_ispfunc5 {
			#clock-cells = <0x00>;
			clocks = <0xfd 0xfc>;
			phandle = <0x50d>;
		};

		clk_gt_isp_i2c {
			#clock-cells = <0x00>;
			clocks = <0xfd 0xfd>;
			phandle = <0x50e>;
		};

		clk_div_isp_i2c {
			#clock-cells = <0x00>;
			clocks = <0xfd 0xfe>;
			phandle = <0x50f>;
		};

		clk_isp_i2c_media {
			#clock-cells = <0x00>;
			clocks = <0xfd 0xff>;
			phandle = <0x510>;
		};

		clk_isp_snclk0 {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x100>;
			phandle = <0x511>;
		};

		clk_isp_snclk1 {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x101>;
			phandle = <0x512>;
		};

		clk_isp_snclk2 {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x102>;
			phandle = <0x513>;
		};

		clk_isp_snclk3 {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x103>;
			phandle = <0x514>;
		};

		clk_mux_ispsn0 {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x104>;
			phandle = <0x515>;
		};

		clk_div_ispsn0 {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x105>;
			phandle = <0x516>;
		};

		clk_mux_ispsn1 {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x106>;
			phandle = <0x517>;
		};

		clk_div_ispsn1 {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x107>;
			phandle = <0x518>;
		};

		clk_mux_ispsn2 {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x108>;
			phandle = <0x519>;
		};

		clk_div_ispsn2 {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x109>;
			phandle = <0x51a>;
		};

		clk_mux_ispsn3 {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x10a>;
			phandle = <0x51b>;
		};

		clk_div_ispsn3 {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x10b>;
			phandle = <0x51c>;
		};

		clk_fac_ispsn {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x10c>;
			phandle = <0x51d>;
		};

		clk_ispsn_gt {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x10d>;
			phandle = <0x51e>;
		};

		clk_rxdphy0_cfg {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x10e>;
			phandle = <0x51f>;
		};

		clk_rxdphy1_cfg {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x10f>;
			phandle = <0x520>;
		};

		clk_rxdphy2_cfg {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x110>;
			phandle = <0x521>;
		};

		clk_rxdphy3_cfg {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x111>;
			phandle = <0x522>;
		};

		clk_rxdphy4_cfg {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x112>;
			phandle = <0x523>;
		};

		clk_rxdphy5_cfg {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x113>;
			phandle = <0x524>;
		};

		clk_rxdphy_cfg {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x114>;
			phandle = <0x525>;
		};

		div_rxdphy_cfg {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x115>;
			phandle = <0x526>;
		};

		clkgt_rxdphy_cfg {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x116>;
			phandle = <0x527>;
		};

		clk_txdphy0_cfg {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x117>;
			phandle = <0x17a>;
		};

		clk_txdphy0_ref {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x118>;
			phandle = <0x179>;
		};

		clk_txdphy1_cfg {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x119>;
			phandle = <0x528>;
		};

		clk_txdphy1_ref {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x11a>;
			phandle = <0x529>;
		};

		clkgt_rxdphy_fll {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x11b>;
			phandle = <0x52a>;
		};

		div_rxdphy_fll {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x11c>;
			phandle = <0x52b>;
		};

		clk_rxdphy_mux {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x11d>;
			phandle = <0x52c>;
		};

		sel_media_common_pll {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x11e>;
			phandle = <0x52d>;
		};

		clkgt_media_common {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x11f>;
			phandle = <0x52e>;
		};

		clkdiv_media_common {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x120>;
			phandle = <0x52f>;
		};

		clk_media_commonfreq {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x121>;
			phandle = <0x530>;
		};

		clk_media_common {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x122>;
			phandle = <0x531>;
		};

		clk_brg {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x123>;
			phandle = <0x532>;
		};

		clk_ao_loadmonitor_sw {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x124>;
			phandle = <0x533>;
		};

		pclk_loadmonitor {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x125>;
			phandle = <0x534>;
		};

		clk_loadmonitor {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x126>;
			phandle = <0x535>;
		};

		clk_loadmonitor_div {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x127>;
			phandle = <0x536>;
		};

		clk_loadmonitor_gt {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x128>;
			phandle = <0x537>;
		};

		pclk_loadmonitor_l {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x129>;
			phandle = <0x538>;
		};

		clk_loadmonitor_l {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x12a>;
			phandle = <0x539>;
		};

		clk_media_tcxo {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x12b>;
			phandle = <0x53a>;
		};

		clk_ivpdsp_corefreq {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x12c>;
			phandle = <0x53b>;
		};

		clk_ivpdsp_core {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x12d>;
			phandle = <0x11d>;
		};

		clk_ivp1dsp_corefreq {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x12e>;
			phandle = <0x53c>;
		};

		clk_ivp1dsp_core {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x12f>;
			phandle = <0x11e>;
		};

		clk_arpp_topfreq {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x130>;
			phandle = <0x53d>;
		};

		clk_arpp_top {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x131>;
			phandle = <0xfb>;
		};

		clkmux_ade_func {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x132>;
			phandle = <0x53e>;
		};

		clkgt_ade_func {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x133>;
			phandle = <0x53f>;
		};

		clk_ade_func_div {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x134>;
			phandle = <0x540>;
		};

		clk_ade_funcfreq {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x135>;
			phandle = <0x541>;
		};

		clk_ade_func {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x136>;
			phandle = <0x542>;
		};

		aclk_asc {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x137>;
			phandle = <0x543>;
		};

		clk_dss_axi_mm {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x138>;
			phandle = <0x544>;
		};

		clk_mmbuf {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x139>;
			phandle = <0x545>;
		};

		pclk_mmbuf {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x13a>;
			phandle = <0x546>;
		};

		aclk_mmbuf_sw {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x13b>;
			phandle = <0x547>;
		};

		aclk_mmbuf_div {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x13c>;
			phandle = <0x548>;
		};

		pclk_mmbuf_div {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x13d>;
			phandle = <0x549>;
		};

		clk_pfa_gt {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x13e>;
			phandle = <0x54a>;
		};

		clk_pfa_div {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x13f>;
			phandle = <0x54b>;
		};

		clk_pfa_ref {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x140>;
			phandle = <0x54c>;
		};

		hclk_pfa {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x141>;
			phandle = <0x54d>;
		};

		clk_pfa {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x142>;
			phandle = <0x54e>;
		};

		clk_dra_ref {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x143>;
			phandle = <0x54f>;
		};

		aclk_dra {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x144>;
			phandle = <0x550>;
		};

		osc32khz {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x145>;
			phandle = <0xfc>;
		};

		osc19mhz {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x146>;
			phandle = <0x551>;
		};

		clk_480m {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x147>;
			phandle = <0x552>;
		};

		clk_invalid {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x148>;
			phandle = <0x553>;
		};

		autodiv_sysbus {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x149>;
			phandle = <0x554>;
		};

		autodiv_hsdt1bus {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x14a>;
			phandle = <0x555>;
		};

		autodiv_cfgbus {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x14b>;
			phandle = <0x556>;
		};

		autodiv_dmabus {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x14c>;
			phandle = <0x557>;
		};

		autodiv_isp_dvfs {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x14d>;
			phandle = <0x558>;
		};

		autodiv_isp {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x14e>;
			phandle = <0x559>;
		};

		clk_atdiv_hsdt1bus {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x14f>;
			phandle = <0x55a>;
		};

		clk_atdiv_dma {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x150>;
			phandle = <0x55b>;
		};

		clk_atdiv_cfg {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x151>;
			phandle = <0x55c>;
		};

		clk_atdiv_sys {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x152>;
			phandle = <0x55d>;
		};

		clk_fpga_1p92 {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x153>;
			phandle = <0x55e>;
		};

		clk_fpga_2m {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x154>;
			phandle = <0x55f>;
		};

		clk_fpga_10m {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x155>;
			phandle = <0x560>;
		};

		clk_fpga_19m {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x156>;
			phandle = <0x561>;
		};

		clk_fpga_20m {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x157>;
			phandle = <0x562>;
		};

		clk_fpga_24m {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x158>;
			phandle = <0x563>;
		};

		clk_fpga_26m {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x159>;
			phandle = <0x564>;
		};

		clk_fpga_27m {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x15a>;
			phandle = <0x565>;
		};

		clk_fpga_32m {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x15b>;
			phandle = <0x566>;
		};

		clk_fpga_40m {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x15c>;
			phandle = <0x567>;
		};

		clk_fpga_48m {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x15d>;
			phandle = <0x568>;
		};

		clk_fpga_50m {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x15e>;
			phandle = <0x569>;
		};

		clk_fpga_57m {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x15f>;
			phandle = <0x56a>;
		};

		clk_fpga_60m {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x160>;
			phandle = <0x56b>;
		};

		clk_fpga_64m {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x161>;
			phandle = <0x56c>;
		};

		clk_fpga_80m {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x162>;
			phandle = <0x56d>;
		};

		clk_fpga_100m {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x163>;
			phandle = <0x56e>;
		};

		clk_fpga_160m {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x164>;
			phandle = <0x56f>;
		};

		clk_blpwm3 {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x165>;
			phandle = <0x17f>;
		};

		clk_blpwm4 {
			#clock-cells = <0x00>;
			clocks = <0xfd 0x166>;
			phandle = <0x570>;
		};

		clk_ap_pcie0pll {
			#clock-cells = <0x00>;
			clocks = <0xfe 0x00>;
			phandle = <0x165>;
		};

		clk_hsdt0_pcie0_mcu {
			#clock-cells = <0x00>;
			clocks = <0xfe 0x01>;
			phandle = <0x168>;
		};

		clk_hsdt0_pcie1_mcu {
			#clock-cells = <0x00>;
			clocks = <0xfe 0x02>;
			phandle = <0x171>;
		};

		clk_hsdt0_pcie0_mcu_bus {
			#clock-cells = <0x00>;
			clocks = <0xfe 0x03>;
			phandle = <0x169>;
		};

		clk_hsdt0_pcie1_mcu_bus {
			#clock-cells = <0x00>;
			clocks = <0xfe 0x04>;
			phandle = <0x172>;
		};

		clk_hsdt0_pcie0_mcu_32k {
			#clock-cells = <0x00>;
			clocks = <0xfe 0x05>;
			phandle = <0x16a>;
		};

		clk_hsdt0_pcie1_mcu_32k {
			#clock-cells = <0x00>;
			clocks = <0xfe 0x06>;
			phandle = <0x173>;
		};

		clk_hsdt0_pcie0_mcu_19p2 {
			#clock-cells = <0x00>;
			clocks = <0xfe 0x07>;
			phandle = <0x167>;
		};

		clk_hsdt0_pcie1_mcu_19p2 {
			#clock-cells = <0x00>;
			clocks = <0xfe 0x08>;
			phandle = <0x170>;
		};

		clk_pciephy_ref {
			#clock-cells = <0x00>;
			clocks = <0xfe 0x09>;
			phandle = <0x571>;
		};

		clk_pcie1phy_ref {
			#clock-cells = <0x00>;
			clocks = <0xfe 0x0a>;
			phandle = <0x572>;
		};

		pclk_pcie_sys {
			#clock-cells = <0x00>;
			clocks = <0xfe 0x0b>;
			phandle = <0x161>;
		};

		pclk_pcie1_sys {
			#clock-cells = <0x00>;
			clocks = <0xfe 0x0c>;
			phandle = <0x16d>;
		};

		pclk_pcie_phy {
			#clock-cells = <0x00>;
			clocks = <0xfe 0x0d>;
			phandle = <0x160>;
		};

		pclk_pcie1_phy {
			#clock-cells = <0x00>;
			clocks = <0xfe 0x0e>;
			phandle = <0x16c>;
		};

		aclk_pcie {
			#clock-cells = <0x00>;
			clocks = <0xfe 0x0f>;
			phandle = <0x162>;
		};

		clk_hsdt_tcu {
			#clock-cells = <0x00>;
			clocks = <0xfe 0x10>;
			phandle = <0x163>;
		};

		clk_hsdt_tbu {
			#clock-cells = <0x00>;
			clocks = <0xfe 0x11>;
			phandle = <0x164>;
		};

		clk_pcie1_tbu {
			#clock-cells = <0x00>;
			clocks = <0xfe 0x12>;
			phandle = <0x16f>;
		};

		aclk_pcie1 {
			#clock-cells = <0x00>;
			clocks = <0xfe 0x13>;
			phandle = <0x16e>;
		};

		clk_ap_sdpll {
			#clock-cells = <0x00>;
			clocks = <0xff 0x00>;
			phandle = <0x573>;
		};

		aclk_usb3otg {
			#clock-cells = <0x00>;
			clocks = <0xff 0x01>;
			phandle = <0x155>;
		};

		aclk_asyncbrg {
			#clock-cells = <0x00>;
			clocks = <0xff 0x02>;
			phandle = <0x156>;
		};

		clkgt_sdiopll {
			#clock-cells = <0x00>;
			clocks = <0xff 0x03>;
			phandle = <0x574>;
		};

		clkdiv_sdiopll {
			#clock-cells = <0x00>;
			clocks = <0xff 0x04>;
			phandle = <0x575>;
		};

		clk_sdio_sys_gt {
			#clock-cells = <0x00>;
			clocks = <0xff 0x05>;
			phandle = <0x576>;
		};

		clk_mux_sdio_pll {
			#clock-cells = <0x00>;
			clocks = <0xff 0x06>;
			phandle = <0x577>;
		};

		clk_sdio {
			#clock-cells = <0x00>;
			clocks = <0xff 0x07>;
			phandle = <0x578>;
		};

		clk_sd {
			#clock-cells = <0x00>;
			clocks = <0xff 0x08>;
			phandle = <0x122>;
		};

		hclk_sd {
			#clock-cells = <0x00>;
			clocks = <0xff 0x09>;
			phandle = <0x123>;
		};

		clk_sd_muxsys {
			#clock-cells = <0x00>;
			clocks = <0xff 0x0a>;
			phandle = <0x579>;
		};

		clkgt_sdpll {
			#clock-cells = <0x00>;
			clocks = <0xff 0x0b>;
			phandle = <0x57a>;
		};

		clkdiv_sdpll {
			#clock-cells = <0x00>;
			clocks = <0xff 0x0c>;
			phandle = <0x57b>;
		};

		clk_sd_sys_gt {
			#clock-cells = <0x00>;
			clocks = <0xff 0x0d>;
			phandle = <0x57c>;
		};

		usb31phy_apb {
			#clock-cells = <0x00>;
			clocks = <0xff 0x0e>;
			phandle = <0x14c>;
		};

		hclk_dcdr_mux {
			#clock-cells = <0x00>;
			clocks = <0xff 0x0f>;
			phandle = <0x157>;
		};

		hi_usb3_suspend {
			#clock-cells = <0x00>;
			clocks = <0xff 0x10>;
			phandle = <0x57d>;
		};

		usbdp_mcu_32k {
			#clock-cells = <0x00>;
			clocks = <0xff 0x11>;
			phandle = <0x57e>;
		};

		snp_usb3_32k {
			#clock-cells = <0x00>;
			clocks = <0xff 0x12>;
			phandle = <0x153>;
		};

		hsdt1_usbdp_mcu {
			#clock-cells = <0x00>;
			clocks = <0xff 0x13>;
			phandle = <0x57f>;
		};

		usbdp_mcu_bus {
			#clock-cells = <0x00>;
			clocks = <0xff 0x14>;
			phandle = <0x14e>;
		};

		clk_hi_usb3_sys {
			#clock-cells = <0x00>;
			clocks = <0xff 0x15>;
			phandle = <0x580>;
		};

		aclk_hi_usb3 {
			#clock-cells = <0x00>;
			clocks = <0xff 0x16>;
			phandle = <0x581>;
		};

		aclk_snp_usb3 {
			#clock-cells = <0x00>;
			clocks = <0xff 0x17>;
			phandle = <0x143>;
		};

		usbdp_mcu_19p2 {
			#clock-cells = <0x00>;
			clocks = <0xff 0x18>;
			phandle = <0x582>;
		};

		pclk_usb2phy {
			#clock-cells = <0x00>;
			clocks = <0xff 0x19>;
			phandle = <0x149>;
		};

		hi_usb3crtl {
			#clock-cells = <0x00>;
			clocks = <0xff 0x1a>;
			phandle = <0x583>;
		};

		snp_usb3crtl {
			#clock-cells = <0x00>;
			clocks = <0xff 0x1b>;
			phandle = <0x152>;
		};

		pclk_usb_sctrl {
			#clock-cells = <0x00>;
			clocks = <0xff 0x1c>;
			phandle = <0x142>;
		};

		clkgt_usb2phy_ref {
			#clock-cells = <0x00>;
			clocks = <0xff 0x1d>;
			phandle = <0x584>;
		};

		clk_usb2phy_ref {
			#clock-cells = <0x00>;
			clocks = <0xff 0x1e>;
			phandle = <0x148>;
		};

		clk_usbdp_aux {
			#clock-cells = <0x00>;
			clocks = <0xff 0x1f>;
			phandle = <0x14d>;
		};

		clkgt_usb2_ulpi {
			#clock-cells = <0x00>;
			clocks = <0xff 0x20>;
			phandle = <0x585>;
		};

		clk_div_usb2_ulpi {
			#clock-cells = <0x00>;
			clocks = <0xff 0x21>;
			phandle = <0x586>;
		};

		clk_usb2_ulpi {
			#clock-cells = <0x00>;
			clocks = <0xff 0x22>;
			phandle = <0x587>;
		};

		pclk_dpctrl {
			#clock-cells = <0x00>;
			clocks = <0xff 0x23>;
			phandle = <0x17c>;
		};

		clk_ap_aupll {
			#clock-cells = <0x00>;
			clocks = <0x100 0x00>;
			phandle = <0x588>;
		};

		pclk_gpio20 {
			#clock-cells = <0x00>;
			clocks = <0x100 0x01>;
			phandle = <0x589>;
		};

		pclk_gpio21 {
			#clock-cells = <0x00>;
			clocks = <0x100 0x02>;
			phandle = <0x58a>;
		};

		clk_timer5_b {
			#clock-cells = <0x00>;
			clocks = <0x100 0x03>;
			phandle = <0x15e>;
		};

		clkmux_timer5_a {
			#clock-cells = <0x00>;
			clocks = <0x100 0x04>;
			phandle = <0x58b>;
		};

		clkmux_timer5_b {
			#clock-cells = <0x00>;
			clocks = <0x100 0x05>;
			phandle = <0x58c>;
		};

		clk_timer5 {
			#clock-cells = <0x00>;
			clocks = <0x100 0x06>;
			phandle = <0x15d>;
		};

		clkmux_i2c9 {
			#clock-cells = <0x00>;
			clocks = <0x100 0x07>;
			phandle = <0x58d>;
		};

		clkgt_i2c9 {
			#clock-cells = <0x00>;
			clocks = <0x100 0x08>;
			phandle = <0x58e>;
		};

		clkdiv_i2c9 {
			#clock-cells = <0x00>;
			clocks = <0x100 0x09>;
			phandle = <0x58f>;
		};

		clk_i2c9 {
			#clock-cells = <0x00>;
			clocks = <0x100 0x0a>;
			phandle = <0x5a>;
		};

		pclk_i2c9 {
			#clock-cells = <0x00>;
			clocks = <0x100 0x0b>;
			phandle = <0x590>;
		};

		gt_spi3_ulppll {
			#clock-cells = <0x00>;
			clocks = <0x100 0x0c>;
			phandle = <0x591>;
		};

		div_spi3_ulppll {
			#clock-cells = <0x00>;
			clocks = <0x100 0x0d>;
			phandle = <0x592>;
		};

		clkgt_spi3 {
			#clock-cells = <0x00>;
			clocks = <0x100 0x0e>;
			phandle = <0x593>;
		};

		clkdiv_spi3 {
			#clock-cells = <0x00>;
			clocks = <0x100 0x0f>;
			phandle = <0x594>;
		};

		clkmux_spi3 {
			#clock-cells = <0x00>;
			clocks = <0x100 0x10>;
			phandle = <0x595>;
		};

		clk_spi3 {
			#clock-cells = <0x00>;
			clocks = <0x100 0x11>;
			phandle = <0xa4>;
		};

		pclk_spi3 {
			#clock-cells = <0x00>;
			clocks = <0x100 0x12>;
			phandle = <0x596>;
		};

		clk_qic_spidma {
			#clock-cells = <0x00>;
			clocks = <0x100 0x13>;
			phandle = <0x597>;
		};

		gt_spi5_ulppll {
			#clock-cells = <0x00>;
			clocks = <0x100 0x14>;
			phandle = <0x598>;
		};

		div_spi5_ulppll {
			#clock-cells = <0x00>;
			clocks = <0x100 0x15>;
			phandle = <0x599>;
		};

		clkgt_spi5 {
			#clock-cells = <0x00>;
			clocks = <0x100 0x16>;
			phandle = <0x59a>;
		};

		clkdiv_spi5 {
			#clock-cells = <0x00>;
			clocks = <0x100 0x17>;
			phandle = <0x59b>;
		};

		clkmux_spi5 {
			#clock-cells = <0x00>;
			clocks = <0x100 0x18>;
			phandle = <0x59c>;
		};

		clk_spi5 {
			#clock-cells = <0x00>;
			clocks = <0x100 0x19>;
			phandle = <0xb1>;
		};

		pclk_spi5 {
			#clock-cells = <0x00>;
			clocks = <0x100 0x1a>;
			phandle = <0x59d>;
		};

		clkgt_32kpll_pcieaux {
			#clock-cells = <0x00>;
			clocks = <0x100 0x1b>;
			phandle = <0x59e>;
		};

		div_32kpll_pcieaux {
			#clock-cells = <0x00>;
			clocks = <0x100 0x1c>;
			phandle = <0x59f>;
		};

		clkmux_pcieaux {
			#clock-cells = <0x00>;
			clocks = <0x100 0x1d>;
			phandle = <0x5a0>;
		};

		clk_hsdt0_pcie_aux {
			#clock-cells = <0x00>;
			clocks = <0x100 0x1e>;
			phandle = <0x5a1>;
		};

		clk_pcie0_aux {
			#clock-cells = <0x00>;
			clocks = <0x100 0x1f>;
			phandle = <0x15f>;
		};

		clk_pcie1_aux {
			#clock-cells = <0x00>;
			clocks = <0x100 0x20>;
			phandle = <0x16b>;
		};

		pclk_rtc {
			#clock-cells = <0x00>;
			clocks = <0x100 0x21>;
			phandle = <0x5a2>;
		};

		pclk_ao_gpio0 {
			#clock-cells = <0x00>;
			clocks = <0x100 0x22>;
			phandle = <0x5a3>;
		};

		pclk_ao_gpio1 {
			#clock-cells = <0x00>;
			clocks = <0x100 0x23>;
			phandle = <0x5a4>;
		};

		pclk_ao_gpio2 {
			#clock-cells = <0x00>;
			clocks = <0x100 0x24>;
			phandle = <0x5a5>;
		};

		pclk_ao_gpio3 {
			#clock-cells = <0x00>;
			clocks = <0x100 0x25>;
			phandle = <0x5a6>;
		};

		pclk_ao_gpio4 {
			#clock-cells = <0x00>;
			clocks = <0x100 0x26>;
			phandle = <0x5a7>;
		};

		pclk_ao_gpio5 {
			#clock-cells = <0x00>;
			clocks = <0x100 0x27>;
			phandle = <0x5a8>;
		};

		pclk_ao_gpio6 {
			#clock-cells = <0x00>;
			clocks = <0x100 0x28>;
			phandle = <0x5a9>;
		};

		pclk_ao_gpio29 {
			#clock-cells = <0x00>;
			clocks = <0x100 0x29>;
			phandle = <0x5aa>;
		};

		pclk_ao_gpio30 {
			#clock-cells = <0x00>;
			clocks = <0x100 0x2a>;
			phandle = <0x5ab>;
		};

		pclk_ao_gpio31 {
			#clock-cells = <0x00>;
			clocks = <0x100 0x2b>;
			phandle = <0x5ac>;
		};

		pclk_ao_gpio32 {
			#clock-cells = <0x00>;
			clocks = <0x100 0x2c>;
			phandle = <0x5ad>;
		};

		pclk_ao_gpio33 {
			#clock-cells = <0x00>;
			clocks = <0x100 0x2d>;
			phandle = <0x5ae>;
		};

		pclk_ao_gpio34 {
			#clock-cells = <0x00>;
			clocks = <0x100 0x2e>;
			phandle = <0x5af>;
		};

		pclk_ao_gpio35 {
			#clock-cells = <0x00>;
			clocks = <0x100 0x2f>;
			phandle = <0x5b0>;
		};

		pclk_ao_gpio36 {
			#clock-cells = <0x00>;
			clocks = <0x100 0x30>;
			phandle = <0x5b1>;
		};

		clkgt_blpwm2 {
			#clock-cells = <0x00>;
			clocks = <0x100 0x31>;
			phandle = <0x5b2>;
		};

		clkdiv_blpwm2 {
			#clock-cells = <0x00>;
			clocks = <0x100 0x32>;
			phandle = <0x5b3>;
		};

		clk_blpwm2 {
			#clock-cells = <0x00>;
			clocks = <0x100 0x33>;
			phandle = <0x5b4>;
		};

		pclk_syscnt {
			#clock-cells = <0x00>;
			clocks = <0x100 0x34>;
			phandle = <0x5b5>;
		};

		clk_syscnt {
			#clock-cells = <0x00>;
			clocks = <0x100 0x35>;
			phandle = <0x5b6>;
		};

		clkmux_syscnt {
			#clock-cells = <0x00>;
			clocks = <0x100 0x36>;
			phandle = <0x5b7>;
		};

		clkgt_asp_codec {
			#clock-cells = <0x00>;
			clocks = <0x100 0x37>;
			phandle = <0x5b8>;
		};

		clkdiv_asp_codec {
			#clock-cells = <0x00>;
			clocks = <0x100 0x38>;
			phandle = <0x5b9>;
		};

		clk_asp_codec {
			#clock-cells = <0x00>;
			clocks = <0x100 0x39>;
			phandle = <0x5ba>;
		};

		clk_asp_subsys {
			#clock-cells = <0x00>;
			clocks = <0x100 0x3a>;
			phandle = <0x5bb>;
		};

		clk_asp_pll_sel {
			#clock-cells = <0x00>;
			clocks = <0x100 0x3b>;
			phandle = <0x5bc>;
		};

		sel_ao_asp_32kpll {
			#clock-cells = <0x00>;
			clocks = <0x100 0x3c>;
			phandle = <0x5bd>;
		};

		clk_asp_tcxo {
			#clock-cells = <0x00>;
			clocks = <0x100 0x3d>;
			phandle = <0x5be>;
		};

		clk_dp_audio_pll {
			#clock-cells = <0x00>;
			clocks = <0x100 0x3e>;
			phandle = <0x5bf>;
		};

		clk_dp_audio_pll_ao_div {
			#clock-cells = <0x00>;
			clocks = <0x100 0x3f>;
			phandle = <0x5c0>;
		};

		clk_dp_audio_pll_ao_gt {
			#clock-cells = <0x00>;
			clocks = <0x100 0x40>;
			phandle = <0x5c1>;
		};

		clkmux_ao_camera {
			#clock-cells = <0x00>;
			clocks = <0x100 0x41>;
			phandle = <0x5c2>;
		};

		clkgt_ao_camera {
			#clock-cells = <0x00>;
			clocks = <0x100 0x42>;
			phandle = <0x5c3>;
		};

		clkdiv_ao_camera {
			#clock-cells = <0x00>;
			clocks = <0x100 0x43>;
			phandle = <0x5c4>;
		};

		clk_ao_tof {
			#clock-cells = <0x00>;
			clocks = <0x100 0x44>;
			phandle = <0x5c5>;
		};

		clk_ao_camera {
			#clock-cells = <0x00>;
			clocks = <0x100 0x45>;
			phandle = <0x5c6>;
		};

		pclk_ao_loadmonitor {
			#clock-cells = <0x00>;
			clocks = <0x100 0x46>;
			phandle = <0x5c7>;
		};

		clk_ao_loadmonitor {
			#clock-cells = <0x00>;
			clocks = <0x100 0x47>;
			phandle = <0x5c8>;
		};

		clk_ao_loadmonitor_div {
			#clock-cells = <0x00>;
			clocks = <0x100 0x48>;
			phandle = <0x5c9>;
		};

		clk_ao_loadmonitor_gt {
			#clock-cells = <0x00>;
			clocks = <0x100 0x49>;
			phandle = <0x5ca>;
		};

		clkgt_out0 {
			#clock-cells = <0x00>;
			clocks = <0x100 0x4a>;
			phandle = <0x5cb>;
		};

		clkmux_out0 {
			#clock-cells = <0x00>;
			clocks = <0x100 0x4b>;
			phandle = <0x5cc>;
		};

		clkdiv_out0 {
			#clock-cells = <0x00>;
			clocks = <0x100 0x4c>;
			phandle = <0x5cd>;
		};

		clk_out0 {
			#clock-cells = <0x00>;
			clocks = <0x100 0x4d>;
			phandle = <0x5ce>;
		};

		clk_i2c1_gt {
			#clock-cells = <0x00>;
			clocks = <0x101 0x00>;
			phandle = <0x5cf>;
		};

		clk_dss_tcxo {
			#clock-cells = <0x00>;
			clocks = <0x102 0x00>;
			phandle = <0x5d0>;
		};

		clk_vivobus_mux {
			#clock-cells = <0x00>;
			clocks = <0x102 0x01>;
			phandle = <0x5d1>;
		};

		clk_vivobus_gt {
			#clock-cells = <0x00>;
			clocks = <0x102 0x02>;
			phandle = <0x5d2>;
		};

		clk_vivobus_div {
			#clock-cells = <0x00>;
			clocks = <0x102 0x03>;
			phandle = <0x5d3>;
		};

		clk_vivobus {
			#clock-cells = <0x00>;
			clocks = <0x102 0x04>;
			phandle = <0x116>;
		};

		clkmux_vdec {
			#clock-cells = <0x00>;
			clocks = <0x102 0x05>;
			phandle = <0x5d4>;
		};

		clkgt_vdec {
			#clock-cells = <0x00>;
			clocks = <0x102 0x06>;
			phandle = <0x5d5>;
		};

		clkdiv_vdec {
			#clock-cells = <0x00>;
			clocks = <0x102 0x07>;
			phandle = <0x5d6>;
		};

		clk_vdecfreq {
			#clock-cells = <0x00>;
			clocks = <0x102 0x08>;
			phandle = <0x5d7>;
		};

		pclk_vdec {
			#clock-cells = <0x00>;
			clocks = <0x102 0x09>;
			phandle = <0x5d8>;
		};

		aclk_vdec {
			#clock-cells = <0x00>;
			clocks = <0x102 0x0a>;
			phandle = <0x5d9>;
		};

		clkmux_arpp_top {
			#clock-cells = <0x00>;
			clocks = <0x102 0x0b>;
			phandle = <0x5da>;
		};

		clkgt_arpp_top {
			#clock-cells = <0x00>;
			clocks = <0x102 0x0c>;
			phandle = <0x5db>;
		};

		clkdiv_arpp_top {
			#clock-cells = <0x00>;
			clocks = <0x102 0x0d>;
			phandle = <0x5dc>;
		};

		aclk_jpg {
			#clock-cells = <0x00>;
			clocks = <0x102 0x0e>;
			phandle = <0x5dd>;
		};

		pclk_jpg {
			#clock-cells = <0x00>;
			clocks = <0x102 0x0f>;
			phandle = <0x5de>;
		};

		clk_atdiv_vivo {
			#clock-cells = <0x00>;
			clocks = <0x102 0x10>;
			phandle = <0x5df>;
		};

		clk_atdiv_vdec {
			#clock-cells = <0x00>;
			clocks = <0x102 0x11>;
			phandle = <0x5e0>;
		};

		pclk_isp_qic_subsys {
			#clock-cells = <0x00>;
			clocks = <0x103 0x00>;
			phandle = <0x5e1>;
		};

		aclk_isp_qic_subsys {
			#clock-cells = <0x00>;
			clocks = <0x103 0x01>;
			phandle = <0x5e2>;
		};

		aclk_isp {
			#clock-cells = <0x00>;
			clocks = <0x103 0x02>;
			phandle = <0x11a>;
		};

		clk_vcodecbus {
			#clock-cells = <0x00>;
			clocks = <0x103 0x03>;
			phandle = <0x117>;
		};

		clk_vcodecbus2 {
			#clock-cells = <0x00>;
			clocks = <0x103 0x04>;
			phandle = <0x5e3>;
		};

		clk_vcodbus_div {
			#clock-cells = <0x00>;
			clocks = <0x103 0x05>;
			phandle = <0x5e4>;
		};

		clk_vcodbus_gt {
			#clock-cells = <0x00>;
			clocks = <0x103 0x06>;
			phandle = <0x5e5>;
		};

		clk_vcodec_syspll0 {
			#clock-cells = <0x00>;
			clocks = <0x103 0x07>;
			phandle = <0x5e6>;
		};

		clk_vcodbus_mux {
			#clock-cells = <0x00>;
			clocks = <0x103 0x08>;
			phandle = <0x5e7>;
		};

		clkmux_venc {
			#clock-cells = <0x00>;
			clocks = <0x103 0x09>;
			phandle = <0x5e8>;
		};

		clkgt_venc {
			#clock-cells = <0x00>;
			clocks = <0x103 0x0a>;
			phandle = <0x5e9>;
		};

		clkdiv_venc {
			#clock-cells = <0x00>;
			clocks = <0x103 0x0b>;
			phandle = <0x5ea>;
		};

		clk_vencfreq {
			#clock-cells = <0x00>;
			clocks = <0x103 0x0c>;
			phandle = <0x5eb>;
		};

		pclk_venc {
			#clock-cells = <0x00>;
			clocks = <0x103 0x0d>;
			phandle = <0x5ec>;
		};

		aclkmux_venc {
			#clock-cells = <0x00>;
			clocks = <0x103 0x0e>;
			phandle = <0x5ed>;
		};

		aclkgt_venc {
			#clock-cells = <0x00>;
			clocks = <0x103 0x0f>;
			phandle = <0x5ee>;
		};

		aclkdiv_venc {
			#clock-cells = <0x00>;
			clocks = <0x103 0x10>;
			phandle = <0x5ef>;
		};

		aclk_vencfreq {
			#clock-cells = <0x00>;
			clocks = <0x103 0x11>;
			phandle = <0x5f0>;
		};

		clk_ispi2c_mux {
			#clock-cells = <0x00>;
			clocks = <0x103 0x12>;
			phandle = <0x5f1>;
		};

		clk_ispi2c {
			#clock-cells = <0x00>;
			clocks = <0x103 0x13>;
			phandle = <0x10d>;
		};

		clk_isp_sys {
			#clock-cells = <0x00>;
			clocks = <0x103 0x14>;
			phandle = <0x10f>;
		};

		sel_ispcpu {
			#clock-cells = <0x00>;
			clocks = <0x103 0x15>;
			phandle = <0x5f2>;
		};

		clk_ispcpu_gt {
			#clock-cells = <0x00>;
			clocks = <0x103 0x16>;
			phandle = <0x5f3>;
		};

		clk_ispcpu_div {
			#clock-cells = <0x00>;
			clocks = <0x103 0x17>;
			phandle = <0x5f4>;
		};

		clk_ispcpufreq {
			#clock-cells = <0x00>;
			clocks = <0x103 0x18>;
			phandle = <0x5f5>;
		};

		clkgt_isp_i3c {
			#clock-cells = <0x00>;
			clocks = <0x103 0x19>;
			phandle = <0x5f6>;
		};

		clkdiv_isp_i3c {
			#clock-cells = <0x00>;
			clocks = <0x103 0x1a>;
			phandle = <0x5f7>;
		};

		clk_isp_i3c {
			#clock-cells = <0x00>;
			clocks = <0x103 0x1b>;
			phandle = <0x10e>;
		};

		clk_ivpdsp_tcxo {
			#clock-cells = <0x00>;
			clocks = <0x103 0x1c>;
			phandle = <0x5f8>;
		};

		clkmux_ivp32dsp {
			#clock-cells = <0x00>;
			clocks = <0x103 0x1d>;
			phandle = <0x5f9>;
		};

		clkgt_ivp32dsp {
			#clock-cells = <0x00>;
			clocks = <0x103 0x1e>;
			phandle = <0x5fa>;
		};

		clkdiv_ivpdsp {
			#clock-cells = <0x00>;
			clocks = <0x103 0x1f>;
			phandle = <0x5fb>;
		};

		clk_atdiv_vcbus {
			#clock-cells = <0x00>;
			clocks = <0x103 0x20>;
			phandle = <0x5fc>;
		};

		clk_atdiv_venc {
			#clock-cells = <0x00>;
			clocks = <0x103 0x21>;
			phandle = <0x5fd>;
		};

		cpu-cluster.0 {
			#clock-cells = <0x00>;
			clocks = <0x104 0x00>;
			phandle = <0x06>;
		};

		cpu-cluster.1 {
			#clock-cells = <0x00>;
			clocks = <0x104 0x01>;
			phandle = <0x0c>;
		};

		clk_g3d {
			#clock-cells = <0x00>;
			clocks = <0x104 0x02>;
			phandle = <0x183>;
		};

		clk_ddrc_freq {
			#clock-cells = <0x00>;
			clocks = <0x104 0x03>;
			phandle = <0x04>;
		};

		clk_ddrc_max {
			#clock-cells = <0x00>;
			clocks = <0x104 0x04>;
			phandle = <0x05>;
		};

		clk_ddrc_min {
			#clock-cells = <0x00>;
			clocks = <0x104 0x05>;
			phandle = <0x03>;
		};

		clk_l1bus_min {
			#clock-cells = <0x00>;
			clocks = <0x104 0x06>;
			phandle = <0x121>;
		};

		clk_abb_192 {
			#clock-cells = <0x00>;
			clocks = <0x105 0x00>;
			phandle = <0x5fe>;
		};

		clk_pmu32ka {
			#clock-cells = <0x00>;
			clocks = <0x105 0x01>;
			phandle = <0x5ff>;
		};

		clk_pmu32kb {
			#clock-cells = <0x00>;
			clocks = <0x105 0x02>;
			phandle = <0x600>;
		};

		clk_pmu32kc {
			#clock-cells = <0x00>;
			clocks = <0x105 0x03>;
			phandle = <0x601>;
		};

		clk_pmuaudioclk {
			#clock-cells = <0x00>;
			clocks = <0x105 0x04>;
			phandle = <0x602>;
		};

		clk_eusb_38m4 {
			#clock-cells = <0x00>;
			clocks = <0x105 0x05>;
			phandle = <0x603>;
		};

		clk_edc0 {
			#clock-cells = <0x00>;
			clocks = <0x106 0x00>;
			phandle = <0x119>;
		};

		clk_vdec {
			#clock-cells = <0x00>;
			clocks = <0x106 0x01>;
			phandle = <0x185>;
		};

		clk_venc {
			#clock-cells = <0x00>;
			clocks = <0x106 0x02>;
			phandle = <0x11c>;
		};

		clk_ispfunc {
			#clock-cells = <0x00>;
			clocks = <0x106 0x03>;
			phandle = <0x10c>;
		};

		clk_jpg_func {
			#clock-cells = <0x00>;
			clocks = <0x106 0x04>;
			phandle = <0x115>;
		};

		aclk_venc {
			#clock-cells = <0x00>;
			clocks = <0x106 0x05>;
			phandle = <0x188>;
		};

		clk_edc0_mem {
			#clock-cells = <0x00>;
			clocks = <0x106 0x06>;
			phandle = <0x604>;
		};

		clk_vdec_mem {
			#clock-cells = <0x00>;
			clocks = <0x106 0x07>;
			phandle = <0x605>;
		};

		clk_venc_mem {
			#clock-cells = <0x00>;
			clocks = <0x106 0x08>;
			phandle = <0x606>;
		};

		clk_ispfunc_mem {
			#clock-cells = <0x00>;
			clocks = <0x106 0x09>;
			phandle = <0x607>;
		};

		clk_jpgfunc_mem {
			#clock-cells = <0x00>;
			clocks = <0x106 0x0a>;
			phandle = <0x608>;
		};

		aclk_venc_mem {
			#clock-cells = <0x00>;
			clocks = <0x106 0x0b>;
			phandle = <0x609>;
		};

		clk_ispcpu {
			#clock-cells = <0x00>;
			clocks = <0x106 0x0c>;
			phandle = <0x10b>;
		};

		clk_ispfunc2 {
			#clock-cells = <0x00>;
			clocks = <0x106 0x0d>;
			phandle = <0x60a>;
		};

		clk_edc0freq {
			#clock-cells = <0x00>;
			clocks = <0x107 0x00>;
			phandle = <0x60b>;
		};

		clk_jpg_funcfreq {
			#clock-cells = <0x00>;
			clocks = <0x107 0x01>;
			phandle = <0x60c>;
		};

		clk_vdec_freq {
			#clock-cells = <0x00>;
			clocks = <0x107 0x02>;
			phandle = <0x60d>;
		};

		clk_ispfuncfreq {
			#clock-cells = <0x00>;
			clocks = <0x108 0x00>;
			phandle = <0x60e>;
		};

		aclk_venc_freq {
			#clock-cells = <0x00>;
			clocks = <0x108 0x01>;
			phandle = <0x60f>;
		};
	};

	clk_crgctrl@FFB85000 {
		compatible = "hisilicon,clk-extreme-crgctrl";
		reg = <0x00 0xffb85000 0x00 0x1000>;
		#clock-cells = <0x01>;
		phandle = <0xfd>;
	};

	clk_hsdt_crgctrl@EE262000 {
		compatible = "hisilicon,clk-extreme-hsdt-crg";
		reg = <0x00 0xee262000 0x00 0x1000>;
		#clock-cells = <0x01>;
		phandle = <0xfe>;
	};

	clk_hsdt1_crgctrl@EFB02000 {
		compatible = "hisilicon,clk-extreme-hsdt1-crg";
		reg = <0x00 0xefb02000 0x00 0x1000>;
		#clock-cells = <0x01>;
		phandle = <0xff>;
	};

	clk_sctrl@FB21B000 {
		compatible = "hisilicon,clk-extreme-sctrl";
		reg = <0x00 0xfb21b000 0x00 0x1000>;
		#clock-cells = <0x01>;
		phandle = <0x100>;
	};

	clk_pctrl@FF7CC000 {
		compatible = "hisilicon,clk-extreme-pctrl";
		reg = <0x00 0xff7cc000 0x00 0x1000>;
		#clock-cells = <0x01>;
		phandle = <0x610>;
	};

	clk_media1_crgctrl@E8D01000 {
		compatible = "hisilicon,clk-extreme-media1-crg";
		reg = <0x00 0xe8d01000 0x00 0x1000>;
		#clock-cells = <0x01>;
		phandle = <0x102>;
	};

	clk_media2_crgctrl@E93F0000 {
		compatible = "hisilicon,clk-extreme-media2-crg";
		reg = <0x00 0xe93f0000 0x00 0x1000>;
		#clock-cells = <0x01>;
		phandle = <0x103>;
	};

	clk_iomcu_crgctrl@FAE7E000 {
		compatible = "hisilicon,clk-extreme-iomcu-crg";
		reg = <0x00 0xfae7e000 0x00 0x1000>;
		#clock-cells = <0x01>;
		phandle = <0x101>;
	};

	clk_xfreqclk@FFB81000 {
		compatible = "hisilicon,clk-extreme-xfreq";
		reg = <0x00 0xffb81000 0x00 0x1000>;
		#clock-cells = <0x01>;
		phandle = <0x104>;
	};

	clk_pmuctrl@FB21B000 {
		compatible = "hisilicon,clk-extreme-pmu";
		reg = <0x00 0xfb21b000 0x00 0x1000>;
		abb_scbakdata = <0x43c>;
		#clock-cells = <0x01>;
		phandle = <0x105>;
	};

	clk_fast_dvfs_media1_crgctrl@E8D01000 {
		compatible = "hisilicon,clk-extreme-fast-dvfs-media1";
		reg = <0x00 0xe8d01000 0x00 0x1000>;
		#clock-cells = <0x01>;
		phandle = <0x107>;
	};

	clk_fast_dvfs_media2_crgctrl@E93F0000 {
		compatible = "hisilicon,clk-extreme-fast-dvfs-media2";
		reg = <0x00 0xe93f0000 0x00 0x1000>;
		#clock-cells = <0x01>;
		phandle = <0x108>;
	};

	clk_dvfs_crgctrl@FB21B000 {
		compatible = "hisilicon,clk-extreme-dvfs";
		reg = <0x00 0xfb21b000 0x00 0x1000>;
		#clock-cells = <0x01>;
		phandle = <0x106>;
	};

	peri_dvfs@0xFFB81000 {
		compatible = "hisilicon,soc-peri-dvfs";
		reg = <0x00 0xffb81000 0x00 0x1000>;
		perimem-dvs-enabled = <0x01>;
		status = "ok";
		perivolt-poll-acpu = <0x354>;
		perivolt-poll-lpmcu = <0x350>;
		perivolt-poll-lpmcu-lowtemp = <0xc000000>;
		perivolt-poll-lpmcu-fixedvolt = <0x3c00000>;
		perivolt-poll-max-voltlevel = <0x03>;
		perivolt-poll-vote-width = <0x02>;
		perivolt-poll-max-channel-size = <0x0e>;
		perivolt-poll-max-irq-complete-usec = <0x3e8>;
		mediabus0-lowtemp-profile = <0x02>;
		mediabus1-lowtemp-profile = <0x02>;
		sysbus-lowtemp-profile = <0x02>;
		mediabus0-clock-names = "clk_ppll0_media", "clk_ppll0_media", "clk_ppll1_media", "clk_ppll2b_media";
		mediabus1-clock-names = "clk_ppll0_m2", "clk_ppll0_m2", "clk_ppll1_m2", "clk_ppll2b_m2";
		peridvs-chan-reg-dump-size = <0x08>;
		peridvs-chan-reg-dump = <0x00 0x04 0x08 0x0c 0x10 0x14 0x18 0x24>;
		perimem-chan-reg-dump-size = <0x06>;
		perimem-chan-reg-dump = <0x500 0x510 0x520 0x534 0x530 0x524>;
		peridvs-chan-regnum = <0x07>;
		perimemdvs-chan-regnum = <0x07>;
		peridvs-chan0-reg = <0x00 0x08 0x0c 0x18 0x14 0x10 0x24>;
		peridvs-chan1-reg = <0x00 0x08 0x0c 0x18 0x14 0x10 0x24>;
		peridvs-chan2-reg = <0x00 0x08 0x0c 0x18 0x14 0x10 0x24>;
		peridvs-chan3-reg = <0x00 0x08 0x0c 0x18 0x14 0x10 0x24>;
		peridvs-chan4-reg = <0x00 0x08 0x0c 0x18 0x14 0x10 0x24>;
		peridvs-chan8-reg = <0x04 0x08 0x0c 0x18 0x14 0x10 0x24>;
		peridvs-chan13-reg = <0x04 0x08 0x0c 0x18 0x14 0x10 0x24>;
		perimem-chan0-reg = <0x500 0x510 0x520 0x534 0x530 0x524 0xfff>;
		perimem-chan1-reg = <0x500 0x510 0x520 0x534 0x530 0x524 0xfff>;
		perimem-chan2-reg = <0x500 0x510 0x520 0x534 0x530 0x524 0xfff>;
		perimem-chan3-reg = <0x500 0x510 0x520 0x534 0x530 0x524 0xfff>;
		perimem-chan4-reg = <0x500 0x510 0x520 0x534 0x530 0x524 0xfff>;
		perimem-chan7-reg = <0x500 0x510 0x520 0x534 0x530 0x524 0xfff>;
		peridvs-chan0-offset = <0x00 0x00 0x00 0x00 0x00 0x00 0x00>;
		peridvs-chan1-offset = <0x01 0x01 0x01 0x01 0x01 0x01 0x01>;
		peridvs-chan2-offset = <0x02 0x02 0x02 0x02 0x02 0x02 0x02>;
		peridvs-chan3-offset = <0x03 0x03 0x03 0x03 0x03 0x03 0x03>;
		peridvs-chan4-offset = <0x04 0x04 0x04 0x04 0x04 0x04 0x04>;
		peridvs-chan8-offset = <0x00 0x08 0x08 0x08 0x08 0x08 0x08>;
		peridvs-chan13-offset = <0x05 0x0d 0x0d 0x0d 0x0d 0x0d 0x0d>;
		perimem-chan0-offset = <0x00 0x00 0x00 0x00 0x00 0x00 0x00>;
		perimem-chan1-offset = <0x01 0x01 0x01 0x01 0x01 0x01 0x01>;
		perimem-chan2-offset = <0x02 0x02 0x02 0x02 0x02 0x02 0x02>;
		perimem-chan3-offset = <0x03 0x03 0x03 0x03 0x03 0x03 0x03>;
		perimem-chan4-offset = <0x04 0x04 0x04 0x04 0x04 0x04 0x04>;
		perimem-chan7-offset = <0x07 0x07 0x07 0x07 0x07 0x07 0x07>;
		phandle = <0x611>;

		pvp_edc0 {
			compatible = "hisilicon,soc-peri-volt";
			perivolt-poll-id = <0x14>;
			perivolt-poll-channel = <0x00>;
			perivolt-poll-mediabus = <0x00>;
			perivolt-poll-record = <0x00 0x354 0x03>;
			perivolt-output-names = "pvp_edc0";
			phandle = <0x612>;
		};

		pvp_vdec {
			compatible = "hisilicon,soc-peri-volt";
			perivolt-poll-id = <0x15>;
			perivolt-poll-channel = <0x01>;
			perivolt-poll-mediabus = <0x00>;
			perivolt-poll-record = <0x01 0x44c 0x03>;
			perivolt-output-names = "pvp_vdec";
			phandle = <0x613>;
		};

		pvp_venc {
			compatible = "hisilicon,soc-peri-volt";
			perivolt-poll-id = <0x18>;
			perivolt-poll-channel = <0x02>;
			perivolt-poll-mediabus = <0x01>;
			perivolt-poll-record = <0x01 0x44c 0x0c>;
			perivolt-output-names = "pvp_venc";
			phandle = <0x614>;
		};

		pvp_ispfunc {
			compatible = "hisilicon,soc-peri-volt";
			perivolt-poll-id = <0x1a>;
			perivolt-poll-channel = <0x03>;
			perivolt-poll-mediabus = <0x01>;
			perivolt-poll-record = <0x00 0x354 0xc0>;
			perivolt-output-names = "pvp_ispfunc";
			phandle = <0x615>;
		};

		pvp_avenc {
			compatible = "hisilicon,soc-peri-volt";
			perivolt-poll-id = <0x27>;
			perivolt-poll-channel = <0x02>;
			perivolt-poll-mediabus = <0x01>;
			perivolt-poll-record = <0x00 0x354 0xc00>;
			perivolt-output-names = "pvp_avenc";
			phandle = <0x616>;
		};

		pvp_ispjpg {
			compatible = "hisilicon,soc-peri-volt";
			perivolt-poll-id = <0x24>;
			perivolt-poll-channel = <0x04>;
			perivolt-poll-mediabus = <0x00>;
			perivolt-poll-record = <0x00 0x354 0x30000>;
			perivolt-output-names = "pvp_ispjpg";
			phandle = <0x617>;
		};

		pvp_low {
			compatible = "hisilicon,soc-peri-volt";
			perivolt-poll-id = <0x1c>;
			perivolt-poll-channel = <0x08>;
			perivolt-poll-record = <0x01 0x44c 0x300>;
			perivolt-output-names = "pvp_low";
			phandle = <0x618>;
		};

		pvp_middle {
			compatible = "hisilicon,soc-peri-volt";
			perivolt-poll-id = <0x16>;
			perivolt-poll-channel = <0x08>;
			perivolt-poll-record = <0x01 0x44c 0xc00>;
			perivolt-output-names = "pvp_middle";
			phandle = <0x619>;
		};

		pvp_hold {
			compatible = "hisilicon,soc-peri-volt";
			perivolt-poll-id = <0x12>;
			perivolt-poll-channel = <0x08>;
			perivolt-poll-record = <0x00 0x354 0xc000000>;
			perivolt-output-names = "pvp_hold";
			phandle = <0x61a>;
		};

		pvp_coresight {
			compatible = "hisilicon,soc-peri-volt";
			perivolt-poll-id = <0x13>;
			perivolt-poll-channel = <0x0d>;
			perivolt-poll-sysbus-sync = <0x01>;
			perivolt-poll-record = <0x00 0x354 0xc0000000>;
			perivolt-output-names = "pvp_coresight";
			phandle = <0x61b>;
		};

		pvp_no_avs_l {
			compatible = "hisilicon,soc-peri-volt";
			perivolt-poll-id = <0x11>;
			perivolt-poll-channel = <0x0d>;
			perivolt-poll-record = <0x00 0x354 0x30000000>;
			perivolt-output-names = "pvp_no_avs_l";
			phandle = <0x61c>;
		};

		pvp_edc0_mem {
			compatible = "hisilicon,soc-peri-volt";
			perivolt-poll-id = <0x78>;
			perivolt-poll-channel = <0x00>;
			perivolt-type = <0x01>;
			perivolt-poll-record = <0x00 0x354 0x0c>;
			perivolt-output-names = "pvp_edc0_mem";
			phandle = <0x61d>;
		};

		pvp_vdec_mem {
			compatible = "hisilicon,soc-peri-volt";
			perivolt-poll-id = <0x79>;
			perivolt-poll-channel = <0x01>;
			perivolt-type = <0x01>;
			perivolt-poll-record = <0x00 0x354 0xc0000>;
			perivolt-output-names = "pvp_vdec_mem";
			phandle = <0x61e>;
		};

		pvp_venc_mem {
			compatible = "hisilicon,soc-peri-volt";
			perivolt-poll-id = <0x7c>;
			perivolt-poll-channel = <0x02>;
			perivolt-type = <0x01>;
			perivolt-poll-record = <0x00 0x354 0x300000>;
			perivolt-output-names = "pvp_venc_mem";
			phandle = <0x61f>;
		};

		pvp_ispfunc_mem {
			compatible = "hisilicon,soc-peri-volt";
			perivolt-poll-id = <0x7e>;
			perivolt-poll-channel = <0x03>;
			perivolt-type = <0x01>;
			perivolt-poll-record = <0x00 0x354 0x30>;
			perivolt-output-names = "pvp_ispfunc_mem";
			phandle = <0x620>;
		};

		pvp_avenc_mem {
			compatible = "hisilicon,soc-peri-volt";
			perivolt-poll-id = <0x8b>;
			perivolt-poll-channel = <0x02>;
			perivolt-type = <0x01>;
			perivolt-poll-record = <0x00 0x354 0x300>;
			perivolt-output-names = "pvp_avenc_mem";
			phandle = <0x621>;
		};

		pvp_ispjpg_mem {
			compatible = "hisilicon,soc-peri-volt";
			perivolt-poll-id = <0x88>;
			perivolt-poll-channel = <0x04>;
			perivolt-type = <0x01>;
			perivolt-poll-record = <0x00 0x354 0xc000>;
			perivolt-output-names = "pvp_ispjpg_mem";
			phandle = <0x622>;
		};

		pvp_ispcpu_mem {
			compatible = "hisilicon,soc-peri-volt";
			perivolt-poll-id = <0x7d>;
			perivolt-poll-channel = <0x07>;
			perivolt-type = <0x01>;
			perivolt-poll-record = <0x00 0x354 0x3000>;
			perivolt-output-names = "pvp_ispcpu_mem";
			phandle = <0x623>;
		};
	};

	hisi_pll@0xFFB85000 {
		compatible = "hisilicon,pll_unlock_intr";
		reg = <0x00 0xffb85000 0x00 0x1000>;
		interrupts = <0x00 0x173 0x04>;
		pll_unlock_detect_intr_clear = <0x918>;
		pll_unlock_detect_intr_en_bit = <0x03>;
		pll_unlock_detect_intr_clr_bit = <0x01>;
		pll_unlock_detect_intr_bypass_acpu = <0x91c>;
		pll_unlock_detect_intr_stat = <0x928>;
		pll_unlock_detect_intr_val = <0xcef7f>;
		pll_unlock_detect_base_id = <0x02>;
		pll_unlock_detect_status = <0x01>;
		phandle = <0x624>;
	};

	isp@e9300000 {
		compatible = "hisilicon,isp";
		status = "ok";
		reg-num = <0x0d>;
		reg = <0x00 0xffb85000 0x00 0x1000 0x00 0xe9800000 0x00 0x200000 0x00 0xffb81000 0x00 0x1000 0x00 0xff7cc000 0x00 0x1000 0x00 0xfb21b000 0x00 0x1000 0x00 0xff504000 0x00 0x1000 0x00 0xfc000000 0x00 0x2000 0x00 0xe9bd3000 0x00 0x1000 0x00 0xe9bd0000 0x00 0x1000 0x00 0xe93f0000 0x00 0x1000 0x00 0xfb214000 0x00 0x1000 0x00 0xe5e08000 0x00 0x1000 0x00 0xff7c8000 0x00 0x1000>;
		interrupts = <0x00 0xbf 0x04>;
		usedvfs = <0x01>;
		isppd-adb-flag = <0x00>;
		isp-wdt-flag = <0x00>;
		ispsmmu-init-byap = <0x00>;
		isp-mdc-flag = <0x01>;
		isp-efuse-flag = <0x00>;
		use-ion-smmuerr = <0x01>;
		use-ca-ta = <0x01>;
		use-smmuv3-flag = <0x01>;
		logb-flag = <0x00>;
		use-buck13-flag = <0x01>;
		isp-usepcie-flag = <0x00>;
		qos-sec-flag = <0x01>;
		use-sec-encrypt = <0x01>;
		isp-dynboot-flag = <0x00>;
		isp-names = "ISPCPU";
		firmware-names = "isp_fw.elf";
		mailbox-names = "isp_mailbox";
		isp-remap-addr = <0x00>;
		isp-ipc-addr = <0x1e00000>;
		pwronisp-nice = <0x0a>;
		isp_local_timer = <0x124f800>;
		isp-clockdep-supply = <0x109>;
		isp-core-supply = <0x10a>;
		isp-smmu-tcu-supply = <0xfa>;
		clock-num = <0x05>;
		clocks = <0x10b 0x10c 0x10d 0x10e 0x10f>;
		clock-names = "ispcpu", "ispfunc", "ispi2c", "isp_i3c", "isp_sys";
		clock-value = <0x55d4a800 0x2aea5400 0x6acfc00 0xa037a00 0x00>;
		clock-value-low = <0x55d4a800 0x21426780 0x6acfc00 0xa037a00 0x00>;
		clkdn-normal = <0x55d4a800 0x21426780 0x6acfc00 0xa037a00 0x00>;
		clkdn-highsvs = <0x55d4a800 0x18ea2c80 0x6acfc00 0xa037a00 0x00>;
		clkdn-svs = <0x55d4a800 0x13f7b1c0 0x6acfc00 0xa037a00 0x00>;
		clkdis-need-div = <0x15752a00 0x00 0x00 0x00 0x00>;
		clkdis-dvfs = <0x6422c40 0x6422c40 0x124f800 0x6422c40 0x00>;
		share-smem-size = <0x30000>;
		rsctable-mem-offet = <0x5000>;
		rsctable-mem-size = <0x1000>;
		trusted-smem-num = <0x03>;
		trusted-smem-offset = <0x00 0x800 0x1000>;
		isp-iova-start = <0x10000000>;
		isp-iova-size = <0xb0000000>;
		mapping-num = <0x0a>;
		mapping-items = <0x05>;
		ispcpu-text = <0x00 0xa00000 0x600000 0x301 0x00>;
		ispcpu-data = <0x01 0x1000000 0x800000 0x103 0x00>;
		ispcpu-sec-pool = <0x02 0x10000000 0x00 0x103 0x00>;
		ispcpu-ispsec-pool = <0x03 0x8000000 0x00 0x103 0x00>;
		ispcpu-dynamic-pool = <0x04 0x4000000 0x00 0x03 0x01>;
		ispcpu-rdr = <0x05 0x1f00000 0x40000 0x03 0x01>;
		ispcpu-shrd = <0x06 0x1e46000 0x1000 0x03 0x01>;
		ispcpu-vq = <0x07 0x1e00000 0x40000 0x03 0x01>;
		ispcpu-vr0 = <0x08 0x1e40000 0x3000 0x03 0x01>;
		ispcpu-vr1 = <0x09 0x1e43000 0x3000 0x03 0x01>;
		ignore-sec-text-size = <0x01>;
		phy-csi-num = <0x06 0x07>;
		pwstat-num = <0x02>;
		pwstat-type = <0x0c 0x0c>;
		pwstat-offset = <0x404 0x404>;
		pwstat-bit = <0x0a 0x08>;
		pwstat-wanted = <0x01 0x01>;
		iommus = <0xf6 0x02 0x00>;
		tlb_flush = <0x01>;
		phandle = <0x625>;

		iova_info {
			start-addr = <0x00 0xc0000000>;
			size = <0x00 0x20000000>;
			iova-align = <0x00 0x200000>;
		};
	};

	ispcore {
		compatible = "hisilicon,isp-core";
		status = "ok";
		iommus = <0xf6 0x03 0x00>;
		tlb_flush = <0x01>;

		iova_info {
			start-addr = <0x00 0x100000>;
			size = <0x01 0x00>;
			iova-align = <0x00 0x8000>;
		};
	};

	ispcma {
		compatible = "hisilicon,isp-cma";
		status = "ok";
		phandle = <0x626>;
	};

	isp_fastboot_cma {
		compatible = "hisilicon,isp-fastboot-cma";
		memory-region = <0x110>;
		status = "ok";
		phandle = <0x627>;
	};

	hipp@E8000000 {
		compatible = "hisilicon,ipp";
		status = "ok";
		reg-num = <0x09>;
		reg = <0x00 0xe8c04000 0x00 0x1000 0x00 0xe8c05000 0x00 0x1000 0x00 0xe8c06000 0x00 0x2000 0x00 0xe8c08000 0x00 0x2000 0x00 0xe8c0a000 0x00 0x2000 0x00 0xe8c0c000 0x00 0x2000 0x00 0xe8c0e000 0x00 0x1000 0x00 0xe8c10000 0x00 0x1000 0x00 0xe8c14000 0x00 0x4000>;
		irq-num = <0x01>;
		interrupts = <0x00 0xa8 0x04>;
		ipp-pcie-flag = <0x00>;
		sid-num = <0x08>;
		ssid-num = <0x01>;
		iommus = <0x111 0x08 0x01>;
		phandle = <0x628>;

		iova_info {
			start-addr = <0x00 0x800000>;
			size = <0x00 0xbf800000>;
			iova-align = <0x00 0x200000>;
		};
	};

	ipp-com@E8000000 {
		compatible = "hisilicon,ippcom";
		drv-num = <0x03>;
		drv-names = "ipp", "jpeg-encoder", "jpeg-decoder";
		status = "ok";
		ipp-media1-supply = <0x112>;
		ipp-cpe-supply = <0x113>;
		ipp-smmu-tcu-supply = <0x114>;
		clock-num = <0x01>;
		clocks = <0x115>;
		clock-names = "clk_jpg_func";
		clock-value = <0x265366c0>;
		clock-value-normal = <0x1c9c3800>;
		clock-value-hsvs = <0x18ea2c80>;
		clock-value-svs = <0x13f7b1c0>;
		clock-value-off = <0x6422c40>;
		phandle = <0x629>;
	};

	regulator_ip@FFB85000 {
		#address-cells = <0x01>;
		#size-cells = <0x00>;
		compatible = "hisilicon,regulator_ip_atf_core";
		reg = <0x00 0xe8d01000 0x00 0x1000>;
		phandle = <0x62a>;

		ip@0 {
			compatible = "ip-regulator-atf";
			reg = <0x00>;
			regulator-name = "media1_subsys";
			regulator-id = <0x00>;
			regulator-type = <0x01>;
			regulator-clk-num = <0x00>;
			regulator-clk-check-flag = <0x00>;
			need-to-enable-clock = <0x00>;
			clock-rate-set-flag = <0x00>;
			clock-rate-set = <0x00>;
			ppll0-clock-rate-set-flag = <0x00>;
			ppll0-clock-rate-set = <0x00>;
			need-to-autofreqdump = <0x00>;
			regulator-is-fake = <0x00>;
			phandle = <0x112>;
		};

		ip@1 {
			compatible = "ip-regulator-atf";
			reg = <0x01>;
			regulator-name = "media2_subsys";
			regulator-id = <0x01>;
			regulator-type = <0x01>;
			regulator-clk-num = <0x00>;
			regulator-clk-check-flag = <0x00>;
			need-to-enable-clock = <0x00>;
			clock-rate-set-flag = <0x00>;
			clock-rate-set = <0x00>;
			ppll0-clock-rate-set-flag = <0x00>;
			ppll0-clock-rate-set = <0x00>;
			need-to-autofreqdump = <0x00>;
			regulator-is-fake = <0x00>;
			phandle = <0xf7>;
		};

		ip@2 {
			compatible = "ip-regulator-atf";
			reg = <0x02>;
			regulator-name = "vivobus";
			regulator-id = <0x02>;
			regulator-type = <0x01>;
			vivobus-supply = <0x112>;
			supply_name = "vivobus";
			clocks = <0x116>;
			clock-names = "clk_vivobus";
			regulator-clk-num = <0x01>;
			regulator-clk-check-flag = <0x00>;
			need-to-enable-clock = <0x00>;
			clock-rate-set-flag = <0x00>;
			clock-rate-set = <0x00>;
			ppll0-clock-rate-set-flag = <0x00>;
			ppll0-clock-rate-set = <0x00>;
			need-to-autofreqdump = <0x01>;
			regulator-is-fake = <0x00>;
			phandle = <0x118>;
		};

		ip@3 {
			compatible = "ip-regulator-atf";
			reg = <0x03>;
			regulator-name = "vcodecsubsys";
			regulator-id = <0x03>;
			vcodecsubsys-supply = <0xf7>;
			supply_name = "vcodecsubsys";
			regulator-type = <0x01>;
			regulator-clk-num = <0x01>;
			clocks = <0x117>;
			clock-names = "clk_vcodecbus";
			regulator-clk-check-flag = <0x00>;
			need-to-enable-clock = <0x00>;
			clock-rate-set-flag = <0x00>;
			clock-rate-set = <0x00>;
			ppll0-clock-rate-set-flag = <0x00>;
			ppll0-clock-rate-set = <0x00>;
			need-to-autofreqdump = <0x01>;
			regulator-is-fake = <0x00>;
			phandle = <0xf8>;
		};

		ip@4 {
			compatible = "ip-regulator-atf";
			reg = <0x04>;
			regulator-name = "dsssubsys";
			regulator-id = <0x04>;
			dsssubsys-supply = <0x118>;
			supply_name = "dsssubsys";
			regulator-type = <0x01>;
			clocks = <0x119>;
			clock-names = "clk_edc0";
			regulator-clk-num = <0x01>;
			regulator-clk-check-flag = <0x00>;
			need-to-enable-clock = <0x00>;
			clock-rate-set-flag = <0x00>;
			clock-rate-set = <0x5d75c80>;
			ppll0-clock-rate-set-flag = <0x00>;
			ppll0-clock-rate-set = <0x00>;
			need-to-autofreqdump = <0x01>;
			regulator-is-fake = <0x00>;
			regulator-dss-boot-check = <0x38 0x0f>;
			need-to-hwlock = <0x1d 0x438>;
			phandle = <0x177>;
		};

		ip@5 {
			compatible = "ip-regulator-atf";
			reg = <0x05>;
			regulator-name = "disp_ch1subsys";
			regulator-id = <0x05>;
			disp_ch1subsys-supply = <0x118>;
			supply_name = "disp_ch1subsys";
			regulator-type = <0x01>;
			regulator-clk-num = <0x00>;
			regulator-clk-check-flag = <0x00>;
			need-to-enable-clock = <0x00>;
			clock-rate-set-flag = <0x00>;
			clock-rate-set = <0x00>;
			ppll0-clock-rate-set-flag = <0x00>;
			ppll0-clock-rate-set = <0x00>;
			need-to-autofreqdump = <0x00>;
			regulator-is-fake = <0x01>;
			phandle = <0x176>;
		};

		ip@6 {
			compatible = "ip-regulator-atf";
			reg = <0x06>;
			regulator-name = "ipp";
			regulator-id = <0x06>;
			ipp-supply = <0x118>;
			supply_name = "ipp";
			regulator-type = <0x01>;
			regulator-clk-num = <0x00>;
			regulator-clk-check-flag = <0x00>;
			need-to-enable-clock = <0x00>;
			clock-rate-set-flag = <0x00>;
			clock-rate-set = <0x00>;
			ppll0-clock-rate-set-flag = <0x00>;
			ppll0-clock-rate-set = <0x00>;
			need-to-autofreqdump = <0x00>;
			regulator-is-fake = <0x00>;
			phandle = <0x113>;
		};

		ip@7 {
			status = "ok";
			compatible = "ip-regulator-atf";
			reg = <0x07>;
			regulator-name = "vdec";
			regulator-id = <0x07>;
			vdec-supply = <0x118>;
			supply_name = "vdec";
			regulator-type = <0x01>;
			regulator-clk-num = <0x00>;
			regulator-clk-check-flag = <0x00>;
			need-to-enable-clock = <0x00>;
			clock-rate-set-flag = <0x00>;
			clock-rate-set = <0x00>;
			ppll0-clock-rate-set-flag = <0x00>;
			ppll0-clock-rate-set = <0x00>;
			need-to-autofreqdump = <0x01>;
			regulator-is-fake = <0x00>;
			phandle = <0x186>;
		};

		ip@8 {
			compatible = "ip-regulator-atf";
			reg = <0x08>;
			regulator-name = "ispsubsys";
			regulator-id = <0x08>;
			ispsubsys-supply = <0xf8>;
			supply_name = "ispsubsys";
			regulator-type = <0x01>;
			clocks = <0x11a>;
			clock-names = "aclk_isp";
			regulator-clk-num = <0x00>;
			regulator-clk-check-flag = <0x00>;
			need-to-enable-clock = <0x00>;
			clock-rate-set-flag = <0x00>;
			clock-rate-set = <0x00>;
			ppll0-clock-rate-set-flag = <0x00>;
			ppll0-clock-rate-set = <0x00>;
			need-to-autofreqdump = <0x00>;
			regulator-is-fake = <0x00>;
			phandle = <0x109>;
		};

		ip@9 {
			compatible = "ip-regulator-atf";
			reg = <0x09>;
			regulator-name = "isp_r8";
			regulator-id = <0x09>;
			isp_r8-supply = <0x109>;
			supply_name = "isp_r8";
			regulator-type = <0x01>;
			regulator-clk-num = <0x00>;
			regulator-clk-check-flag = <0x00>;
			need-to-enable-clock = <0x00>;
			clock-rate-set-flag = <0x00>;
			clock-rate-set = <0x00>;
			ppll0-clock-rate-set-flag = <0x00>;
			ppll0-clock-rate-set = <0x00>;
			need-to-autofreqdump = <0x00>;
			regulator-is-fake = <0x00>;
			phandle = <0x10a>;
		};

		ip@10 {
			compatible = "ip-regulator-atf";
			reg = <0x10>;
			regulator-name = "vencaclk";
			regulator-id = <0x0a>;
			vencaclk-supply = <0xf8>;
			supply_name = "vencaclk";
			regulator-type = <0x01>;
			regulator-clk-num = <0x00>;
			regulator-clk-check-flag = <0x00>;
			need-to-enable-clock = <0x00>;
			clock-rate-set-flag = <0x00>;
			clock-rate-set = <0x00>;
			ppll0-clock-rate-set-flag = <0x00>;
			ppll0-clock-rate-set = <0x00>;
			need-to-autofreqdump = <0x01>;
			regulator-is-fake = <0x00>;
			phandle = <0x11b>;
		};

		ip@11 {
			status = "ok";
			compatible = "ip-regulator-atf";
			reg = <0x11>;
			regulator-name = "venc";
			regulator-id = <0x0b>;
			venc-supply = <0x11b>;
			supply_name = "venc";
			regulator-type = <0x01>;
			clocks = <0x11c>;
			regulator-clk-num = <0x00>;
			regulator-clk-check-flag = <0x00>;
			need-to-enable-clock = <0x00>;
			clock-rate-set-flag = <0x00>;
			ppll0-clock-rate-set-flag = <0x00>;
			ppll0-clock-rate-set = <0x00>;
			need-to-autofreqdump = <0x01>;
			regulator-is-fake = <0x00>;
			phandle = <0x189>;
		};

		ip@12 {
			compatible = "ip-regulator-atf";
			reg = <0x12>;
			regulator-name = "asp";
			regulator-id = <0x0c>;
			regulator-type = <0x01>;
			regulator-clk-num = <0x00>;
			regulator-clk-check-flag = <0x00>;
			need-to-enable-clock = <0x00>;
			clock-rate-set-flag = <0x00>;
			clock-rate-set = <0x00>;
			ppll0-clock-rate-set-flag = <0x00>;
			ppll0-clock-rate-set = <0x00>;
			need-to-autofreqdump = <0x00>;
			regulator-is-fake = <0x00>;
			phandle = <0x02>;
		};

		ip@13 {
			compatible = "ip-regulator-atf";
			reg = <0x13>;
			regulator-name = "g3d";
			regulator-id = <0x0d>;
			regulator-type = <0x01>;
			regulator-clk-num = <0x00>;
			regulator-clk-check-flag = <0x00>;
			need-to-enable-clock = <0x00>;
			clock-rate-set-flag = <0x00>;
			clock-rate-set = <0x00>;
			ppll0-clock-rate-set-flag = <0x00>;
			ppll0-clock-rate-set = <0x00>;
			need-to-autofreqdump = <0x00>;
			regulator-is-fake = <0x00>;
			phandle = <0x182>;
		};

		ip@14 {
			compatible = "ip-regulator-atf";
			reg = <0x14>;
			regulator-name = "vivobus_autodiv";
			regulator-id = <0x0e>;
			regulator-type = <0x01>;
			regulator-clk-num = <0x00>;
			regulator-clk-check-flag = <0x00>;
			need-to-enable-clock = <0x00>;
			clock-rate-set-flag = <0x00>;
			clock-rate-set = <0x00>;
			ppll0-clock-rate-set-flag = <0x00>;
			ppll0-clock-rate-set = <0x00>;
			need-to-autofreqdump = <0x00>;
			regulator-is-fake = <0x00>;
			phandle = <0x178>;
		};

		ip@15 {
			compatible = "ip-regulator-lpm";
			reg = <0x15>;
			regulator-name = "mmbuf";
			ip_to_lpm_enable_step = <0xc0001 0x09>;
			ip_to_lpm_disable_step = <0xc0101 0x09>;
			regulator-id = <0x0f>;
			regulator-type = <0x01>;
			regulator-is-fake = <0x01>;
			phandle = <0x62b>;
		};

		ip@16 {
			compatible = "ip-regulator-atf";
			reg = <0x16>;
			regulator-name = "fp_csi_fake";
			regulator-id = <0x10>;
			fp_csi_fake-supply = <0x118>;
			supply_name = "fp_csi_fake";
			regulator-type = <0x01>;
			regulator-clk-num = <0x00>;
			regulator-clk-check-flag = <0x00>;
			need-to-enable-clock = <0x00>;
			clock-rate-set-flag = <0x00>;
			clock-rate-set = <0x00>;
			ppll0-clock-rate-set-flag = <0x00>;
			ppll0-clock-rate-set = <0x00>;
			need-to-autofreqdump = <0x00>;
			regulator-is-fake = <0x01>;
			phandle = <0x62c>;
		};

		ip@17 {
			compatible = "ip-regulator-atf";
			reg = <0x17>;
			regulator-name = "dss_fake";
			regulator-id = <0x11>;
			dss_fake-supply = <0x112>;
			supply_name = "dss_fake";
			regulator-type = <0x01>;
			regulator-clk-num = <0x00>;
			regulator-clk-check-flag = <0x00>;
			need-to-enable-clock = <0x00>;
			clock-rate-set-flag = <0x00>;
			clock-rate-set = <0x00>;
			ppll0-clock-rate-set-flag = <0x00>;
			ppll0-clock-rate-set = <0x00>;
			need-to-autofreqdump = <0x00>;
			regulator-is-fake = <0x01>;
			phandle = <0x62d>;
		};

		ip@18 {
			compatible = "ip-regulator-atf";
			reg = <0x18>;
			regulator-name = "isp_fake";
			regulator-id = <0x12>;
			isp_fake-supply = <0xf7>;
			supply_name = "isp_fake";
			regulator-type = <0x01>;
			regulator-clk-num = <0x00>;
			regulator-clk-check-flag = <0x00>;
			need-to-enable-clock = <0x00>;
			clock-rate-set-flag = <0x00>;
			clock-rate-set = <0x00>;
			ppll0-clock-rate-set-flag = <0x00>;
			ppll0-clock-rate-set = <0x00>;
			need-to-autofreqdump = <0x00>;
			regulator-is-fake = <0x01>;
			phandle = <0x62e>;
		};

		ip@19 {
			compatible = "ip-regulator-atf";
			reg = <0x19>;
			regulator-name = "vdec_fake";
			regulator-id = <0x13>;
			vdec_fake-supply = <0x112>;
			supply_name = "vdec_fake";
			regulator-type = <0x01>;
			regulator-clk-num = <0x00>;
			regulator-clk-check-flag = <0x00>;
			need-to-enable-clock = <0x00>;
			clock-rate-set-flag = <0x00>;
			clock-rate-set = <0x00>;
			ppll0-clock-rate-set-flag = <0x00>;
			ppll0-clock-rate-set = <0x00>;
			need-to-autofreqdump = <0x00>;
			regulator-is-fake = <0x01>;
			phandle = <0x187>;
		};

		ip@20 {
			compatible = "ip-regulator-atf";
			reg = <0x20>;
			regulator-name = "venc_fake";
			regulator-id = <0x14>;
			venc_fake-supply = <0xf7>;
			supply_name = "venc_fake";
			regulator-type = <0x01>;
			regulator-clk-num = <0x00>;
			regulator-clk-check-flag = <0x00>;
			need-to-enable-clock = <0x00>;
			clock-rate-set-flag = <0x00>;
			clock-rate-set = <0x00>;
			ppll0-clock-rate-set-flag = <0x00>;
			ppll0-clock-rate-set = <0x00>;
			need-to-autofreqdump = <0x00>;
			regulator-is-fake = <0x01>;
			phandle = <0x18a>;
		};

		ip@21 {
			compatible = "ip-regulator-atf";
			reg = <0x21>;
			regulator-name = "ipp_fake";
			regulator-id = <0x15>;
			ipp_fake-supply = <0x112>;
			supply_name = "ipp_fake";
			regulator-type = <0x01>;
			regulator-clk-num = <0x00>;
			regulator-clk-check-flag = <0x00>;
			need-to-enable-clock = <0x00>;
			clock-rate-set-flag = <0x00>;
			clock-rate-set = <0x00>;
			ppll0-clock-rate-set-flag = <0x00>;
			ppll0-clock-rate-set = <0x00>;
			need-to-autofreqdump = <0x00>;
			regulator-is-fake = <0x01>;
			phandle = <0x62f>;
		};

		ip@22 {
			compatible = "ip-regulator-atf";
			reg = <0x22>;
			regulator-name = "smmu_media1_ip";
			regulator-id = <0x16>;
			smmu_media1_ip-supply = <0x118>;
			supply_name = "smmu_media1_ip";
			regulator-type = <0x01>;
			regulator-clk-num = <0x00>;
			regulator-clk-check-flag = <0x00>;
			need-to-enable-clock = <0x00>;
			clock-rate-set-flag = <0x00>;
			clock-rate-set = <0x00>;
			ppll0-clock-rate-set-flag = <0x00>;
			ppll0-clock-rate-set = <0x00>;
			need-to-autofreqdump = <0x00>;
			regulator-is-fake = <0x01>;
			phandle = <0x114>;
		};

		ip@23 {
			compatible = "ip-regulator-atf";
			reg = <0x23>;
			regulator-name = "smmu_media2_ip";
			regulator-id = <0x17>;
			smmu_media2_ip-supply = <0xf8>;
			supply_name = "smmu_media2_ip";
			regulator-type = <0x01>;
			regulator-clk-num = <0x00>;
			regulator-clk-check-flag = <0x00>;
			need-to-enable-clock = <0x00>;
			clock-rate-set-flag = <0x00>;
			clock-rate-set = <0x00>;
			ppll0-clock-rate-set-flag = <0x00>;
			ppll0-clock-rate-set = <0x00>;
			need-to-autofreqdump = <0x00>;
			regulator-is-fake = <0x01>;
			phandle = <0xfa>;
		};

		ip@24 {
			compatible = "ip-regulator-atf";
			reg = <0x24>;
			regulator-name = "fpga_fake";
			regulator-id = <0x18>;
			supply_name = "fpga_fake";
			regulator-type = <0x01>;
			regulator-clk-num = <0x00>;
			regulator-clk-check-flag = <0x00>;
			need-to-enable-clock = <0x00>;
			clock-rate-set-flag = <0x00>;
			clock-rate-set = <0x00>;
			ppll0-clock-rate-set-flag = <0x00>;
			ppll0-clock-rate-set = <0x00>;
			need-to-autofreqdump = <0x00>;
			regulator-is-fake = <0x01>;
			phandle = <0x630>;
		};

		ip@25 {
			compatible = "ip-regulator-atf";
			reg = <0x25>;
			regulator-name = "hiface";
			regulator-id = <0x19>;
			hiface-supply = <0xf8>;
			supply_name = "hiface";
			regulator-type = <0x01>;
			regulator-clk-num = <0x00>;
			regulator-clk-check-flag = <0x00>;
			need-to-enable-clock = <0x00>;
			clock-rate-set-flag = <0x00>;
			clock-rate-set = <0x00>;
			ppll0-clock-rate-set-flag = <0x00>;
			ppll0-clock-rate-set = <0x00>;
			need-to-autofreqdump = <0x00>;
			regulator-is-fake = <0x01>;
			phandle = <0x631>;
		};

		ip@26 {
			compatible = "ip-regulator-atf";
			reg = <0x26>;
			regulator-name = "arpp";
			regulator-id = <0x1a>;
			arpp-supply = <0xf8>;
			supply_name = "arpp";
			regulator-type = <0x01>;
			regulator-clk-num = <0x00>;
			regulator-clk-check-flag = <0x00>;
			need-to-enable-clock = <0x00>;
			clock-rate-set-flag = <0x00>;
			clock-rate-set = <0x00>;
			ppll0-clock-rate-set-flag = <0x00>;
			ppll0-clock-rate-set = <0x00>;
			need-to-autofreqdump = <0x00>;
			regulator-is-fake = <0x01>;
			phandle = <0xf9>;
		};

		ip@27 {
			compatible = "ip-regulator-atf";
			reg = <0x27>;
			regulator-name = "ivp";
			regulator-id = <0x1b>;
			ivp-supply = <0xf8>;
			supply_name = "ivp";
			regulator-type = <0x01>;
			clocks = <0x11d>;
			clock-names = "clk_ivpdsp_core";
			regulator-clk-num = <0x01>;
			regulator-clk-check-flag = <0x00>;
			need-to-enable-clock = <0x00>;
			clock-rate-set-flag = <0x01>;
			clock-rate-set = <0x459e440>;
			ppll0-clock-rate-set-flag = <0x00>;
			ppll0-clock-rate-set = <0x00>;
			need-to-autofreqdump = <0x01>;
			regulator-is-fake = <0x01>;
			phandle = <0x632>;
		};

		ip@28 {
			compatible = "ip-regulator-atf";
			reg = <0x28>;
			regulator-name = "ivp1";
			regulator-id = <0x1c>;
			ivp1-supply = <0xf8>;
			supply_name = "ivp1";
			regulator-type = <0x01>;
			clocks = <0x11e>;
			clock-names = "clk_ivp1dsp_core";
			regulator-clk-num = <0x01>;
			regulator-clk-check-flag = <0x00>;
			need-to-enable-clock = <0x00>;
			clock-rate-set-flag = <0x01>;
			clock-rate-set = <0x459e440>;
			ppll0-clock-rate-set-flag = <0x00>;
			ppll0-clock-rate-set = <0x00>;
			need-to-autofreqdump = <0x01>;
			regulator-is-fake = <0x01>;
			phandle = <0x633>;
		};
	};

	smmuv3_media1@e8d03000 {
		compatible = "mm,smmu-v3";
		#iommu-cells = <0x02>;
		reg = <0x00 0xe8d03000 0x00 0x60000>;
		interrupts = <0x00 0xb1 0x04>;
		smmu_tcu-supply = <0x114>;
		interrupt-names = "combined";
		smmu-idr0 = <0x142480a>;
		smmu-idr1 = <0xd290186>;
		smmu-idr5 = <0x12>;
		smmu-crg = <0xe8d01000>;
		smmuid = <0x00>;
		tcu_cache = <0x01 0x01>;
		tcu_pw_reg = <0x30000 0x30004>;
		tcu_clk_req = <0x01 0x10>;
		tcu_pw_cfg = <0xffffffff 0xffffffff>;
		media-crg = <0xff7c9000>;
		tbu_name = "lpp_tbu", "dss1_tbu", "dss2_tbu", "vdec_tbu";
		tbu_base = <0xe8c60000 0xe8802000 0xe8806000 0xe8dd8000>;
		mm,broken-prefetch-cmd;
		phandle = <0x111>;
	};

	smmuv3_media2@e9380000 {
		compatible = "mm,smmu-v3";
		#iommu-cells = <0x02>;
		reg = <0x00 0xe9380000 0x00 0x60000>;
		interrupts = <0x00 0xc8 0x04>;
		interrupt-names = "combined";
		smmu_tcu-supply = <0xfa>;
		smmu-idr0 = <0x142480a>;
		smmu-idr1 = <0xd290186>;
		smmu-idr5 = <0x12>;
		smmu-crg = <0xe93f0000>;
		smmuid = <0x01>;
		tcu_cache = <0x01 0x01>;
		tcu_pw_reg = <0x30000 0x30004>;
		tcu_clk_req = <0x01 0x10>;
		tcu_pw_cfg = <0xffffffff 0xffffffff>;
		mm,broken-prefetch-cmd;
		phandle = <0xf6>;
	};

	smmu_media1_ex1@f9d03000 {
		reg = <0x00 0xf9d03000 0x00 0x60000>;
		phandle = <0x634>;
	};

	smmu_media2_ex1@f9380000 {
		reg = <0x00 0xf9380000 0x00 0x60000>;
		phandle = <0x635>;
	};

	smmuv3_davici@e5fc0000 {
		compatible = "mm,smmu-v3";
		#iommu-cells = <0x02>;
		reg = <0x00 0xe5fc0000 0x00 0x40000>;
		interrupts = <0x00 0xe8 0x04>;
		interrupt-names = "combined";
		smmu-idr0 = <0x142480a>;
		smmu-idr1 = <0xd290186>;
		smmu-idr5 = <0x12>;
		smmuid = <0x02>;
		tcu_cache = <0x01 0x01>;
		tcu_pw_reg = <0x30000 0x30004>;
		tcu_clk_req = <0x01 0x10>;
		tcu_pw_cfg = <0xffffffff 0xffffffff>;
		mm,broken-prefetch-cmd;
		phandle = <0x190>;
	};

	smmuv3_hsdt0@ee200000 {
		compatible = "mm,smmu-v3";
		#iommu-cells = <0x02>;
		reg = <0x00 0xee200000 0x00 0x60000>;
		interrupts = <0x00 0x74 0x04>;
		interrupt-names = "combined";
		smmu-idr0 = <0x142480a>;
		smmu-idr1 = <0xd290186>;
		smmu-idr5 = <0x12>;
		smmuid = <0x03>;
		tcu_cache = <0x01 0x00>;
		tcu_pw_reg = <0x30000 0x30004>;
		tcu_clk_req = <0x01 0x10>;
		tcu_pw_cfg = <0xffffffff 0xffffffff>;
		mm,broken-prefetch-cmd;
		phandle = <0x636>;
	};

	memory@1 {
		device_type = "memory";
		reg = <0x00 0x800000 0x00 0xbffa0000>;
		numa-node-id = <0x01>;
	};

	spmi@0xFB210000 {
		compatible = "hisilicon,spmi-controller";
		#address-cells = <0x01>;
		#size-cells = <0x00>;
		status = "ok";
		reg = <0x00 0xfb210000 0x00 0x1000>;
		spmi-channel = <0x02>;
		spmi-nr = <0x00>;
		phandle = <0x637>;

		pmic3@3 {
			#address-cells = <0x01>;
			#size-cells = <0x00>;
			compatible = "common-pmic-spmi";
			reg = <0x02>;
			slave_id = <0x0c>;
			pmic_fpga_flag = <0x01>;
			status = "ok";
			spmi-slave-container;
			phandle = <0x638>;

			hi6563v300_buck0@1F {
				compatible = "pmic-ldo";
				reg = <0x1f>;
				regulator-name = "hi6563v300_buck0";
				regulator-min-microvolt = <0x41eb0>;
				regulator-max-microvolt = <0x15f900>;
				pmic-ctrl = <0x1f 0x01>;
				pmic-vset = <0x1e 0xff>;
				pmic-n-voltages = <0xeb>;
				pmic-vset-table = <0x41eb0 0x43238 0x445c0 0x45948 0x46cd0 0x48058 0x493e0 0x4a768 0x4baf0 0x4ce78 0x4e200 0x4f588 0x50910 0x51c98 0x53020 0x543a8 0x55730 0x56ab8 0x57e40 0x591c8 0x5a550 0x5b8d8 0x5cc60 0x5dfe8 0x5f370 0x606f8 0x61a80 0x62e08 0x64190 0x65518 0x668a0 0x67c28 0x68fb0 0x6a338 0x6b6c0 0x6ca48 0x6ddd0 0x6f158 0x704e0 0x71868 0x72bf0 0x73f78 0x75300 0x76688 0x77a10 0x78d98 0x7a120 0x7b4a8 0x7c830 0x7dbb8 0x7ef40 0x802c8 0x81650 0x829d8 0x83d60 0x850e8 0x86470 0x877f8 0x88b80 0x89f08 0x8b290 0x8c618 0x8d9a0 0x8ed28 0x900b0 0x91438 0x927c0 0x93b48 0x94ed0 0x96258 0x975e0 0x98968 0x99cf0 0x9b078 0x9c400 0x9d788 0x9eb10 0x9fe98 0xa1220 0xa25a8 0xa3930 0xa4cb8 0xa6040 0xa73c8 0xa8750 0xa9ad8 0xaae60 0xac1e8 0xad570 0xae8f8 0xafc80 0xb1008 0xb2390 0xb3718 0xb4aa0 0xb5e28 0xb71b0 0xb8538 0xb98c0 0xbac48 0xbbfd0 0xbd358 0xbe6e0 0xbfa68 0xc0df0 0xc2178 0xc3500 0xc4888 0xc5c10 0xc6f98 0xc8320 0xc96a8 0xcaa30 0xcbdb8 0xcd140 0xce4c8 0xcf850 0xd0bd8 0xd1f60 0xd32e8 0xd4670 0xd59f8 0xd6d80 0xd8108 0xd9490 0xda818 0xdbba0 0xdcf28 0xde2b0 0xdf638 0xe09c0 0xe1d48 0xe30d0 0xe4458 0xe57e0 0xe6b68 0xe7ef0 0xe9278 0xea600 0xeb988 0xecd10 0xee098 0xef420 0xf07a8 0xf1b30 0xf2eb8 0xf4240 0xf55c8 0xf6950 0xf7cd8 0xf9060 0xfa3e8 0xfb770 0xfcaf8 0xfde80 0xff208 0x100590 0x101918 0x102ca0 0x104028 0x1053b0 0x106738 0x107ac0 0x108e48 0x10a1d0 0x10b558 0x10c8e0 0x10dc68 0x10eff0 0x110378 0x111700 0x112a88 0x113e10 0x115198 0x116520 0x1178a8 0x118c30 0x119fb8 0x11b340 0x11c6c8 0x11da50 0x11edd8 0x120160 0x1214e8 0x122870 0x123bf8 0x124f80 0x126308 0x127690 0x128a18 0x129da0 0x12b128 0x12c4b0 0x12d838 0x12ebc0 0x12ff48 0x1312d0 0x132658 0x1339e0 0x134d68 0x1360f0 0x137478 0x138800 0x139b88 0x13af10 0x13c298 0x13d620 0x13e9a8 0x13fd30 0x1410b8 0x142440 0x1437c8 0x144b50 0x145ed8 0x147260 0x1485e8 0x149970 0x14acf8 0x14c080 0x14d408 0x14e790 0x14fb18 0x150ea0 0x152228 0x1535b0 0x154938 0x155cc0 0x157048 0x1583d0 0x159758 0x15aae0 0x15be68 0x15d1f0 0x15e578 0x15f900>;
				pmic-off-on-delay-us = <0x3e8>;
				pmic-enable-time-us = <0xf0>;
				pmic-valid-modes-mask = <0x00>;
				pmic-valid-idle-mask = <0x0d>;
				status = "disabled";
				phandle = <0x639>;
			};

			hi6563v300_ldo2@29 {
				compatible = "pmic-ldo";
				reg = <0x29>;
				regulator-name = "ldo2";
				regulator-min-microvolt = <0xe7ef0>;
				regulator-max-microvolt = <0x14689c>;
				pmic-ctrl = <0x29 0x01>;
				pmic-vset = <0x28 0x1f>;
				pmic-n-voltages = <0x20>;
				pmic-vset-table = <0xe7ef0 0xeafc4 0xee098 0xf116c 0xf4240 0xf7314 0xfa3e8 0xfd4bc 0x100590 0x103664 0x106738 0x10980c 0x10c8e0 0x10f9b4 0x112a88 0x115b5c 0x118c30 0x11bd04 0x11edd8 0x121eac 0x124f80 0x128054 0x12b128 0x12e1fc 0x1312d0 0x1343a4 0x137478 0x13a54c 0x13d620 0x1406f4 0x1437c8 0x14689c>;
				pmic-off-on-delay-us = <0x3e8>;
				pmic-enable-time-us = <0x00>;
				pmic-valid-modes-mask = <0x00>;
				pmic-valid-idle-mask = <0x0d>;
				status = "disabled";
				phandle = <0x63a>;
			};

			hi6563v300_ldo3@2B {
				compatible = "pmic-ldo";
				reg = <0x2b>;
				regulator-name = "ldo3";
				regulator-min-microvolt = <0x7a120>;
				regulator-max-microvolt = <0x113e10>;
				pmic-ctrl = <0x2b 0x01>;
				pmic-vset = <0x2a 0x3f>;
				pmic-n-voltages = <0x40>;
				pmic-vset-table = <0x7a120 0x7c830 0x7ef40 0x81650 0x83d60 0x86470 0x88b80 0x8b290 0x8d9a0 0x900b0 0x927c0 0x94ed0 0x975e0 0x99cf0 0x9c400 0x9eb10 0xa1220 0xa3930 0xa6040 0xa8750 0xaae60 0xad570 0xafc80 0xb2390 0xb4aa0 0xb71b0 0xb98c0 0xbbfd0 0xbe6e0 0xc0df0 0xc3500 0xc5c10 0xc8320 0xcaa30 0xcd140 0xcf850 0xd1f60 0xd4670 0xd6d80 0xd9490 0xdbba0 0xde2b0 0xe09c0 0xe30d0 0xe57e0 0xe7ef0 0xea600 0xecd10 0xef420 0xf1b30 0xf4240 0xf6950 0xf9060 0xfb770 0xfde80 0x100590 0x102ca0 0x1053b0 0x107ac0 0x10a1d0 0x10c8e0 0x10eff0 0x111700 0x113e10>;
				pmic-off-on-delay-us = <0x3e8>;
				pmic-enable-time-us = <0x00>;
				pmic-valid-modes-mask = <0x00>;
				pmic-valid-idle-mask = <0x0d>;
				status = "disabled";
				phandle = <0x63b>;
			};

			hi6563v300_ld06@31 {
				compatible = "pmic-ldo";
				reg = <0x31>;
				regulator-name = "ldo6";
				regulator-min-microvolt = <0x186a00>;
				regulator-max-microvolt = <0x1e53ac>;
				pmic-ctrl = <0x31 0x01>;
				pmic-vset = <0x30 0x1f>;
				pmic-n-voltages = <0x20>;
				pmic-vset-table = <0x186a00 0x189ad4 0x18cba8 0x18fc7c 0x192d50 0x195e24 0x198ef8 0x19bfcc 0x19f0a0 0x1a2174 0x1a5248 0x1a831c 0x1ab3f0 0x1ae4c4 0x1b1598 0x1b466c 0x1b7740 0x1ba814 0x1bd8e8 0x1c09bc 0x1c3a90 0x1c6b64 0x1c9c38 0x1ccd0c 0x1cfde0 0x1d2eb4 0x1d5f88 0x1d905c 0x1dc130 0x1df204 0x1e22d8 0x1e53ac>;
				pmic-off-on-delay-us = <0x3e8>;
				pmic-enable-time-us = <0x78>;
				pmic-valid-modes-mask = <0x00>;
				pmic-valid-idle-mask = <0x0d>;
				status = "disabled";
				phandle = <0x63c>;
			};

			hi6563v300_ldo7@33 {
				compatible = "pmic-ldo";
				reg = <0x33>;
				regulator-name = "ldo7";
				regulator-min-microvolt = <0x186a00>;
				regulator-max-microvolt = <0x1e53ac>;
				pmic-ctrl = <0x33 0x01>;
				pmic-vset = <0x32 0x1f>;
				pmic-n-voltages = <0x20>;
				pmic-vset-table = <0x186a00 0x189ad4 0x18cba8 0x18fc7c 0x192d50 0x195e24 0x198ef8 0x19bfcc 0x19f0a0 0x1a2174 0x1a5248 0x1a831c 0x1ab3f0 0x1ae4c4 0x1b1598 0x1b466c 0x1b7740 0x1ba814 0x1bd8e8 0x1c09bc 0x1c3a90 0x1c6b64 0x1c9c38 0x1ccd0c 0x1cfde0 0x1d2eb4 0x1d5f88 0x1d905c 0x1dc130 0x1df204 0x1e22d8 0x1e53ac>;
				pmic-off-on-delay-us = <0x3e8>;
				pmic-enable-time-us = <0x78>;
				pmic-valid-modes-mask = <0x00>;
				pmic-valid-idle-mask = <0x0d>;
				status = "disabled";
				phandle = <0x63d>;
			};
		};

		pmic1@1 {
			#address-cells = <0x01>;
			#size-cells = <0x00>;
			compatible = "sub-pmic-spmi";
			reg = <0x01>;
			slave_id = <0x04>;
			handle_irq;
			#interrupt-cells = <0x02>;
			interrupt-controller;
			gpios = <0x43 0x0e 0x00>;
			pinctrl-names = "default";
			pinctrl-0;
			pmic-irq-num = <0x20>;
			pmic-irq-array = <0x04>;
			pmic-irq-mask-addr = <0x3a0 0x3a8 0x3aa 0x3a9>;
			pmic-irq-addr = <0x3c0 0x3c8 0x3ca 0x3c9>;
			status = "ok";
			spmi-slave-container;
			phandle = <0x11f>;

			pmic_vibrator {
				haptics-cfg = <0x00 0x00 0x08 0x0f 0x10 0x00 0x18 0x0f 0x1f 0x00 0x26 0x0f 0x2d 0x00 0x32 0x0f 0x37 0x00 0x3b 0x0f 0x3d 0xc0 0x3f 0x0d 0x40 0x00 0x40 0x00 0x40 0x00 0x40 0x00 0x40 0x00 0x40 0x00 0x40 0x00 0x40 0x00 0x00 0x00 0x08 0x0f 0x10 0x00 0x18 0x0f 0x1f 0x00 0x26 0x0f 0x2d 0x00 0x32 0x0f 0x37 0x00 0x3b 0x0f 0x3d 0x00 0x3f 0x0f 0x40 0x00 0x40 0x0f 0x40 0xf0 0x40 0x07 0x40 0x00 0x40 0x00 0x40 0x00 0x40 0x00 0x00 0x00 0x08 0x0f 0x10 0x00 0x18 0x0f 0x1f 0x00 0x26 0x0f 0x2d 0x00 0x32 0x0f 0x37 0x00 0x3b 0x0f 0x3d 0x00 0x3f 0x0f 0x40 0x00 0x40 0x0f 0x40 0x00 0x40 0x0f 0x40 0x00 0x40 0x0f 0x40 0xf0 0x40 0x07 0x00 0x40 0x08 0x0b 0x10 0x40 0x18 0x0b 0x1f 0x40 0x26 0x0b 0x2d 0x40 0x32 0x0b 0x37 0x40 0x3b 0x0b 0x3d 0x50 0x3f 0x0a 0x40 0x00 0x40 0x00 0x40 0x00 0x40 0x00 0x40 0x00 0x40 0x00 0x40 0x00 0x40 0x00 0x00 0x80 0x08 0x07 0x10 0x80 0x18 0x07 0x1f 0x80 0x26 0x07 0x2d 0x80 0x32 0x07 0x37 0x80 0x3b 0x07 0x3d 0x40 0x3f 0x06 0x40 0x00 0x40 0x00 0x40 0x00 0x40 0x00 0x40 0x00 0x40 0x00 0x40 0x00 0x40 0x00>;
				vibrator-boost-power = <0x01>;
				vibrator-voltage = <0x578>;
				vibrator-reg-off = <0x1001>;
				vibrator-reg-on = <0x1000>;
				hisi_pmic_vibrator,label = "vibrator";
				hisi_pmic_vibrator,max-timeout-ms = <0x2710>;
				interrupt-names = "adc", "overvol", "undervol", "out", "ocp";
				interrupts = <0x14 0x00 0x13 0x00 0x12 0x00 0x11 0x00 0x10 0x00>;
				interrupt-parent = <0x11f>;
				compatible = "hisilicon,pmic-vibrator";
				status = "disabled";
			};

			pmicramp {
				compatible = "sub-pmic-ramp";
				interrupt-parent = <0x11f>;
				interrupts = <0x1e 0x00 0x1d 0x00 0x1c 0x00 0x1b 0x00 0x1a 0x00 0x19 0x00 0x18 0x00>;
				interrupt-names = "np_b00_ramp_abn", "np_b10_ramp_abn", "np_b20_ramp_abn", "np_b30_ramp_abn", "np_b12_ramp_abn", "np_b6_ramp_abn", "np_b7_ramp_abn";
				pmic-ramp-reset = <0x00 0x00 0x00 0x00 0x00 0x00 0x00>;
				pmic-ramp-event-reg-num = <0x01>;
				pmic-ramp-event-regs = <0x3e8>;
				status = "disabled";
			};

			subpmicdieid {
				compatible = "pmic-dieid";
				pmic-dieid-name = "Hi6423V200";
				pmic-dieid-reg-num = <0x14>;
				pmic-dieid-regs = <0xbe1 0xbe0 0xbdf 0xbde 0xbdd 0xbdc 0xbdb 0xbda 0xbd9 0xbd8 0xbd7 0xbd6 0xbd5 0xbd4 0xbd3 0xbd2 0xbd1 0xbd0 0xbcf 0xbce>;
			};

			pmic_gpio_01@162 {
				compatible = "pmic-ldo";
				reg = <0x162>;
				regulator-name = "pmic_gpio_01";
				regulator-min-microvolt = <0x1b7740>;
				regulator-max-microvolt = <0x2dc6c0>;
				pmic-ctrl = <0x162 0x01>;
				pmic-vset = <0x170 0x01>;
				pmic-n-voltages = <0x02>;
				pmic-vset-table = <0x1b7740 0x2d0370>;
				pmic-off-on-delay-us = <0x00>;
				pmic-enable-time-us = <0x00>;
				pmic-valid-modes-mask = <0x00>;
				pmic-valid-idle-mask = <0x00>;
				phandle = <0x63e>;
			};

			buck00@21 {
				compatible = "pmic-ldo";
				reg = <0x21>;
				regulator-name = "buck00";
				regulator-min-microvolt = <0x493e0>;
				regulator-max-microvolt = <0x15f900>;
				pmic-ctrl = <0x21 0x01>;
				pmic-vset = <0x40 0xff>;
				pmic-n-voltages = <0xe5>;
				pmic-vset-table = <0x493e0 0x4a768 0x4baf0 0x4ce78 0x4e200 0x4f588 0x50910 0x51c98 0x53020 0x543a8 0x55730 0x56ab8 0x57e40 0x591c8 0x5a550 0x5b8d8 0x5cc60 0x5dfe8 0x5f370 0x606f8 0x61a80 0x62e08 0x64190 0x65518 0x668a0 0x67c28 0x68fb0 0x6a338 0x6b6c0 0x6ca48 0x6ddd0 0x6f158 0x704e0 0x71868 0x72bf0 0x73f78 0x75300 0x76688 0x77a10 0x78d98 0x7a120 0x7b4a8 0x7c830 0x7dbb8 0x7ef40 0x802c8 0x81650 0x829d8 0x83d60 0x850e8 0x86470 0x877f8 0x88b80 0x89f08 0x8b290 0x8c618 0x8d9a0 0x8ed28 0x900b0 0x91438 0x927c0 0x93b48 0x94ed0 0x96258 0x975e0 0x98968 0x99cf0 0x9b078 0x9c400 0x9d788 0x9eb10 0x9fe98 0xa1220 0xa25a8 0xa3930 0xa4cb8 0xa6040 0xa73c8 0xa8750 0xa9ad8 0xaae60 0xac1e8 0xad570 0xae8f8 0xafc80 0xb1008 0xb2390 0xb3718 0xb4aa0 0xb5e28 0xb71b0 0xb8538 0xb98c0 0xbac48 0xbbfd0 0xbd358 0xbe6e0 0xbfa68 0xc0df0 0xc2178 0xc3500 0xc4888 0xc5c10 0xc6f98 0xc8320 0xc96a8 0xcaa30 0xcbdb8 0xcd140 0xce4c8 0xcf850 0xd0bd8 0xd1f60 0xd32e8 0xd4670 0xd59f8 0xd6d80 0xd8108 0xd9490 0xda818 0xdbba0 0xdcf28 0xde2b0 0xdf638 0xe09c0 0xe1d48 0xe30d0 0xe4458 0xe57e0 0xe6b68 0xe7ef0 0xe9278 0xea600 0xeb988 0xecd10 0xee098 0xef420 0xf07a8 0xf1b30 0xf2eb8 0xf4240 0xf55c8 0xf6950 0xf7cd8 0xf9060 0xfa3e8 0xfb770 0xfcaf8 0xfde80 0xff208 0x100590 0x101918 0x102ca0 0x104028 0x1053b0 0x106738 0x107ac0 0x108e48 0x10a1d0 0x10b558 0x10c8e0 0x10dc68 0x10eff0 0x110378 0x111700 0x112a88 0x113e10 0x115198 0x116520 0x1178a8 0x118c30 0x119fb8 0x11b340 0x11c6c8 0x11da50 0x11edd8 0x120160 0x1214e8 0x122870 0x123bf8 0x124f80 0x126308 0x127690 0x128a18 0x129da0 0x12b128 0x12c4b0 0x12d838 0x12ebc0 0x12ff48 0x1312d0 0x132658 0x1339e0 0x134d68 0x1360f0 0x137478 0x138800 0x139b88 0x13af10 0x13c298 0x13d620 0x13e9a8 0x13fd30 0x1410b8 0x142440 0x1437c8 0x144b50 0x145ed8 0x147260 0x1485e8 0x149970 0x14acf8 0x14c080 0x14d408 0x14e790 0x14fb18 0x150ea0 0x152228 0x1535b0 0x154938 0x155cc0 0x157048 0x1583d0 0x159758 0x15aae0 0x15be68 0x15d1f0 0x15e578 0x15f900>;
				pmic-off-on-delay-us = <0x3e8>;
				pmic-enable-time-us = <0xb4>;
				pmic-valid-modes-mask = <0x02>;
				pmic-valid-idle-mask = <0x0d>;
				status = "disabled";
				phandle = <0x63f>;
			};

			buck30@22 {
				compatible = "pmic-ldo";
				reg = <0x22>;
				regulator-name = "buck30";
				regulator-min-microvolt = <0x493e0>;
				regulator-max-microvolt = <0x15f900>;
				pmic-ctrl = <0x22 0x01>;
				pmic-vset = <0x42 0xff>;
				pmic-n-voltages = <0xe5>;
				pmic-vset-table = <0x493e0 0x4a768 0x4baf0 0x4ce78 0x4e200 0x4f588 0x50910 0x51c98 0x53020 0x543a8 0x55730 0x56ab8 0x57e40 0x591c8 0x5a550 0x5b8d8 0x5cc60 0x5dfe8 0x5f370 0x606f8 0x61a80 0x62e08 0x64190 0x65518 0x668a0 0x67c28 0x68fb0 0x6a338 0x6b6c0 0x6ca48 0x6ddd0 0x6f158 0x704e0 0x71868 0x72bf0 0x73f78 0x75300 0x76688 0x77a10 0x78d98 0x7a120 0x7b4a8 0x7c830 0x7dbb8 0x7ef40 0x802c8 0x81650 0x829d8 0x83d60 0x850e8 0x86470 0x877f8 0x88b80 0x89f08 0x8b290 0x8c618 0x8d9a0 0x8ed28 0x900b0 0x91438 0x927c0 0x93b48 0x94ed0 0x96258 0x975e0 0x98968 0x99cf0 0x9b078 0x9c400 0x9d788 0x9eb10 0x9fe98 0xa1220 0xa25a8 0xa3930 0xa4cb8 0xa6040 0xa73c8 0xa8750 0xa9ad8 0xaae60 0xac1e8 0xad570 0xae8f8 0xafc80 0xb1008 0xb2390 0xb3718 0xb4aa0 0xb5e28 0xb71b0 0xb8538 0xb98c0 0xbac48 0xbbfd0 0xbd358 0xbe6e0 0xbfa68 0xc0df0 0xc2178 0xc3500 0xc4888 0xc5c10 0xc6f98 0xc8320 0xc96a8 0xcaa30 0xcbdb8 0xcd140 0xce4c8 0xcf850 0xd0bd8 0xd1f60 0xd32e8 0xd4670 0xd59f8 0xd6d80 0xd8108 0xd9490 0xda818 0xdbba0 0xdcf28 0xde2b0 0xdf638 0xe09c0 0xe1d48 0xe30d0 0xe4458 0xe57e0 0xe6b68 0xe7ef0 0xe9278 0xea600 0xeb988 0xecd10 0xee098 0xef420 0xf07a8 0xf1b30 0xf2eb8 0xf4240 0xf55c8 0xf6950 0xf7cd8 0xf9060 0xfa3e8 0xfb770 0xfcaf8 0xfde80 0xff208 0x100590 0x101918 0x102ca0 0x104028 0x1053b0 0x106738 0x107ac0 0x108e48 0x10a1d0 0x10b558 0x10c8e0 0x10dc68 0x10eff0 0x110378 0x111700 0x112a88 0x113e10 0x115198 0x116520 0x1178a8 0x118c30 0x119fb8 0x11b340 0x11c6c8 0x11da50 0x11edd8 0x120160 0x1214e8 0x122870 0x123bf8 0x124f80 0x126308 0x127690 0x128a18 0x129da0 0x12b128 0x12c4b0 0x12d838 0x12ebc0 0x12ff48 0x1312d0 0x132658 0x1339e0 0x134d68 0x1360f0 0x137478 0x138800 0x139b88 0x13af10 0x13c298 0x13d620 0x13e9a8 0x13fd30 0x1410b8 0x142440 0x1437c8 0x144b50 0x145ed8 0x147260 0x1485e8 0x149970 0x14acf8 0x14c080 0x14d408 0x14e790 0x14fb18 0x150ea0 0x152228 0x1535b0 0x154938 0x155cc0 0x157048 0x1583d0 0x159758 0x15aae0 0x15be68 0x15d1f0 0x15e578 0x15f900>;
				pmic-off-on-delay-us = <0x3e8>;
				pmic-enable-time-us = <0xb4>;
				pmic-valid-modes-mask = <0x02>;
				pmic-valid-idle-mask = <0x0d>;
				status = "disabled";
				phandle = <0x640>;
			};

			buck6@23 {
				compatible = "pmic-ldo";
				reg = <0x23>;
				regulator-name = "buck6";
				regulator-min-microvolt = <0x41eb0>;
				regulator-max-microvolt = <0x15f900>;
				pmic-ctrl = <0x23 0x01>;
				pmic-vset = <0x43 0xff>;
				pmic-n-voltages = <0xeb>;
				pmic-vset-table = <0x41eb0 0x43238 0x445c0 0x45948 0x46cd0 0x48058 0x493e0 0x4a768 0x4baf0 0x4ce78 0x4e200 0x4f588 0x50910 0x51c98 0x53020 0x543a8 0x55730 0x56ab8 0x57e40 0x591c8 0x5a550 0x5b8d8 0x5cc60 0x5dfe8 0x5f370 0x606f8 0x61a80 0x62e08 0x64190 0x65518 0x668a0 0x67c28 0x68fb0 0x6a338 0x6b6c0 0x6ca48 0x6ddd0 0x6f158 0x704e0 0x71868 0x72bf0 0x73f78 0x75300 0x76688 0x77a10 0x78d98 0x7a120 0x7b4a8 0x7c830 0x7dbb8 0x7ef40 0x802c8 0x81650 0x829d8 0x83d60 0x850e8 0x86470 0x877f8 0x88b80 0x89f08 0x8b290 0x8c618 0x8d9a0 0x8ed28 0x900b0 0x91438 0x927c0 0x93b48 0x94ed0 0x96258 0x975e0 0x98968 0x99cf0 0x9b078 0x9c400 0x9d788 0x9eb10 0x9fe98 0xa1220 0xa25a8 0xa3930 0xa4cb8 0xa6040 0xa73c8 0xa8750 0xa9ad8 0xaae60 0xac1e8 0xad570 0xae8f8 0xafc80 0xb1008 0xb2390 0xb3718 0xb4aa0 0xb5e28 0xb71b0 0xb8538 0xb98c0 0xbac48 0xbbfd0 0xbd358 0xbe6e0 0xbfa68 0xc0df0 0xc2178 0xc3500 0xc4888 0xc5c10 0xc6f98 0xc8320 0xc96a8 0xcaa30 0xcbdb8 0xcd140 0xce4c8 0xcf850 0xd0bd8 0xd1f60 0xd32e8 0xd4670 0xd59f8 0xd6d80 0xd8108 0xd9490 0xda818 0xdbba0 0xdcf28 0xde2b0 0xdf638 0xe09c0 0xe1d48 0xe30d0 0xe4458 0xe57e0 0xe6b68 0xe7ef0 0xe9278 0xea600 0xeb988 0xecd10 0xee098 0xef420 0xf07a8 0xf1b30 0xf2eb8 0xf4240 0xf55c8 0xf6950 0xf7cd8 0xf9060 0xfa3e8 0xfb770 0xfcaf8 0xfde80 0xff208 0x100590 0x101918 0x102ca0 0x104028 0x1053b0 0x106738 0x107ac0 0x108e48 0x10a1d0 0x10b558 0x10c8e0 0x10dc68 0x10eff0 0x110378 0x111700 0x112a88 0x113e10 0x115198 0x116520 0x1178a8 0x118c30 0x119fb8 0x11b340 0x11c6c8 0x11da50 0x11edd8 0x120160 0x1214e8 0x122870 0x123bf8 0x124f80 0x126308 0x127690 0x128a18 0x129da0 0x12b128 0x12c4b0 0x12d838 0x12ebc0 0x12ff48 0x1312d0 0x132658 0x1339e0 0x134d68 0x1360f0 0x137478 0x138800 0x139b88 0x13af10 0x13c298 0x13d620 0x13e9a8 0x13fd30 0x1410b8 0x142440 0x1437c8 0x144b50 0x145ed8 0x147260 0x1485e8 0x149970 0x14acf8 0x14c080 0x14d408 0x14e790 0x14fb18 0x150ea0 0x152228 0x1535b0 0x154938 0x155cc0 0x157048 0x1583d0 0x159758 0x15aae0 0x15be68 0x15d1f0 0x15e578 0x15f900>;
				pmic-off-on-delay-us = <0x3e8>;
				pmic-enable-time-us = <0xb4>;
				pmic-valid-modes-mask = <0x02>;
				pmic-valid-idle-mask = <0x0d>;
				status = "disabled";
				phandle = <0x641>;
			};

			buck7@24 {
				compatible = "pmic-ldo";
				reg = <0x24>;
				regulator-name = "buck7";
				regulator-min-microvolt = <0x41eb0>;
				regulator-max-microvolt = <0x15f900>;
				pmic-ctrl = <0x24 0x01>;
				pmic-vset = <0x44 0xff>;
				pmic-n-voltages = <0xeb>;
				pmic-vset-table = <0x41eb0 0x43238 0x445c0 0x45948 0x46cd0 0x48058 0x493e0 0x4a768 0x4baf0 0x4ce78 0x4e200 0x4f588 0x50910 0x51c98 0x53020 0x543a8 0x55730 0x56ab8 0x57e40 0x591c8 0x5a550 0x5b8d8 0x5cc60 0x5dfe8 0x5f370 0x606f8 0x61a80 0x62e08 0x64190 0x65518 0x668a0 0x67c28 0x68fb0 0x6a338 0x6b6c0 0x6ca48 0x6ddd0 0x6f158 0x704e0 0x71868 0x72bf0 0x73f78 0x75300 0x76688 0x77a10 0x78d98 0x7a120 0x7b4a8 0x7c830 0x7dbb8 0x7ef40 0x802c8 0x81650 0x829d8 0x83d60 0x850e8 0x86470 0x877f8 0x88b80 0x89f08 0x8b290 0x8c618 0x8d9a0 0x8ed28 0x900b0 0x91438 0x927c0 0x93b48 0x94ed0 0x96258 0x975e0 0x98968 0x99cf0 0x9b078 0x9c400 0x9d788 0x9eb10 0x9fe98 0xa1220 0xa25a8 0xa3930 0xa4cb8 0xa6040 0xa73c8 0xa8750 0xa9ad8 0xaae60 0xac1e8 0xad570 0xae8f8 0xafc80 0xb1008 0xb2390 0xb3718 0xb4aa0 0xb5e28 0xb71b0 0xb8538 0xb98c0 0xbac48 0xbbfd0 0xbd358 0xbe6e0 0xbfa68 0xc0df0 0xc2178 0xc3500 0xc4888 0xc5c10 0xc6f98 0xc8320 0xc96a8 0xcaa30 0xcbdb8 0xcd140 0xce4c8 0xcf850 0xd0bd8 0xd1f60 0xd32e8 0xd4670 0xd59f8 0xd6d80 0xd8108 0xd9490 0xda818 0xdbba0 0xdcf28 0xde2b0 0xdf638 0xe09c0 0xe1d48 0xe30d0 0xe4458 0xe57e0 0xe6b68 0xe7ef0 0xe9278 0xea600 0xeb988 0xecd10 0xee098 0xef420 0xf07a8 0xf1b30 0xf2eb8 0xf4240 0xf55c8 0xf6950 0xf7cd8 0xf9060 0xfa3e8 0xfb770 0xfcaf8 0xfde80 0xff208 0x100590 0x101918 0x102ca0 0x104028 0x1053b0 0x106738 0x107ac0 0x108e48 0x10a1d0 0x10b558 0x10c8e0 0x10dc68 0x10eff0 0x110378 0x111700 0x112a88 0x113e10 0x115198 0x116520 0x1178a8 0x118c30 0x119fb8 0x11b340 0x11c6c8 0x11da50 0x11edd8 0x120160 0x1214e8 0x122870 0x123bf8 0x124f80 0x126308 0x127690 0x128a18 0x129da0 0x12b128 0x12c4b0 0x12d838 0x12ebc0 0x12ff48 0x1312d0 0x132658 0x1339e0 0x134d68 0x1360f0 0x137478 0x138800 0x139b88 0x13af10 0x13c298 0x13d620 0x13e9a8 0x13fd30 0x1410b8 0x142440 0x1437c8 0x144b50 0x145ed8 0x147260 0x1485e8 0x149970 0x14acf8 0x14c080 0x14d408 0x14e790 0x14fb18 0x150ea0 0x152228 0x1535b0 0x154938 0x155cc0 0x157048 0x1583d0 0x159758 0x15aae0 0x15be68 0x15d1f0 0x15e578 0x15f900>;
				pmic-off-on-delay-us = <0x3e8>;
				pmic-enable-time-us = <0xb4>;
				pmic-valid-modes-mask = <0x02>;
				pmic-valid-idle-mask = <0x0d>;
				status = "disabled";
				phandle = <0x642>;
			};

			buck8@25 {
				compatible = "pmic-ldo";
				reg = <0x25>;
				regulator-name = "buck8";
				regulator-min-microvolt = <0xd4670>;
				regulator-max-microvolt = <0x20a760>;
				pmic-ctrl = <0x25 0x01>;
				pmic-vset = <0x45 0x7f>;
				pmic-n-voltages = <0x80>;
				pmic-vset-table = <0xd4670 0xd6d80 0xd9490 0xdbba0 0xde2b0 0xe09c0 0xe30d0 0xe57e0 0xe7ef0 0xea600 0xecd10 0xef420 0xf1b30 0xf4240 0xf6950 0xf9060 0xfb770 0xfde80 0x100590 0x102ca0 0x1053b0 0x107ac0 0x10a1d0 0x10c8e0 0x10eff0 0x111700 0x113e10 0x116520 0x118c30 0x11b340 0x11da50 0x120160 0x122870 0x124f80 0x127690 0x129da0 0x12c4b0 0x12ebc0 0x1312d0 0x1339e0 0x1360f0 0x138800 0x13af10 0x13d620 0x13fd30 0x142440 0x144b50 0x147260 0x149970 0x14c080 0x14e790 0x150ea0 0x1535b0 0x155cc0 0x1583d0 0x15aae0 0x15d1f0 0x15f900 0x162010 0x164720 0x166e30 0x169540 0x16bc50 0x16e360 0x170a70 0x173180 0x175890 0x177fa0 0x17a6b0 0x17cdc0 0x17f4d0 0x181be0 0x1842f0 0x186a00 0x189110 0x18b820 0x18df30 0x190640 0x192d50 0x195460 0x197b70 0x19a280 0x19c990 0x19f0a0 0x1a17b0 0x1a3ec0 0x1a65d0 0x1a8ce0 0x1ab3f0 0x1adb00 0x1b0210 0x1b2920 0x1b5030 0x1b7740 0x1b9e50 0x1bc560 0x1bec70 0x1c1380 0x1c3a90 0x1c61a0 0x1c88b0 0x1cafc0 0x1cd6d0 0x1cfde0 0x1d24f0 0x1d4c00 0x1d7310 0x1d9a20 0x1dc130 0x1de840 0x1e0f50 0x1e3660 0x1e5d70 0x1e8480 0x1eab90 0x1ed2a0 0x1ef9b0 0x1f20c0 0x1f47d0 0x1f6ee0 0x1f95f0 0x1fbd00 0x1fe410 0x200b20 0x203230 0x205940 0x208050 0x20a760>;
				pmic-off-on-delay-us = <0x3e8>;
				pmic-enable-time-us = <0xb4>;
				pmic-valid-modes-mask = <0x02>;
				pmic-valid-idle-mask = <0x0d>;
				status = "disabled";
				phandle = <0x643>;
			};

			buck13@26 {
				compatible = "pmic-ldo";
				reg = <0x26>;
				regulator-name = "buck13";
				regulator-min-microvolt = <0x41eb0>;
				regulator-max-microvolt = <0x15f900>;
				pmic-ctrl = <0x26 0x01>;
				pmic-vset = <0x46 0xff>;
				pmic-n-voltages = <0xeb>;
				pmic-vset-table = <0x41eb0 0x43238 0x445c0 0x45948 0x46cd0 0x48058 0x493e0 0x4a768 0x4baf0 0x4ce78 0x4e200 0x4f588 0x50910 0x51c98 0x53020 0x543a8 0x55730 0x56ab8 0x57e40 0x591c8 0x5a550 0x5b8d8 0x5cc60 0x5dfe8 0x5f370 0x606f8 0x61a80 0x62e08 0x64190 0x65518 0x668a0 0x67c28 0x68fb0 0x6a338 0x6b6c0 0x6ca48 0x6ddd0 0x6f158 0x704e0 0x71868 0x72bf0 0x73f78 0x75300 0x76688 0x77a10 0x78d98 0x7a120 0x7b4a8 0x7c830 0x7dbb8 0x7ef40 0x802c8 0x81650 0x829d8 0x83d60 0x850e8 0x86470 0x877f8 0x88b80 0x89f08 0x8b290 0x8c618 0x8d9a0 0x8ed28 0x900b0 0x91438 0x927c0 0x93b48 0x94ed0 0x96258 0x975e0 0x98968 0x99cf0 0x9b078 0x9c400 0x9d788 0x9eb10 0x9fe98 0xa1220 0xa25a8 0xa3930 0xa4cb8 0xa6040 0xa73c8 0xa8750 0xa9ad8 0xaae60 0xac1e8 0xad570 0xae8f8 0xafc80 0xb1008 0xb2390 0xb3718 0xb4aa0 0xb5e28 0xb71b0 0xb8538 0xb98c0 0xbac48 0xbbfd0 0xbd358 0xbe6e0 0xbfa68 0xc0df0 0xc2178 0xc3500 0xc4888 0xc5c10 0xc6f98 0xc8320 0xc96a8 0xcaa30 0xcbdb8 0xcd140 0xce4c8 0xcf850 0xd0bd8 0xd1f60 0xd32e8 0xd4670 0xd59f8 0xd6d80 0xd8108 0xd9490 0xda818 0xdbba0 0xdcf28 0xde2b0 0xdf638 0xe09c0 0xe1d48 0xe30d0 0xe4458 0xe57e0 0xe6b68 0xe7ef0 0xe9278 0xea600 0xeb988 0xecd10 0xee098 0xef420 0xf07a8 0xf1b30 0xf2eb8 0xf4240 0xf55c8 0xf6950 0xf7cd8 0xf9060 0xfa3e8 0xfb770 0xfcaf8 0xfde80 0xff208 0x100590 0x101918 0x102ca0 0x104028 0x1053b0 0x106738 0x107ac0 0x108e48 0x10a1d0 0x10b558 0x10c8e0 0x10dc68 0x10eff0 0x110378 0x111700 0x112a88 0x113e10 0x115198 0x116520 0x1178a8 0x118c30 0x119fb8 0x11b340 0x11c6c8 0x11da50 0x11edd8 0x120160 0x1214e8 0x122870 0x123bf8 0x124f80 0x126308 0x127690 0x128a18 0x129da0 0x12b128 0x12c4b0 0x12d838 0x12ebc0 0x12ff48 0x1312d0 0x132658 0x1339e0 0x134d68 0x1360f0 0x137478 0x138800 0x139b88 0x13af10 0x13c298 0x13d620 0x13e9a8 0x13fd30 0x1410b8 0x142440 0x1437c8 0x144b50 0x145ed8 0x147260 0x1485e8 0x149970 0x14acf8 0x14c080 0x14d408 0x14e790 0x14fb18 0x150ea0 0x152228 0x1535b0 0x154938 0x155cc0 0x157048 0x1583d0 0x159758 0x15aae0 0x15be68 0x15d1f0 0x15e578 0x15f900>;
				pmic-off-on-delay-us = <0x3e8>;
				pmic-enable-time-us = <0xb4>;
				pmic-valid-modes-mask = <0x02>;
				pmic-valid-idle-mask = <0x0d>;
				status = "disabled";
				phandle = <0x644>;
			};

			ldo9@27 {
				compatible = "pmic-ldo";
				reg = <0x27>;
				regulator-name = "ldo9";
				regulator-min-microvolt = <0x1a5248>;
				regulator-max-microvolt = <0x325aa0>;
				pmic-ctrl = <0x27 0x01>;
				pmic-vset = <0x48 0x3f>;
				pmic-n-voltages = <0x40>;
				pmic-vset-table = <0x1a5248 0x1ab3f0 0x1b1598 0x1b7740 0x1bd8e8 0x1c3a90 0x1c9c38 0x1cfde0 0x1d5f88 0x1dc130 0x1e22d8 0x1e8480 0x1ee628 0x1f47d0 0x1fa978 0x200b20 0x206cc8 0x20ce70 0x213018 0x2191c0 0x21f368 0x225510 0x22b6b8 0x231860 0x237a08 0x23dbb0 0x243d58 0x249f00 0x2500a8 0x256250 0x25c3f8 0x2625a0 0x268748 0x26e8f0 0x274a98 0x27ac40 0x280de8 0x286f90 0x28d138 0x2932e0 0x299488 0x29f630 0x2a57d8 0x2ab980 0x2b1b28 0x2b7cd0 0x2bde78 0x2c4020 0x2ca1c8 0x2d0370 0x2d6518 0x2dc6c0 0x2e2868 0x2e8a10 0x2eebb8 0x2f4d60 0x2faf08 0x3010b0 0x307258 0x30d400 0x3135a8 0x319750 0x31f8f8 0x325aa0>;
				pmic-off-on-delay-us = <0x3e8>;
				pmic-enable-time-us = <0x168>;
				pmic-valid-modes-mask = <0x02>;
				pmic-valid-idle-mask = <0x0d>;
				phandle = <0x125>;
			};

			ldo34@28 {
				compatible = "pmic-ldo";
				reg = <0x28>;
				regulator-name = "ldo34";
				regulator-min-microvolt = <0x1a5248>;
				regulator-max-microvolt = <0x325aa0>;
				pmic-ctrl = <0x28 0x01>;
				pmic-vset = <0x49 0x3f>;
				pmic-n-voltages = <0x40>;
				pmic-vset-table = <0x1a5248 0x1ab3f0 0x1b1598 0x1b7740 0x1bd8e8 0x1c3a90 0x1c9c38 0x1cfde0 0x1d5f88 0x1dc130 0x1e22d8 0x1e8480 0x1ee628 0x1f47d0 0x1fa978 0x200b20 0x206cc8 0x20ce70 0x213018 0x2191c0 0x21f368 0x225510 0x22b6b8 0x231860 0x237a08 0x23dbb0 0x243d58 0x249f00 0x2500a8 0x256250 0x25c3f8 0x2625a0 0x268748 0x26e8f0 0x274a98 0x27ac40 0x280de8 0x286f90 0x28d138 0x2932e0 0x299488 0x29f630 0x2a57d8 0x2ab980 0x2b1b28 0x2b7cd0 0x2bde78 0x2c4020 0x2ca1c8 0x2d0370 0x2d6518 0x2dc6c0 0x2e2868 0x2e8a10 0x2eebb8 0x2f4d60 0x2faf08 0x3010b0 0x307258 0x30d400 0x3135a8 0x319750 0x31f8f8 0x325aa0>;
				pmic-off-on-delay-us = <0x3e8>;
				pmic-enable-time-us = <0x78>;
				pmic-valid-modes-mask = <0x02>;
				pmic-valid-idle-mask = <0x0d>;
				status = "disabled";
				phandle = <0x645>;
			};

			ldo50@29 {
				compatible = "pmic-ldo";
				reg = <0x29>;
				regulator-name = "ldo50";
				regulator-min-microvolt = <0x2dc6c0>;
				regulator-max-microvolt = <0x3567e0>;
				pmic-ctrl = <0x29 0x01>;
				pmic-vset = <0x4a 0x0f>;
				pmic-n-voltages = <0x10>;
				pmic-vset-table = <0x2dc6c0 0x2e8a10 0x2f4d60 0x3010b0 0x30d400 0x319750 0x325aa0 0x331df0 0x33e140 0x34a490 0x3567e0 0x3567e0 0x3567e0 0x3567e0 0x3567e0 0x3567e0>;
				pmic-off-on-delay-us = <0x3e8>;
				pmic-enable-time-us = <0x78>;
				pmic-valid-modes-mask = <0x02>;
				pmic-valid-idle-mask = <0x0d>;
				phandle = <0x646>;
			};

			ldo51@2A {
				compatible = "pmic-ldo";
				reg = <0x2a>;
				regulator-name = "ldo51";
				regulator-min-microvolt = <0x2dc6c0>;
				regulator-max-microvolt = <0x3567e0>;
				pmic-ctrl = <0x2a 0x01>;
				pmic-vset = <0x4b 0x0f>;
				pmic-n-voltages = <0x10>;
				pmic-vset-table = <0x2dc6c0 0x2e8a10 0x2f4d60 0x3010b0 0x30d400 0x319750 0x325aa0 0x331df0 0x33e140 0x34a490 0x3567e0 0x3567e0 0x3567e0 0x3567e0 0x3567e0 0x3567e0>;
				pmic-off-on-delay-us = <0x3e8>;
				pmic-enable-time-us = <0x78>;
				pmic-valid-modes-mask = <0x02>;
				pmic-valid-idle-mask = <0x0d>;
				phandle = <0x647>;
			};

			ldo53@2B {
				compatible = "pmic-ldo";
				reg = <0x2b>;
				regulator-name = "ldo53";
				regulator-min-microvolt = <0x1a5248>;
				regulator-max-microvolt = <0x325aa0>;
				pmic-ctrl = <0x2b 0x01>;
				pmic-vset = <0x4c 0x3f>;
				pmic-n-voltages = <0x40>;
				pmic-vset-table = <0x1a5248 0x1ab3f0 0x1b1598 0x1b7740 0x1bd8e8 0x1c3a90 0x1c9c38 0x1cfde0 0x1d5f88 0x1dc130 0x1e22d8 0x1e8480 0x1ee628 0x1f47d0 0x1fa978 0x200b20 0x206cc8 0x20ce70 0x213018 0x2191c0 0x21f368 0x225510 0x22b6b8 0x231860 0x237a08 0x23dbb0 0x243d58 0x249f00 0x2500a8 0x256250 0x25c3f8 0x2625a0 0x268748 0x26e8f0 0x274a98 0x27ac40 0x280de8 0x286f90 0x28d138 0x2932e0 0x299488 0x29f630 0x2a57d8 0x2ab980 0x2b1b28 0x2b7cd0 0x2bde78 0x2c4020 0x2ca1c8 0x2d0370 0x2d6518 0x2dc6c0 0x2e2868 0x2e8a10 0x2eebb8 0x2f4d60 0x2faf08 0x3010b0 0x307258 0x30d400 0x3135a8 0x319750 0x31f8f8 0x325aa0>;
				pmic-off-on-delay-us = <0x3e8>;
				pmic-enable-time-us = <0x168>;
				pmic-valid-modes-mask = <0x02>;
				pmic-valid-idle-mask = <0x0d>;
				status = "ok";
				phandle = <0x648>;
			};

			ldo54@2C {
				compatible = "pmic-ldo";
				reg = <0x2c>;
				regulator-name = "ldo54";
				regulator-min-microvolt = <0x1a5248>;
				regulator-max-microvolt = <0x325aa0>;
				pmic-ctrl = <0x2c 0x01>;
				pmic-vset = <0x4d 0x3f>;
				pmic-n-voltages = <0x40>;
				pmic-vset-table = <0x1a5248 0x1ab3f0 0x1b1598 0x1b7740 0x1bd8e8 0x1c3a90 0x1c9c38 0x1cfde0 0x1d5f88 0x1dc130 0x1e22d8 0x1e8480 0x1ee628 0x1f47d0 0x1fa978 0x200b20 0x206cc8 0x20ce70 0x213018 0x2191c0 0x21f368 0x225510 0x22b6b8 0x231860 0x237a08 0x23dbb0 0x243d58 0x249f00 0x2500a8 0x256250 0x25c3f8 0x2625a0 0x268748 0x26e8f0 0x274a98 0x27ac40 0x280de8 0x286f90 0x28d138 0x2932e0 0x299488 0x29f630 0x2a57d8 0x2ab980 0x2b1b28 0x2b7cd0 0x2bde78 0x2c4020 0x2ca1c8 0x2d0370 0x2d6518 0x2dc6c0 0x2e2868 0x2e8a10 0x2eebb8 0x2f4d60 0x2faf08 0x3010b0 0x307258 0x30d400 0x3135a8 0x319750 0x31f8f8 0x325aa0>;
				pmic-off-on-delay-us = <0x3e8>;
				pmic-enable-time-us = <0x168>;
				pmic-valid-modes-mask = <0x02>;
				pmic-valid-idle-mask = <0x0d>;
				status = "ok";
				phandle = <0x649>;
			};

			buckboost@2E {
				compatible = "pmic-ldo";
				reg = <0x2e>;
				regulator-name = "buckboost";
				regulator-always-on;
				regulator-min-microvolt = <0x2b7cd0>;
				regulator-max-microvolt = <0x3c45b0>;
				pmic-ctrl = <0x2e 0x00>;
				pmic-vset = <0x900 0x1f>;
				pmic-n-voltages = <0x20>;
				pmic-vset-table = <0x2b7cd0 0x2c4020 0x2d0370 0x2dc6c0 0x2e8a10 0x2f4d60 0x3010b0 0x30d400 0x319750 0x325aa0 0x331df0 0x33e140 0x34a490 0x3567e0 0x362b30 0x36ee80 0x37b1d0 0x387520 0x393870 0x39fbc0 0x3abf10 0x3b8260 0x3c45b0 0x3c45b0 0x3c45b0 0x3c45b0 0x3c45b0 0x3c45b0 0x3c45b0 0x3c45b0 0x3c45b0 0x3c45b0>;
				pmic-off-on-delay-us = <0x3e8>;
				pmic-enable-time-us = <0x168>;
				pmic-valid-modes-mask = <0x02>;
				pmic-valid-idle-mask = <0x0d>;
				phandle = <0x64a>;
			};

			pmic_mntn1@a0 {
				#address-cells = <0x01>;
				#size-cells = <0x00>;
				compatible = "hisilicon,pmic-mntn";
				interrupt-parent = <0x11f>;
				interrupts = <0x00 0x00 0x01 0x00>;
				interrupt-names = "otmp", "ocp";
				reg = <0xa0>;
				pmic-mnt-data-width = <0x08>;
				pmic-mnt-ocp-reg-num = <0x07>;
				pmic-mnt-ocp-regs = <0x3c1 0x3c2 0x3c3 0x3c4 0x3c5 0x3c6 0x3c7>;
				pmic-mnt-record-reg-num = <0x0c>;
				pmic-mnt-record-regs = <0x3e1 0x3e2 0x3e3 0x3e4 0x3e5 0x3e6 0x3e7 0x3e0 0x3e8 0x3e9 0x3ea 0x3eb>;
				pmic-mnt-ocp-error-dmd-offset-number = <0x60>;
				pmic-mnt-ocp-error-dmd-offset = <0x6f 0x6e 0x6d 0x6c 0x6b 0x4a 0x3f 0x3e 0x72 0x71 0x30 0x2d 0x2e 0x81 0x70 0x3e7 0x86 0x85 0x84 0x83 0x67 0x33 0x0a 0x82 0x74 0x73 0x4a 0x46 0x3e7 0x3e7 0x3e7 0x3e7 0x77 0x76 0x39 0x36 0x37 0x75 0x3e7 0x3e7 0x7b 0x7a 0x8a 0x89 0x79 0x88 0x78 0x3e7 0x80 0x7f 0x7e 0x7d 0x7c 0x3e7 0x3e7 0x3e7 0x87 0x8b 0x3e7 0x3e7 0x3e7 0x3e7 0x3e7 0x3e7 0x3e7 0x3e7 0x3e7 0x3e7 0x3e7 0x3e7 0x3e7 0x3e7 0x3e7 0x3e7 0x3e7 0x3e7 0x3e7 0x3e7 0x3e7 0x3e7 0x3e7 0x3e7 0x3e7 0x3e7 0x3e7 0x3e7 0x3e7 0x3e7 0x3e7 0x3e7 0x3e7 0x3e7 0x3e7 0x3e7 0x3e7 0x3e7>;
				pmic-mnt-dsm-record-regs-mask = <0xff 0xff 0xff 0xff 0xff 0xff 0xff 0x03 0x00 0x00 0x00 0x00>;
				pmic-mnt-dsm-ocp-reset-mask = <0xc0 0x3f 0x00 0x08 0x1f 0x3c 0x1c 0xff 0xff 0xff 0xff 0xff>;
				pmu-record-reg-num = <0x06>;
				pmu-record-regs = <0x40 0x42 0x43 0x44 0x45 0x46>;
				phandle = <0x64b>;

				OCP@3C1 {
					compatible = "pmic-mntn-ocp-reg0x3C1";
					reg = <0x3c1>;
					pmic-mnt-inacceptable-event = <0xff>;
					pmic-mnt-check_ocp_reset = <0x00>;
					pmic-mnt-check_ocp_nofify = <0x00>;
					pmic-mnt-check_ocp_num = <0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00>;
					pmic-mnt-event-bit-name = "ocp_b31", "ocp_b30", "ocp_b21", "ocp_b20", "ocp_b11", "ocp_b10", "ocp_b01", "ocp_b00";
					pmic-mnt-event-ops-reg = <0x22 0x22 0xdead 0xdead 0xdead 0xdead 0x21 0x21>;
				};

				OCP@3C2 {
					compatible = "pmic-mntn-ocp-reg0x3C2";
					reg = <0x3c2>;
					pmic-mnt-inacceptable-event = <0x3f>;
					pmic-mnt-check_ocp_reset = <0x00>;
					pmic-mnt-check_ocp_nofify = <0x00>;
					pmic-mnt-check_ocp_num = <0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00>;
					pmic-mnt-event-bit-name = "ocp_b13", "ocp_b12", "ocp_b8", "ocp_b7", "ocp_b6", "ocp_pmuh", "reserved", "reserved";
					pmic-mnt-event-ops-reg = <0x26 0xdead 0x25 0x24 0x23 0x2d 0xdead 0xdead>;
				};

				OCP@3C3 {
					compatible = "pmic-mntn-ocp-reg0x3C3";
					reg = <0x3c3>;
					pmic-mnt-inacceptable-event = <0xff>;
					pmic-mnt-check_ocp_reset = <0x00>;
					pmic-mnt-check_ocp_nofify = <0x00>;
					pmic-mnt-check_ocp_num = <0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00>;
					pmic-mnt-event-bit-name = "ocp_ldo54", "ocp_ldo53", "ocp_ldo52", "ocp_ldo51", "ocp_ldo50", "ocp_ldo34", "ldo9", "ocp_sw10";
					pmic-mnt-event-ops-reg = <0x2c 0x2b 0xdead 0x2a 0x29 0x28 0x27 0xdead>;
				};

				OCP@3C4 {
					compatible = "pmic-mntn-ocp-reg0x3C4";
					reg = <0x3c4>;
					pmic-mnt-inacceptable-event = <0x0f>;
					pmic-mnt-check_ocp_reset = <0x00>;
					pmic-mnt-check_ocp_nofify = <0x00>;
					pmic-mnt-check_ocp_num = <0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00>;
					pmic-mnt-event-bit-name = "scp_b30", "scp_b20", "scp_b10", "scp_b00", "reserved", "reserved", "reserved", "reserved";
					pmic-mnt-event-ops-reg = <0x22 0xdead 0xdead 0x21 0xdead 0xdead 0xdead 0xdead>;
				};

				OCP@3C5 {
					compatible = "pmic-mntn-ocp-reg0x3C5";
					reg = <0x3c5>;
					pmic-mnt-inacceptable-event = <0x1f>;
					pmic-mnt-check_ocp_reset = <0x00>;
					pmic-mnt-check_ocp_nofify = <0x00>;
					pmic-mnt-check_ocp_num = <0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00>;
					pmic-mnt-event-bit-name = "scp_b13", "scp_b12", "scp_b8", "scp_b7", "scp_b6", "reserved", "reserved", "reserved";
					pmic-mnt-event-ops-reg = <0x26 0xdead 0x25 0x24 0x23 0xdead 0xdead 0xdead>;
				};

				OCP@3C6 {
					compatible = "pmic-mntn-ocp-reg0x3C6";
					reg = <0x3c6>;
					pmic-mnt-inacceptable-event = <0x3f>;
					pmic-mnt-check_ocp_reset = <0x00>;
					pmic-mnt-check_ocp_nofify = <0x00>;
					pmic-mnt-check_ocp_num = <0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00>;
					pmic-mnt-event-bit-name = "ovp_b30", "ovp_b20", "ovp_b10", "ovp_b00", "ovp_b12", "ovp_b8", "reserved", "reserved";
					pmic-mnt-event-ops-reg = <0x22 0xdead 0xdead 0x21 0xdead 0x25 0xdead 0xdead>;
				};

				OCP@3C7 {
					compatible = "pmic-mntn-ocp-reg0x3C7";
					reg = <0x3c7>;
					pmic-mnt-inacceptable-event = <0x1f>;
					pmic-mnt-check_ocp_reset = <0x00>;
					pmic-mnt-check_ocp_nofify = <0x00>;
					pmic-mnt-check_ocp_num = <0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00>;
					pmic-mnt-event-bit-name = "cur_b30", "cur_b20", "cur_b10", "cur_b00", "cur_b12", "reserved", "reserved", "reserved";
					pmic-mnt-event-ops-reg = <0x22 0xdead 0xdead 0x21 0xdead 0xdead 0xdead 0xdead>;
				};

				RECORD@3E1 {
					compatible = "pmic-mntn-record-reg0x3E1";
					reg = <0x3e1>;
					pmic-mnt-inacceptable-event = <0xff>;
					pmic-mnt-event-bit-name = "ocp_b31", "ocp_b30", "ocp_b21", "ocp_b20", "ocp_b11", "ocp_b10", "ocp_b01", "ocp_b00";
				};

				RECORD@3E2 {
					compatible = "pmic-mntn-record-reg0x3E2";
					reg = <0x3e2>;
					pmic-mnt-inacceptable-event = <0x7f>;
					pmic-mnt-event-bit-name = "ocp_b13", "ocp_b12", "ocp_b8", "ocp_7", "ocp_6", "ocp_pmuh", "ocp_bb", "reserved";
				};

				RECORD@3E3 {
					compatible = "pmic-mntn-record-reg0x3E3";
					reg = <0x3e3>;
					pmic-mnt-inacceptable-event = <0xff>;
					pmic-mnt-event-bit-name = "ocp_ldo54", "ocp_ldo53", "ocp_ldo52", "ocp_ldo51", "ocp_ldo50", "ocp_ldo34", "ocp_ldo9", "ocp_sw10";
				};

				RECORD@3E4 {
					compatible = "pmic-mntn-record-reg0x3E4";
					reg = <0x3e4>;
					pmic-mnt-inacceptable-event = <0x0f>;
					pmic-mnt-event-bit-name = "scp_b30", "scp_b20", "scp_b10", "scp_b00", "reserved", "reserved", "reserved", "reserved";
				};

				RECORD@3E5 {
					compatible = "pmic-mntn-record-reg0x3E5";
					reg = <0x3e5>;
					pmic-mnt-inacceptable-event = <0x3f>;
					pmic-mnt-event-bit-name = "scp_b13", "scp_b12", "scp_b8", "scp_b7", "scp_b6", "scp_bb", "reserved", "reserved";
				};

				RECORD@3E6 {
					compatible = "pmic-mntn-record-reg0x3E6";
					reg = <0x3e6>;
					pmic-mnt-inacceptable-event = <0x7f>;
					pmic-mnt-event-bit-name = "ovp_b30", "ovp_b20", "ovp_b10", "ovp_b00", "ovp_b12", "ovp_b8", "ovp_bb", "reserved";
				};

				RECORD@3E7 {
					compatible = "pmic-mntn-record-reg0x3E7";
					reg = <0x3e7>;
					pmic-mnt-inacceptable-event = <0x1f>;
					pmic-mnt-event-bit-name = "cur_b30", "cur_b20", "cur_b10", "cur_b00", "cur_b12", "reserved", "reserved", "reserved";
				};

				RECORD@3E0 {
					compatible = "pmic-mntn-record-reg0x3E0";
					reg = <0x3e0>;
					pmic-mnt-inacceptable-event = <0x3f>;
					pmic-mnt-event-bit-name = "thsd_otmp125", "thsd_otmp140", "vsys_pwroff_abs", "vsys_pwroff_deb", "vsys_ov", "vsys_pwron_shutdown", "reserved", "reserved";
				};

				RECORD@3E8 {
					compatible = "pmic-mntn-record-reg0x3E8";
					reg = <0x3e8>;
					pmic-mnt-inacceptable-event = <0x7f>;
					pmic-mnt-event-bit-name = "ramp_abn_b7", "ramp_abn_b6", "ramp_abn_b12", "ramp_abn_b30", "ram_abn_b20", "ramp_abn_b10", "ramp_abn_b00", "reserved";
				};

				RECORD@3E9 {
					compatible = "pmic-mntn-record-reg0x3E9";
					reg = <0x3e9>;
					pmic-mnt-inacceptable-event = <0x00>;
					pmic-mnt-event-bit-name = "fault_m_n", "fault_s_n", "reserved", "reserved", "reserved", "reserved", "reserved", "reserved";
				};

				RECORD@3EA {
					compatible = "pmic-mntn-record-reg0x3EA";
					reg = <0x3ea>;
					pmic-mnt-inacceptable-event = <0x67>;
					pmic-mnt-event-bit-name = "pmu_short_f", "pmuh_short_f", "vin_ldoh", "pmu_rc_clk_sel_r", "pmu_rc_clk_sel_r", "core_io18_vld_f", "core_io12_vld_f", "clk32_pmu_dis";
				};

				RECORD@3EB {
					compatible = "pmic-mntn-record-reg0x3EB";
					reg = <0x3eb>;
					pmic-mnt-inacceptable-event = <0x7f>;
					pmic-mnt-event-bit-name = "ramp_eco_b7", "ramp_eco_b6", "ramp_eco_b12", "ramp_eco_b30", "ram_eco_b20", "ramp_eco_b10", "ramp_eco_b00", "reserved";
				};
			};
		};

		pmic@0 {
			pmic_fpga_flag = <0x00>;
			#address-cells = <0x01>;
			#size-cells = <0x00>;
			compatible = "pmic-spmi";
			reg = <0x00>;
			slave_id = <0x09>;
			handle_irq;
			#interrupt-cells = <0x02>;
			interrupt-controller;
			gpios = <0x43 0x0d 0x00>;
			pinctrl-names = "default";
			pinctrl-0;
			pmic-irq-num = <0x28>;
			pmic-irq-array = <0x05>;
			pmic-irq-mask-addr = <0x290 0x291 0x29d 0x29e 0x29f>;
			pmic-irq-addr = <0x2b3 0x2b4 0x2c0 0x2c1 0x2c2>;
			pmic-vbus = <0x06 0x01>;
			pmic-lock = <0x144 0x7d>;
			pmic-debug-lock = <0x40f 0x6c>;
			spmi-slave-container;
			phandle = <0x120>;

			ponkey {
				powerkey-type = <0x01>;
				interrupt-numbers = <0x02>;
				compatible = "powerkey-spmi";
				interrupt-parent = <0x120>;
				interrupts = <0x07 0x00 0x04 0x00>;
				interrupt-names = "down", "hold 6s";
				status = "ok";
				phandle = <0x64c>;
			};

			usbvbus {
				compatible = "hisilicon-usbvbus";
				interrupt-parent = <0x120>;
				interrupts = <0x01 0x00 0x02 0x00>;
				interrupt-names = "connect", "disconnect";
				status = "disabled";
			};

			pmicdieid {
				compatible = "pmic-dieid";
				pmic-dieid-name = "Hi6421_PMU1";
				pmic-dieid-reg-num = <0x14>;
				pmic-dieid-regs = <0x4ba 0x4b9 0x4b8 0x4b7 0x4b6 0x4b5 0x4b4 0x4b3 0x4b2 0x4b1 0x4b0 0x4af 0x4ae 0x4ad 0x4ac 0x4ab 0x4aa 0x4a9 0x4a8 0x4a7>;
			};

			pmic_gpio0 {
				compatible = "pmic-gpio";
				gpio-nr = <0x258>;
				data-reg = <0x1b7>;
				dir-reg = <0x1b9>;
				status = "disabled";
				phandle = <0x64d>;
			};

			pmic_gpio1 {
				compatible = "pmic-gpio";
				gpio-nr = <0x259>;
				data-reg = <0x1c5>;
				dir-reg = <0x1c7>;
				status = "disabled";
				phandle = <0x64e>;
			};

			buck1@D {
				compatible = "pmic-ldo";
				reg = <0x0d>;
				regulator-name = "buck1";
				regulator-always-on;
				regulator-min-microvolt = <0xd4670>;
				regulator-max-microvolt = <0x20a760>;
				pmic-ctrl = <0x0d 0x01 0x10>;
				pmic-vset = <0x50 0x7f>;
				pmic-n-voltages = <0x80>;
				pmic-vset-table = <0xd4670 0xd6d80 0xd9490 0xdbba0 0xde2b0 0xe09c0 0xe30d0 0xe57e0 0xe7ef0 0xea600 0xecd10 0xef420 0xf1b30 0xf4240 0xf6950 0xf9060 0xfb770 0xfde80 0x100590 0x102ca0 0x1053b0 0x107ac0 0x10a1d0 0x10c8e0 0x10eff0 0x111700 0x113e10 0x116520 0x118c30 0x11b340 0x11da50 0x120160 0x122870 0x124f80 0x127690 0x129da0 0x12c4b0 0x12ebc0 0x1312d0 0x1339e0 0x1360f0 0x138800 0x13af10 0x13d620 0x13fd30 0x142440 0x144b50 0x147260 0x149970 0x14c080 0x14e790 0x150ea0 0x1535b0 0x155cc0 0x1583d0 0x15aae0 0x15d1f0 0x15f900 0x162010 0x164720 0x166e30 0x169540 0x16bc50 0x16e360 0x170a70 0x173180 0x175890 0x177fa0 0x17a6b0 0x17cdc0 0x17f4d0 0x181be0 0x1842f0 0x186a00 0x189110 0x18b820 0x18df30 0x190640 0x192d50 0x195460 0x197b70 0x19a280 0x19c990 0x19f0a0 0x1a17b0 0x1a3ec0 0x1a65d0 0x1a8ce0 0x1ab3f0 0x1adb00 0x1b0210 0x1b2920 0x1b5030 0x1b7740 0x1b9e50 0x1bc560 0x1bec70 0x1c1380 0x1c3a90 0x1c61a0 0x1c88b0 0x1cafc0 0x1cd6d0 0x1cfde0 0x1d24f0 0x1d4c00 0x1d7310 0x1d9a20 0x1dc130 0x1de840 0x1e0f50 0x1e3660 0x1e5d70 0x1e8480 0x1eab90 0x1ed2a0 0x1ef9b0 0x1f20c0 0x1f47d0 0x1f6ee0 0x1f95f0 0x1fbd00 0x1fe410 0x200b20 0x203230 0x205940 0x208050 0x20a760>;
				pmic-off-on-delay-us = <0x3e8>;
				pmic-enable-time-us = <0xb4>;
				pmic-eco-microamp = <0x2710>;
				pmic-valid-modes-mask = <0x06>;
				pmic-valid-idle-mask = <0x0d>;
				pmic-current-sense-support = <0x01>;
				pmic-current-sense-adc-channel-ctrl = <0x0e>;
				pmic-current-sense-channel-ctrl = <0x9c 0x0f 0x00>;
				pmic-current-sense-ctrl = <0x808 0x01>;
				pmic-current-voltage-coefficient = <0x72>;
				pmic-current-sense-delay-time = <0x3e8>;
				status = "disabled";
				phandle = <0x64f>;
			};

			buck2@E {
				compatible = "pmic-ldo";
				reg = <0x0e>;
				regulator-name = "buck2";
				regulator-always-on;
				regulator-min-microvolt = <0xd4670>;
				regulator-max-microvolt = <0x20a760>;
				pmic-ctrl = <0x0e 0x01 0x10>;
				pmic-vset = <0x51 0x7f>;
				pmic-n-voltages = <0x80>;
				pmic-vset-table = <0xd4670 0xd6d80 0xd9490 0xdbba0 0xde2b0 0xe09c0 0xe30d0 0xe57e0 0xe7ef0 0xea600 0xecd10 0xef420 0xf1b30 0xf4240 0xf6950 0xf9060 0xfb770 0xfde80 0x100590 0x102ca0 0x1053b0 0x107ac0 0x10a1d0 0x10c8e0 0x10eff0 0x111700 0x113e10 0x116520 0x118c30 0x11b340 0x11da50 0x120160 0x122870 0x124f80 0x127690 0x129da0 0x12c4b0 0x12ebc0 0x1312d0 0x1339e0 0x1360f0 0x138800 0x13af10 0x13d620 0x13fd30 0x142440 0x144b50 0x147260 0x149970 0x14c080 0x14e790 0x150ea0 0x1535b0 0x155cc0 0x1583d0 0x15aae0 0x15d1f0 0x15f900 0x162010 0x164720 0x166e30 0x169540 0x16bc50 0x16e360 0x170a70 0x173180 0x175890 0x177fa0 0x17a6b0 0x17cdc0 0x17f4d0 0x181be0 0x1842f0 0x186a00 0x189110 0x18b820 0x18df30 0x190640 0x192d50 0x195460 0x197b70 0x19a280 0x19c990 0x19f0a0 0x1a17b0 0x1a3ec0 0x1a65d0 0x1a8ce0 0x1ab3f0 0x1adb00 0x1b0210 0x1b2920 0x1b5030 0x1b7740 0x1b9e50 0x1bc560 0x1bec70 0x1c1380 0x1c3a90 0x1c61a0 0x1c88b0 0x1cafc0 0x1cd6d0 0x1cfde0 0x1d24f0 0x1d4c00 0x1d7310 0x1d9a20 0x1dc130 0x1de840 0x1e0f50 0x1e3660 0x1e5d70 0x1e8480 0x1eab90 0x1ed2a0 0x1ef9b0 0x1f20c0 0x1f47d0 0x1f6ee0 0x1f95f0 0x1fbd00 0x1fe410 0x200b20 0x203230 0x205940 0x208050 0x20a760>;
				pmic-off-on-delay-us = <0x3e8>;
				pmic-enable-time-us = <0xb4>;
				pmic-eco-microamp = <0x2710>;
				pmic-valid-modes-mask = <0x06>;
				pmic-valid-idle-mask = <0x0d>;
				status = "ok";
				phandle = <0x140>;
			};

			buck9@18 {
				compatible = "pmic-ldo";
				reg = <0x18>;
				regulator-name = "buck9";
				regulator-always-on;
				regulator-min-microvolt = <0x41eb0>;
				regulator-max-microvolt = <0x15f900>;
				pmic-ctrl = <0x18 0x01 0x10>;
				pmic-vset = <0x5b 0xff>;
				pmic-n-voltages = <0xeb>;
				pmic-vset-table = <0x41eb0 0x43238 0x445c0 0x45948 0x46cd0 0x48058 0x493e0 0x4a768 0x4baf0 0x4ce78 0x4e200 0x4f588 0x50910 0x51c98 0x53020 0x543a8 0x55730 0x56ab8 0x57e40 0x591c8 0x5a550 0x5b8d8 0x5cc60 0x5dfe8 0x5f370 0x606f8 0x61a80 0x62e08 0x64190 0x65518 0x668a0 0x67c28 0x68fb0 0x6a338 0x6b6c0 0x6ca48 0x6ddd0 0x6f158 0x704e0 0x71868 0x72bf0 0x73f78 0x75300 0x76688 0x77a10 0x78d98 0x7a120 0x7b4a8 0x7c830 0x7dbb8 0x7ef40 0x802c8 0x81650 0x829d8 0x83d60 0x850e8 0x86470 0x877f8 0x88b80 0x89f08 0x8b290 0x8c618 0x8d9a0 0x8ed28 0x900b0 0x91438 0x927c0 0x93b48 0x94ed0 0x96258 0x975e0 0x98968 0x99cf0 0x9b078 0x9c400 0x9d788 0x9eb10 0x9fe98 0xa1220 0xa25a8 0xa3930 0xa4cb8 0xa6040 0xa73c8 0xa8750 0xa9ad8 0xaae60 0xac1e8 0xad570 0xae8f8 0xafc80 0xb1008 0xb2390 0xb3718 0xb4aa0 0xb5e28 0xb71b0 0xb8538 0xb98c0 0xbac48 0xbbfd0 0xbd358 0xbe6e0 0xbfa68 0xc0df0 0xc2178 0xc3500 0xc4888 0xc5c10 0xc6f98 0xc8320 0xc96a8 0xcaa30 0xcbdb8 0xcd140 0xce4c8 0xcf850 0xd0bd8 0xd1f60 0xd32e8 0xd4670 0xd59f8 0xd6d80 0xd8108 0xd9490 0xda818 0xdbba0 0xdcf28 0xde2b0 0xdf638 0xe09c0 0xe1d48 0xe30d0 0xe4458 0xe57e0 0xe6b68 0xe7ef0 0xe9278 0xea600 0xeb988 0xecd10 0xee098 0xef420 0xf07a8 0xf1b30 0xf2eb8 0xf4240 0xf55c8 0xf6950 0xf7cd8 0xf9060 0xfa3e8 0xfb770 0xfcaf8 0xfde80 0xff208 0x100590 0x101918 0x102ca0 0x104028 0x1053b0 0x106738 0x107ac0 0x108e48 0x10a1d0 0x10b558 0x10c8e0 0x10dc68 0x10eff0 0x110378 0x111700 0x112a88 0x113e10 0x115198 0x116520 0x1178a8 0x118c30 0x119fb8 0x11b340 0x11c6c8 0x11da50 0x11edd8 0x120160 0x1214e8 0x122870 0x123bf8 0x124f80 0x126308 0x127690 0x128a18 0x129da0 0x12b128 0x12c4b0 0x12d838 0x12ebc0 0x12ff48 0x1312d0 0x132658 0x1339e0 0x134d68 0x1360f0 0x137478 0x138800 0x139b88 0x13af10 0x13c298 0x13d620 0x13e9a8 0x13fd30 0x1410b8 0x142440 0x1437c8 0x144b50 0x145ed8 0x147260 0x1485e8 0x149970 0x14acf8 0x14c080 0x14d408 0x14e790 0x14fb18 0x150ea0 0x152228 0x1535b0 0x154938 0x155cc0 0x157048 0x1583d0 0x159758 0x15aae0 0x15be68 0x15d1f0 0x15e578 0x15f900>;
				pmic-off-on-delay-us = <0x3e8>;
				pmic-enable-time-us = <0xb4>;
				pmic-eco-microamp = <0x2710>;
				pmic-valid-modes-mask = <0x06>;
				pmic-valid-idle-mask = <0x0d>;
				pmic-current-sense-support = <0x01>;
				pmic-current-sense-adc-channel-ctrl = <0x0e>;
				pmic-current-sense-channel-ctrl = <0x9c 0x0f 0x01>;
				pmic-current-sense-ctrl = <0x925 0x01>;
				pmic-current-voltage-coefficient = <0x72>;
				pmic-current-sense-delay-time = <0x3e8>;
				status = "disabled";
				phandle = <0x650>;
			};

			buck70@14 {
				compatible = "pmic-ldo";
				reg = <0x14>;
				regulator-name = "buck70";
				regulator-min-microvolt = <0x493e0>;
				regulator-max-microvolt = <0x15f900>;
				pmic-ctrl = <0x14 0x01 0x10>;
				pmic-vset = <0x59 0xff>;
				pmic-n-voltages = <0xe5>;
				pmic-vset-table = <0x493e0 0x4a768 0x4baf0 0x4ce78 0x4e200 0x4f588 0x50910 0x51c98 0x53020 0x543a8 0x55730 0x56ab8 0x57e40 0x591c8 0x5a550 0x5b8d8 0x5cc60 0x5dfe8 0x5f370 0x606f8 0x61a80 0x62e08 0x64190 0x65518 0x668a0 0x67c28 0x68fb0 0x6a338 0x6b6c0 0x6ca48 0x6ddd0 0x6f158 0x704e0 0x71868 0x72bf0 0x73f78 0x75300 0x76688 0x77a10 0x78d98 0x7a120 0x7b4a8 0x7c830 0x7dbb8 0x7ef40 0x802c8 0x81650 0x829d8 0x83d60 0x850e8 0x86470 0x877f8 0x88b80 0x89f08 0x8b290 0x8c618 0x8d9a0 0x8ed28 0x900b0 0x91438 0x927c0 0x93b48 0x94ed0 0x96258 0x975e0 0x98968 0x99cf0 0x9b078 0x9c400 0x9d788 0x9eb10 0x9fe98 0xa1220 0xa25a8 0xa3930 0xa4cb8 0xa6040 0xa73c8 0xa8750 0xa9ad8 0xaae60 0xac1e8 0xad570 0xae8f8 0xafc80 0xb1008 0xb2390 0xb3718 0xb4aa0 0xb5e28 0xb71b0 0xb8538 0xb98c0 0xbac48 0xbbfd0 0xbd358 0xbe6e0 0xbfa68 0xc0df0 0xc2178 0xc3500 0xc4888 0xc5c10 0xc6f98 0xc8320 0xc96a8 0xcaa30 0xcbdb8 0xcd140 0xce4c8 0xcf850 0xd0bd8 0xd1f60 0xd32e8 0xd4670 0xd59f8 0xd6d80 0xd8108 0xd9490 0xda818 0xdbba0 0xdcf28 0xde2b0 0xdf638 0xe09c0 0xe1d48 0xe30d0 0xe4458 0xe57e0 0xe6b68 0xe7ef0 0xe9278 0xea600 0xeb988 0xecd10 0xee098 0xef420 0xf07a8 0xf1b30 0xf2eb8 0xf4240 0xf55c8 0xf6950 0xf7cd8 0xf9060 0xfa3e8 0xfb770 0xfcaf8 0xfde80 0xff208 0x100590 0x101918 0x102ca0 0x104028 0x1053b0 0x106738 0x107ac0 0x108e48 0x10a1d0 0x10b558 0x10c8e0 0x10dc68 0x10eff0 0x110378 0x111700 0x112a88 0x113e10 0x115198 0x116520 0x1178a8 0x118c30 0x119fb8 0x11b340 0x11c6c8 0x11da50 0x11edd8 0x120160 0x1214e8 0x122870 0x123bf8 0x124f80 0x126308 0x127690 0x128a18 0x129da0 0x12b128 0x12c4b0 0x12d838 0x12ebc0 0x12ff48 0x1312d0 0x132658 0x1339e0 0x134d68 0x1360f0 0x137478 0x138800 0x139b88 0x13af10 0x13c298 0x13d620 0x13e9a8 0x13fd30 0x1410b8 0x142440 0x1437c8 0x144b50 0x145ed8 0x147260 0x1485e8 0x149970 0x14acf8 0x14c080 0x14d408 0x14e790 0x14fb18 0x150ea0 0x152228 0x1535b0 0x154938 0x155cc0 0x157048 0x1583d0 0x159758 0x15aae0 0x15be68 0x15d1f0 0x15e578 0x15f900>;
				pmic-off-on-delay-us = <0x3e8>;
				pmic-enable-time-us = <0xb4>;
				pmic-eco-microamp = <0x2710>;
				pmic-valid-modes-mask = <0x06>;
				pmic-valid-idle-mask = <0x0d>;
				status = "disabled";
				phandle = <0x651>;
			};

			ldo0@19 {
				compatible = "pmic-ldo";
				reg = <0x19>;
				regulator-name = "ldo0";
				regulator-min-microvolt = <0x7a120>;
				regulator-max-microvolt = <0x113e10>;
				pmic-ctrl = <0x19 0x01 0x10>;
				pmic-vset = <0x5d 0x3f>;
				pmic-n-voltages = <0x40>;
				pmic-vset-table = <0x7a120 0x7c830 0x7ef40 0x81650 0x83d60 0x86470 0x88b80 0x8b290 0x8d9a0 0x900b0 0x927c0 0x94ed0 0x975e0 0x99cf0 0x9c400 0x9eb10 0xa1220 0xa3930 0xa6040 0xa8750 0xaae60 0xad570 0xafc80 0xb2390 0xb4aa0 0xb71b0 0xb98c0 0xbbfd0 0xbe6e0 0xc0df0 0xc3500 0xc5c10 0xc8320 0xcaa30 0xcd140 0xcf850 0xd1f60 0xd4670 0xd6d80 0xd9490 0xdbba0 0xde2b0 0xe09c0 0xe30d0 0xe57e0 0xe7ef0 0xea600 0xecd10 0xef420 0xf1b30 0xf4240 0xf6950 0xf9060 0xfb770 0xfde80 0x100590 0x102ca0 0x1053b0 0x107ac0 0x10a1d0 0x10c8e0 0x10eff0 0x111700 0x113e10>;
				pmic-off-on-delay-us = <0x3e8>;
				pmic-enable-time-us = <0x78>;
				pmic-eco-microamp = <0x2710>;
				pmic-valid-modes-mask = <0x06>;
				pmic-valid-idle-mask = <0x0d>;
				status = "disabled";
				phandle = <0x652>;
			};

			ldo1@1A {
				compatible = "pmic-ldo";
				reg = <0x1a>;
				regulator-name = "ldo1";
				regulator-min-microvolt = <0xe7ef0>;
				regulator-max-microvolt = <0x14689c>;
				pmic-ctrl = <0x1a 0x01 0x10>;
				pmic-vset = <0x5f 0x1f>;
				pmic-n-voltages = <0x20>;
				pmic-vset-table = <0xe7ef0 0xeafc4 0xee098 0xf116c 0xf4240 0xf7314 0xfa3e8 0xfd4bc 0x100590 0x103664 0x106738 0x10980c 0x10c8e0 0x10f9b4 0x112a88 0x115b5c 0x118c30 0x11bd04 0x11edd8 0x121eac 0x124f80 0x128054 0x12b128 0x12e1fc 0x1312d0 0x1343a4 0x137478 0x13a54c 0x13d620 0x1406f4 0x1437c8 0x14689c>;
				pmic-off-on-delay-us = <0x3e8>;
				pmic-enable-time-us = <0x78>;
				pmic-eco-microamp = <0x2710>;
				pmic-valid-modes-mask = <0x06>;
				pmic-valid-idle-mask = <0x0d>;
				status = "disabled";
				phandle = <0x653>;
			};

			ldo3@1B {
				compatible = "pmic-ldo";
				reg = <0x1b>;
				regulator-name = "ldo3";
				regulator-min-microvolt = <0x16e360>;
				regulator-max-microvolt = <0x1e8480>;
				pmic-ctrl = <0x1b 0x01 0x10>;
				pmic-vset = <0x60 0x0f>;
				pmic-n-voltages = <0x10>;
				pmic-vset-table = <0x16e360 0x17a6b0 0x186a00 0x192d50 0x19f0a0 0x1a5248 0x1ab3f0 0x1b1598 0x1b7740 0x1bd8e8 0x1c3a90 0x1c9c38 0x1cfde0 0x1d5f88 0x1dc130 0x1e8480>;
				pmic-off-on-delay-us = <0x3e8>;
				pmic-enable-time-us = <0x78>;
				pmic-eco-microamp = <0x2710>;
				pmic-valid-modes-mask = <0x06>;
				pmic-valid-idle-mask = <0x0d>;
				status = "disabled";
				phandle = <0x654>;
			};

			ldo4@1C {
				compatible = "pmic-ldo";
				reg = <0x1c>;
				regulator-name = "ldo4";
				regulator-min-microvolt = <0x16e360>;
				regulator-max-microvolt = <0x1e8480>;
				pmic-ctrl = <0x1c 0x01 0x10>;
				pmic-vset = <0x61 0x0f>;
				pmic-n-voltages = <0x10>;
				pmic-vset-table = <0x16e360 0x17a6b0 0x186a00 0x192d50 0x19f0a0 0x1a5248 0x1ab3f0 0x1b1598 0x1b7740 0x1bd8e8 0x1c3a90 0x1c9c38 0x1cfde0 0x1d5f88 0x1dc130 0x1e8480>;
				pmic-current-sense-support = <0x01>;
				pmic-current-sense-adc-channel-ctrl = <0x0e>;
				pmic-current-sense-channel-ctrl = <0x9c 0x0f 0x02>;
				pmic-current-sense-ctrl = <0x93c 0x40>;
				pmic-current-voltage-coefficient = <0x190>;
				pmic-current-sense-delay-time = <0x1f4>;
				pmic-off-on-delay-us = <0x3e8>;
				pmic-enable-time-us = <0x78>;
				pmic-eco-microamp = <0x2710>;
				pmic-valid-modes-mask = <0x06>;
				pmic-valid-idle-mask = <0x0d>;
				phandle = <0x655>;
			};

			ldo6@1D {
				compatible = "pmic-ldo";
				reg = <0x1d>;
				regulator-name = "ldo6";
				regulator-min-microvolt = <0x7a120>;
				regulator-max-microvolt = <0x113e10>;
				pmic-ctrl = <0x1d 0x01 0x10>;
				pmic-vset = <0x62 0x3f>;
				pmic-n-voltages = <0x40>;
				pmic-vset-table = <0x7a120 0x7c830 0x7ef40 0x81650 0x83d60 0x86470 0x88b80 0x8b290 0x8d9a0 0x900b0 0x927c0 0x94ed0 0x975e0 0x99cf0 0x9c400 0x9eb10 0xa1220 0xa3930 0xa6040 0xa8750 0xaae60 0xad570 0xafc80 0xb2390 0xb4aa0 0xb71b0 0xb98c0 0xbbfd0 0xbe6e0 0xc0df0 0xc3500 0xc5c10 0xc8320 0xcaa30 0xcd140 0xcf850 0xd1f60 0xd4670 0xd6d80 0xd9490 0xdbba0 0xde2b0 0xe09c0 0xe30d0 0xe57e0 0xe7ef0 0xea600 0xecd10 0xef420 0xf1b30 0xf4240 0xf6950 0xf9060 0xfb770 0xfde80 0x100590 0x102ca0 0x1053b0 0x107ac0 0x10a1d0 0x10c8e0 0x10eff0 0x111700 0x113e10>;
				pmic-off-on-delay-us = <0x3e8>;
				pmic-enable-time-us = <0x78>;
				pmic-eco-microamp = <0x2710>;
				pmic-valid-modes-mask = <0x06>;
				pmic-valid-idle-mask = <0x0d>;
				status = "disabled";
				phandle = <0x656>;
			};

			ldo8@1E {
				compatible = "pmic-ldo";
				reg = <0x1e>;
				regulator-name = "ldo8";
				regulator-min-microvolt = <0x16e360>;
				regulator-max-microvolt = <0x1e8480>;
				pmic-ctrl = <0x1e 0x01 0x10>;
				pmic-vset = <0x63 0x0f>;
				pmic-n-voltages = <0x10>;
				pmic-vset-table = <0x16e360 0x17a6b0 0x186a00 0x192d50 0x19f0a0 0x1a5248 0x1ab3f0 0x1b1598 0x1b7740 0x1bd8e8 0x1c3a90 0x1c9c38 0x1cfde0 0x1d5f88 0x1dc130 0x1e8480>;
				hisilicon,select = <0x05 0x50 0x10>;
				pmic-vset-1 = <0x63 0x1f>;
				regulator-min-microvolt-1 = <0x186a00>;
				regulator-max-microvolt-1 = <0x1e53ac>;
				pmic-n-voltages-1 = <0x20>;
				pmic-vset-table-1 = <0x186a00 0x189ad4 0x18cba8 0x18fc7c 0x192d50 0x195e24 0x198ef8 0x19bfcc 0x19f0a0 0x1a2174 0x1a5248 0x1a831c 0x1ab3f0 0x1ae4c4 0x1b1598 0x1b466c 0x1b7740 0x1ba814 0x1bd8e8 0x1c09bc 0x1c3a90 0x1c6b64 0x1c9c38 0x1ccd0c 0x1cfde0 0x1d2eb4 0x1d5f88 0x1d905c 0x1dc130 0x1df204 0x1e22d8 0x1e53ac>;
				pmic-off-on-delay-us = <0x3e8>;
				pmic-enable-time-us = <0x78>;
				pmic-eco-microamp = <0x2710>;
				pmic-valid-modes-mask = <0x06>;
				pmic-valid-idle-mask = <0x0d>;
				status = "disabled";
				phandle = <0x657>;
			};

			ldo11@1F {
				compatible = "pmic-ldo";
				reg = <0x1f>;
				regulator-name = "ldo11";
				regulator-min-microvolt = <0x1a5248>;
				regulator-max-microvolt = <0x325aa0>;
				pmic-ctrl = <0x1f 0x01 0x10>;
				pmic-vset = <0x64 0x3f>;
				pmic-n-voltages = <0x40>;
				pmic-vset-table = <0x1a5248 0x1ab3f0 0x1b1598 0x1b7740 0x1bd8e8 0x1c3a90 0x1c9c38 0x1cfde0 0x1d5f88 0x1dc130 0x1e22d8 0x1e8480 0x1ee628 0x1f47d0 0x1fa978 0x200b20 0x206cc8 0x20ce70 0x213018 0x2191c0 0x21f368 0x225510 0x22b6b8 0x231860 0x237a08 0x23dbb0 0x243d58 0x249f00 0x2500a8 0x256250 0x25c3f8 0x2625a0 0x268748 0x26e8f0 0x274a98 0x27ac40 0x280de8 0x286f90 0x28d138 0x2932e0 0x299488 0x29f630 0x2a57d8 0x2ab980 0x2b1b28 0x2b7cd0 0x2bde78 0x2c4020 0x2ca1c8 0x2d0370 0x2d6518 0x2dc6c0 0x2e2868 0x2e8a10 0x2eebb8 0x2f4d60 0x2faf08 0x3010b0 0x307258 0x30d400 0x3135a8 0x319750 0x31f8f8 0x325aa0>;
				pmic-off-on-delay-us = <0x3e8>;
				pmic-enable-time-us = <0x168>;
				pmic-eco-microamp = <0x2710>;
				pmic-valid-modes-mask = <0x06>;
				pmic-valid-idle-mask = <0x0d>;
				status = "ok";
				phandle = <0x15b>;
			};

			ldo12@20 {
				compatible = "pmic-ldo";
				reg = <0x20>;
				regulator-name = "ldo12";
				regulator-min-microvolt = <0x1a5248>;
				regulator-max-microvolt = <0x325aa0>;
				pmic-ctrl = <0x20 0x01 0x10>;
				pmic-vset = <0x65 0x3f>;
				pmic-n-voltages = <0x40>;
				pmic-vset-table = <0x1a5248 0x1ab3f0 0x1b1598 0x1b7740 0x1bd8e8 0x1c3a90 0x1c9c38 0x1cfde0 0x1d5f88 0x1dc130 0x1e22d8 0x1e8480 0x1ee628 0x1f47d0 0x1fa978 0x200b20 0x206cc8 0x20ce70 0x213018 0x2191c0 0x21f368 0x225510 0x22b6b8 0x231860 0x237a08 0x23dbb0 0x243d58 0x249f00 0x2500a8 0x256250 0x25c3f8 0x2625a0 0x268748 0x26e8f0 0x274a98 0x27ac40 0x280de8 0x286f90 0x28d138 0x2932e0 0x299488 0x29f630 0x2a57d8 0x2ab980 0x2b1b28 0x2b7cd0 0x2bde78 0x2c4020 0x2ca1c8 0x2d0370 0x2d6518 0x2dc6c0 0x2e2868 0x2e8a10 0x2eebb8 0x2f4d60 0x2faf08 0x3010b0 0x307258 0x30d400 0x3135a8 0x319750 0x31f8f8 0x325aa0>;
				pmic-off-on-delay-us = <0x3e8>;
				pmic-enable-time-us = <0x168>;
				pmic-eco-microamp = <0x2710>;
				pmic-valid-modes-mask = <0x06>;
				pmic-valid-idle-mask = <0x0d>;
				status = "ok";
				phandle = <0x15c>;
			};

			ldo14@21 {
				compatible = "pmic-ldo";
				reg = <0x21>;
				regulator-name = "ldo14";
				regulator-min-microvolt = <0x1a5248>;
				regulator-max-microvolt = <0x325aa0>;
				pmic-ctrl = <0x21 0x01 0x10>;
				pmic-vset = <0x66 0x3f>;
				pmic-n-voltages = <0x40>;
				pmic-vset-table = <0x1a5248 0x1ab3f0 0x1b1598 0x1b7740 0x1bd8e8 0x1c3a90 0x1c9c38 0x1cfde0 0x1d5f88 0x1dc130 0x1e22d8 0x1e8480 0x1ee628 0x1f47d0 0x1fa978 0x200b20 0x206cc8 0x20ce70 0x213018 0x2191c0 0x21f368 0x225510 0x22b6b8 0x231860 0x237a08 0x23dbb0 0x243d58 0x249f00 0x2500a8 0x256250 0x25c3f8 0x2625a0 0x268748 0x26e8f0 0x274a98 0x27ac40 0x280de8 0x286f90 0x28d138 0x2932e0 0x299488 0x29f630 0x2a57d8 0x2ab980 0x2b1b28 0x2b7cd0 0x2bde78 0x2c4020 0x2ca1c8 0x2d0370 0x2d6518 0x2dc6c0 0x2e2868 0x2e8a10 0x2eebb8 0x2f4d60 0x2faf08 0x3010b0 0x307258 0x30d400 0x3135a8 0x319750 0x31f8f8 0x325aa0>;
				pmic-off-on-delay-us = <0x3e8>;
				pmic-enable-time-us = <0x78>;
				pmic-eco-microamp = <0x2710>;
				pmic-valid-modes-mask = <0x06>;
				pmic-valid-idle-mask = <0x0d>;
				status = "disabled";
				phandle = <0x658>;
			};

			ldo15@22 {
				compatible = "pmic-ldo";
				reg = <0x22>;
				regulator-name = "ldo15";
				regulator-always-on;
				regulator-min-microvolt = <0x1a5248>;
				regulator-max-microvolt = <0x325aa0>;
				pmic-ctrl = <0x22 0x01 0x10>;
				pmic-vset = <0x67 0x3f>;
				pmic-n-voltages = <0x40>;
				pmic-vset-table = <0x1a5248 0x1ab3f0 0x1b1598 0x1b7740 0x1bd8e8 0x1c3a90 0x1c9c38 0x1cfde0 0x1d5f88 0x1dc130 0x1e22d8 0x1e8480 0x1ee628 0x1f47d0 0x1fa978 0x200b20 0x206cc8 0x20ce70 0x213018 0x2191c0 0x21f368 0x225510 0x22b6b8 0x231860 0x237a08 0x23dbb0 0x243d58 0x249f00 0x2500a8 0x256250 0x25c3f8 0x2625a0 0x268748 0x26e8f0 0x274a98 0x27ac40 0x280de8 0x286f90 0x28d138 0x2932e0 0x299488 0x29f630 0x2a57d8 0x2ab980 0x2b1b28 0x2b7cd0 0x2bde78 0x2c4020 0x2ca1c8 0x2d0370 0x2d6518 0x2dc6c0 0x2e2868 0x2e8a10 0x2eebb8 0x2f4d60 0x2faf08 0x3010b0 0x307258 0x30d400 0x3135a8 0x319750 0x31f8f8 0x325aa0>;
				pmic-off-on-delay-us = <0x3e8>;
				pmic-enable-time-us = <0x78>;
				pmic-eco-microamp = <0x2710>;
				pmic-valid-modes-mask = <0x06>;
				pmic-valid-idle-mask = <0x0d>;
				phandle = <0x13f>;
			};

			ldo16@23 {
				status = "ok";
				compatible = "pmic-ldo";
				reg = <0x23>;
				regulator-name = "ldo16";
				regulator-min-microvolt = <0x1a5248>;
				regulator-max-microvolt = <0x325aa0>;
				pmic-ctrl = <0x23 0x01 0x10>;
				pmic-vset = <0x68 0x3f>;
				pmic-n-voltages = <0x40>;
				pmic-vset-table = <0x1a5248 0x1ab3f0 0x1b1598 0x1b7740 0x1bd8e8 0x1c3a90 0x1c9c38 0x1cfde0 0x1d5f88 0x1dc130 0x1e22d8 0x1e8480 0x1ee628 0x1f47d0 0x1fa978 0x200b20 0x206cc8 0x20ce70 0x213018 0x2191c0 0x21f368 0x225510 0x22b6b8 0x231860 0x237a08 0x23dbb0 0x243d58 0x249f00 0x2500a8 0x256250 0x25c3f8 0x2625a0 0x268748 0x26e8f0 0x274a98 0x27ac40 0x280de8 0x286f90 0x28d138 0x2932e0 0x299488 0x29f630 0x2a57d8 0x2ab980 0x2b1b28 0x2b7cd0 0x2bde78 0x2c4020 0x2ca1c8 0x2d0370 0x2d6518 0x2dc6c0 0x2e2868 0x2e8a10 0x2eebb8 0x2f4d60 0x2faf08 0x3010b0 0x307258 0x30d400 0x3135a8 0x319750 0x31f8f8 0x325aa0>;
				pmic-off-on-delay-us = <0x3e8>;
				pmic-enable-time-us = <0x78>;
				pmic-eco-microamp = <0x2710>;
				pmic-valid-modes-mask = <0x06>;
				pmic-valid-idle-mask = <0x0d>;
				phandle = <0x124>;
			};

			ldo17@24 {
				compatible = "pmic-ldo";
				reg = <0x24>;
				regulator-name = "ldo17";
				regulator-min-microvolt = <0x1a5248>;
				regulator-max-microvolt = <0x325aa0>;
				pmic-ctrl = <0x24 0x01 0x10>;
				pmic-vset = <0x69 0x3f>;
				pmic-n-voltages = <0x40>;
				pmic-vset-table = <0x1a5248 0x1ab3f0 0x1b1598 0x1b7740 0x1bd8e8 0x1c3a90 0x1c9c38 0x1cfde0 0x1d5f88 0x1dc130 0x1e22d8 0x1e8480 0x1ee628 0x1f47d0 0x1fa978 0x200b20 0x206cc8 0x20ce70 0x213018 0x2191c0 0x21f368 0x225510 0x22b6b8 0x231860 0x237a08 0x23dbb0 0x243d58 0x249f00 0x2500a8 0x256250 0x25c3f8 0x2625a0 0x268748 0x26e8f0 0x274a98 0x27ac40 0x280de8 0x286f90 0x28d138 0x2932e0 0x299488 0x29f630 0x2a57d8 0x2ab980 0x2b1b28 0x2b7cd0 0x2bde78 0x2c4020 0x2ca1c8 0x2d0370 0x2d6518 0x2dc6c0 0x2e2868 0x2e8a10 0x2eebb8 0x2f4d60 0x2faf08 0x3010b0 0x307258 0x30d400 0x3135a8 0x319750 0x31f8f8 0x325aa0>;
				pmic-current-sense-support = <0x01>;
				pmic-current-sense-adc-channel-ctrl = <0x0e>;
				pmic-current-sense-channel-ctrl = <0x9c 0x0f 0x03>;
				pmic-current-sense-ctrl = <0x947 0x08>;
				pmic-current-voltage-coefficient = <0x3e8>;
				pmic-current-sense-delay-time = <0x1f4>;
				pmic-off-on-delay-us = <0x3e8>;
				pmic-enable-time-us = <0x78>;
				pmic-eco-microamp = <0x2710>;
				pmic-valid-modes-mask = <0x06>;
				pmic-valid-idle-mask = <0x0d>;
				phandle = <0x659>;
			};

			ldo18@25 {
				compatible = "pmic-ldo";
				reg = <0x25>;
				regulator-name = "ldo18";
				regulator-always-on;
				regulator-min-microvolt = <0x19f0a0>;
				regulator-max-microvolt = <0x1cfde0>;
				pmic-ctrl = <0x25 0x01 0x10>;
				pmic-vset = <0x6a 0x07>;
				pmic-n-voltages = <0x08>;
				pmic-vset-table = <0x19f0a0 0x1ab3f0 0x1b1598 0x1b7740 0x1bd8e8 0x1c3a90 0x1c9c38 0x1cfde0>;
				pmic-off-on-delay-us = <0x3e8>;
				pmic-enable-time-us = <0x78>;
				pmic-eco-microamp = <0x2710>;
				pmic-valid-modes-mask = <0x06>;
				pmic-valid-idle-mask = <0x0d>;
				status = "disabled";
				phandle = <0x65a>;
			};

			ldo21@26 {
				compatible = "pmic-ldo";
				reg = <0x26>;
				regulator-name = "ldo21";
				regulator-min-microvolt = <0x16e360>;
				regulator-max-microvolt = <0x1e8480>;
				pmic-ctrl = <0x26 0x01 0x10>;
				pmic-vset = <0x6b 0x0f>;
				pmic-n-voltages = <0x10>;
				pmic-vset-table = <0x16e360 0x17a6b0 0x186a00 0x192d50 0x19f0a0 0x1a5248 0x1ab3f0 0x1b1598 0x1b7740 0x1bd8e8 0x1c3a90 0x1c9c38 0x1cfde0 0x1d5f88 0x1dc130 0x1e8480>;
				pmic-current-sense-support = <0x01>;
				pmic-current-sense-adc-channel-ctrl = <0x0e>;
				pmic-current-sense-channel-ctrl = <0x9c 0x0f 0x04>;
				pmic-current-sense-ctrl = <0x949 0x40>;
				pmic-current-voltage-coefficient = <0x190>;
				pmic-current-sense-delay-time = <0x1f4>;
				pmic-off-on-delay-us = <0x3e8>;
				pmic-enable-time-us = <0x78>;
				pmic-eco-microamp = <0x2710>;
				pmic-valid-modes-mask = <0x06>;
				pmic-valid-idle-mask = <0x0d>;
				phandle = <0x65b>;
			};

			ldo22@27 {
				compatible = "pmic-ldo";
				reg = <0x27>;
				regulator-name = "ldo22";
				regulator-min-microvolt = <0x118c30>;
				regulator-max-microvolt = <0x13d620>;
				pmic-ctrl = <0x27 0x01 0x00>;
				pmic-vset = <0x6c 0x0f>;
				pmic-n-voltages = <0x10>;
				pmic-vset-table = <0x118c30 0x11b340 0x11da50 0x120160 0x122870 0x124f80 0x127690 0x129da0 0x12c4b0 0x12ebc0 0x1312d0 0x1339e0 0x1360f0 0x138800 0x13af10 0x13d620>;
				pmic-off-on-delay-us = <0x3e8>;
				pmic-enable-time-us = <0x78>;
				pmic-eco-microamp = <0x2710>;
				pmic-valid-modes-mask = <0x06>;
				pmic-valid-idle-mask = <0x0d>;
				status = "ok";
				phandle = <0x65c>;
			};

			ldo23@28 {
				compatible = "pmic-ldo";
				reg = <0x28>;
				regulator-name = "ldo23";
				regulator-min-microvolt = <0x1a5248>;
				regulator-max-microvolt = <0x325aa0>;
				pmic-ctrl = <0x28 0x01 0x10>;
				pmic-vset = <0x6d 0x3f>;
				pmic-n-voltages = <0x40>;
				pmic-vset-table = <0x1a5248 0x1ab3f0 0x1b1598 0x1b7740 0x1bd8e8 0x1c3a90 0x1c9c38 0x1cfde0 0x1d5f88 0x1dc130 0x1e22d8 0x1e8480 0x1ee628 0x1f47d0 0x1fa978 0x200b20 0x206cc8 0x20ce70 0x213018 0x2191c0 0x21f368 0x225510 0x22b6b8 0x231860 0x237a08 0x23dbb0 0x243d58 0x249f00 0x2500a8 0x256250 0x25c3f8 0x2625a0 0x268748 0x26e8f0 0x274a98 0x27ac40 0x280de8 0x286f90 0x28d138 0x2932e0 0x299488 0x29f630 0x2a57d8 0x2ab980 0x2b1b28 0x2b7cd0 0x2bde78 0x2c4020 0x2ca1c8 0x2d0370 0x2d6518 0x2dc6c0 0x2e2868 0x2e8a10 0x2eebb8 0x2f4d60 0x2faf08 0x3010b0 0x307258 0x30d400 0x3135a8 0x319750 0x31f8f8 0x325aa0>;
				pmic-off-on-delay-us = <0x3e8>;
				pmic-enable-time-us = <0x78>;
				pmic-eco-microamp = <0x2710>;
				pmic-valid-modes-mask = <0x06>;
				pmic-valid-idle-mask = <0x0d>;
				phandle = <0x14a>;
			};

			ldo24@29 {
				compatible = "pmic-ldo";
				reg = <0x29>;
				regulator-name = "ldo24";
				regulator-min-microvolt = <0x1a5248>;
				regulator-max-microvolt = <0x325aa0>;
				pmic-ctrl = <0x29 0x01 0x10>;
				pmic-vset = <0x6e 0x3f>;
				pmic-n-voltages = <0x40>;
				pmic-vset-table = <0x1a5248 0x1ab3f0 0x1b1598 0x1b7740 0x1bd8e8 0x1c3a90 0x1c9c38 0x1cfde0 0x1d5f88 0x1dc130 0x1e22d8 0x1e8480 0x1ee628 0x1f47d0 0x1fa978 0x200b20 0x206cc8 0x20ce70 0x213018 0x2191c0 0x21f368 0x225510 0x22b6b8 0x231860 0x237a08 0x23dbb0 0x243d58 0x249f00 0x2500a8 0x256250 0x25c3f8 0x2625a0 0x268748 0x26e8f0 0x274a98 0x27ac40 0x280de8 0x286f90 0x28d138 0x2932e0 0x299488 0x29f630 0x2a57d8 0x2ab980 0x2b1b28 0x2b7cd0 0x2bde78 0x2c4020 0x2ca1c8 0x2d0370 0x2d6518 0x2dc6c0 0x2e2868 0x2e8a10 0x2eebb8 0x2f4d60 0x2faf08 0x3010b0 0x307258 0x30d400 0x3135a8 0x319750 0x31f8f8 0x325aa0>;
				pmic-off-on-delay-us = <0x3e8>;
				pmic-enable-time-us = <0x78>;
				pmic-eco-microamp = <0x2710>;
				pmic-valid-modes-mask = <0x06>;
				pmic-valid-idle-mask = <0x0d>;
				phandle = <0x65d>;
			};

			ldo25@2A {
				compatible = "pmic-ldo";
				reg = <0x2a>;
				regulator-name = "ldo25";
				regulator-min-microvolt = <0x10a1d0>;
				regulator-max-microvolt = <0x13d620>;
				pmic-ctrl = <0x2a 0x01 0x00>;
				pmic-vset = <0x6f 0x0f>;
				pmic-n-voltages = <0x10>;
				pmic-vset-table = <0x10a1d0 0x10c8e0 0x10eff0 0x120160 0x122870 0x124f80 0x127690 0x129da0 0x12c4b0 0x12ebc0 0x1312d0 0x1339e0 0x1360f0 0x138800 0x13af10 0x13d620>;
				hisilicon,select = <0x05 0x50 0x10>;
				pmic-vset-1 = <0x6f 0x1f>;
				regulator-min-microvolt-1 = <0xe7ef0>;
				regulator-max-microvolt-1 = <0x14689c>;
				pmic-n-voltages-1 = <0x20>;
				pmic-vset-table-1 = <0xe7ef0 0xeafc4 0xee098 0xf116c 0xf4240 0xf7314 0xfa3e8 0xfd4bc 0x100590 0x103664 0x106738 0x10980c 0x10c8e0 0x10f9b4 0x112a88 0x115b5c 0x118c30 0x11bd04 0x11edd8 0x121eac 0x124f80 0x128054 0x12b128 0x12e1fc 0x1312d0 0x1343a4 0x137478 0x13a54c 0x13d620 0x1406f4 0x1437c8 0x14689c>;
				pmic-off-on-delay-us = <0x3e8>;
				pmic-enable-time-us = <0x78>;
				pmic-eco-microamp = <0x2710>;
				pmic-valid-modes-mask = <0x02>;
				pmic-valid-idle-mask = <0x09>;
				status = "ok";
				phandle = <0x65e>;
			};

			ldo26@2B {
				compatible = "pmic-ldo";
				reg = <0x2b>;
				regulator-name = "ldo26";
				regulator-min-microvolt = <0x118c30>;
				regulator-max-microvolt = <0x13d620>;
				pmic-ctrl = <0x2b 0x01 0x10>;
				pmic-vset = <0x70 0x0f>;
				pmic-n-voltages = <0x10>;
				pmic-vset-table = <0x118c30 0x11b340 0x11da50 0x120160 0x122870 0x124f80 0x127690 0x129da0 0x12c4b0 0x12ebc0 0x1312d0 0x1339e0 0x1360f0 0x138800 0x13af10 0x13d620>;
				pmic-off-on-delay-us = <0x3e8>;
				pmic-enable-time-us = <0x78>;
				pmic-eco-microamp = <0x2710>;
				pmic-valid-modes-mask = <0x02>;
				pmic-valid-idle-mask = <0x09>;
				status = "disabled";
				phandle = <0x65f>;
			};

			ldo27@2C {
				compatible = "pmic-ldo";
				reg = <0x2c>;
				regulator-name = "ldo27";
				regulator-min-microvolt = <0x19f0a0>;
				regulator-max-microvolt = <0x1cfde0>;
				pmic-ctrl = <0x2c 0x01 0x10>;
				pmic-vset = <0x71 0x07>;
				pmic-n-voltages = <0x08>;
				pmic-vset-table = <0x19f0a0 0x1ab3f0 0x1b1598 0x1b7740 0x1bd8e8 0x1c3a90 0x1c9c38 0x1cfde0>;
				pmic-off-on-delay-us = <0x3e8>;
				pmic-enable-time-us = <0x78>;
				pmic-eco-microamp = <0x2710>;
				pmic-valid-modes-mask = <0x06>;
				pmic-valid-idle-mask = <0x0d>;
				status = "disabled";
				phandle = <0x660>;
			};

			ldo28@2D {
				compatible = "pmic-ldo";
				reg = <0x2d>;
				regulator-name = "ldo28";
				regulator-min-microvolt = <0x19f0a0>;
				regulator-max-microvolt = <0x1cfde0>;
				pmic-ctrl = <0x2d 0x01 0x10>;
				pmic-vset = <0x72 0x07>;
				pmic-n-voltages = <0x08>;
				pmic-vset-table = <0x19f0a0 0x1ab3f0 0x1b1598 0x1b7740 0x1bd8e8 0x1c3a90 0x1c9c38 0x1cfde0>;
				pmic-off-on-delay-us = <0x3e8>;
				pmic-enable-time-us = <0x78>;
				pmic-eco-microamp = <0x2710>;
				pmic-valid-modes-mask = <0x06>;
				pmic-valid-idle-mask = <0x0d>;
				status = "disabled";
				phandle = <0x661>;
			};

			ldo29@2E {
				compatible = "pmic-ldo";
				reg = <0x2e>;
				regulator-name = "ldo29";
				regulator-min-microvolt = <0xe7ef0>;
				regulator-max-microvolt = <0x14689c>;
				pmic-ctrl = <0x2e 0x01 0x10>;
				pmic-vset = <0x73 0x1f>;
				pmic-n-voltages = <0x20>;
				pmic-vset-table = <0xe7ef0 0xeafc4 0xee098 0xf116c 0xf4240 0xf7314 0xfa3e8 0xfd4bc 0x100590 0x103664 0x106738 0x10980c 0x10c8e0 0x10f9b4 0x112a88 0x115b5c 0x118c30 0x11bd04 0x11edd8 0x121eac 0x124f80 0x128054 0x12b128 0x12e1fc 0x1312d0 0x1343a4 0x137478 0x13a54c 0x13d620 0x1406f4 0x1437c8 0x14689c>;
				pmic-off-on-delay-us = <0x3e8>;
				pmic-enable-time-us = <0x78>;
				pmic-eco-microamp = <0x2710>;
				pmic-valid-modes-mask = <0x06>;
				pmic-valid-idle-mask = <0x0d>;
				phandle = <0x662>;
			};

			ldo30@2F {
				compatible = "pmic-ldo";
				reg = <0x2f>;
				regulator-name = "ldo30";
				regulator-min-microvolt = <0x7a120>;
				regulator-max-microvolt = <0x113e10>;
				pmic-ctrl = <0x2f 0x01 0x10>;
				pmic-vset = <0x74 0x3f>;
				pmic-n-voltages = <0x40>;
				pmic-vset-table = <0x7a120 0x7c830 0x7ef40 0x81650 0x83d60 0x86470 0x88b80 0x8b290 0x8d9a0 0x900b0 0x927c0 0x94ed0 0x975e0 0x99cf0 0x9c400 0x9eb10 0xa1220 0xa3930 0xa6040 0xa8750 0xaae60 0xad570 0xafc80 0xb2390 0xb4aa0 0xb71b0 0xb98c0 0xbbfd0 0xbe6e0 0xc0df0 0xc3500 0xc5c10 0xc8320 0xcaa30 0xcd140 0xcf850 0xd1f60 0xd4670 0xd6d80 0xd9490 0xdbba0 0xde2b0 0xe09c0 0xe30d0 0xe57e0 0xe7ef0 0xea600 0xecd10 0xef420 0xf1b30 0xf4240 0xf6950 0xf9060 0xfb770 0xfde80 0x100590 0x102ca0 0x1053b0 0x107ac0 0x10a1d0 0x10c8e0 0x10eff0 0x111700 0x113e10>;
				pmic-off-on-delay-us = <0x3e8>;
				pmic-enable-time-us = <0x78>;
				pmic-eco-microamp = <0x2710>;
				pmic-valid-modes-mask = <0x06>;
				pmic-valid-idle-mask = <0x0d>;
				status = "disabled";
				phandle = <0x663>;
			};

			ldo32@30 {
				compatible = "pmic-ldo";
				reg = <0x30>;
				regulator-name = "ldo32";
				regulator-min-microvolt = <0xe7ef0>;
				regulator-max-microvolt = <0x14689c>;
				pmic-ctrl = <0x30 0x01 0x10>;
				pmic-vset = <0x76 0x1f>;
				pmic-n-voltages = <0x20>;
				pmic-vset-table = <0xe7ef0 0xeafc4 0xee098 0xf116c 0xf4240 0xf7314 0xfa3e8 0xfd4bc 0x100590 0x103664 0x106738 0x10980c 0x10c8e0 0x10f9b4 0x112a88 0x115b5c 0x118c30 0x11bd04 0x11edd8 0x121eac 0x124f80 0x128054 0x12b128 0x12e1fc 0x1312d0 0x1343a4 0x137478 0x13a54c 0x13d620 0x1406f4 0x1437c8 0x14689c>;
				pmic-current-sense-support = <0x01>;
				pmic-current-sense-adc-channel-ctrl = <0x0e>;
				pmic-current-sense-channel-ctrl = <0x9c 0x0f 0x05>;
				pmic-current-sense-ctrl = <0x95f 0x10>;
				pmic-current-voltage-coefficient = <0x154>;
				pmic-current-sense-delay-time = <0x1f4>;
				pmic-off-on-delay-us = <0x3e8>;
				pmic-enable-time-us = <0x78>;
				pmic-eco-microamp = <0x2710>;
				pmic-valid-modes-mask = <0x06>;
				pmic-valid-idle-mask = <0x0d>;
				phandle = <0x664>;
			};

			ldo36@32 {
				compatible = "pmic-ldo";
				reg = <0x32>;
				regulator-name = "ldo36";
				regulator-min-microvolt = <0x10c8e0>;
				regulator-max-microvolt = <0x1583d0>;
				pmic-ctrl = <0x32 0x01 0x10>;
				pmic-vset = <0x78 0x1f>;
				pmic-n-voltages = <0x20>;
				pmic-vset-table = <0x10c8e0 0x10eff0 0x111700 0x113e10 0x116520 0x118c30 0x11b340 0x11da50 0x120160 0x122870 0x124f80 0x127690 0x129da0 0x12c4b0 0x12ebc0 0x1312d0 0x1339e0 0x1360f0 0x138800 0x13af10 0x13d620 0x13fd30 0x142440 0x144b50 0x147260 0x149970 0x14c080 0x14e790 0x150ea0 0x1535b0 0x155cc0 0x1583d0>;
				pmic-off-on-delay-us = <0x3e8>;
				pmic-enable-time-us = <0x78>;
				pmic-eco-microamp = <0x2710>;
				pmic-valid-modes-mask = <0x06>;
				pmic-valid-idle-mask = <0x0d>;
				status = "disabled";
				phandle = <0x665>;
			};

			ldo37@33 {
				compatible = "pmic-ldo";
				reg = <0x33>;
				regulator-name = "ldo37";
				regulator-min-microvolt = <0x10c8e0>;
				regulator-max-microvolt = <0x1583d0>;
				pmic-ctrl = <0x33 0x01 0x10>;
				pmic-vset = <0x79 0x1f>;
				pmic-n-voltages = <0x20>;
				pmic-vset-table = <0x10c8e0 0x10eff0 0x111700 0x113e10 0x116520 0x118c30 0x11b340 0x11da50 0x120160 0x122870 0x124f80 0x127690 0x129da0 0x12c4b0 0x12ebc0 0x1312d0 0x1339e0 0x1360f0 0x138800 0x13af10 0x13d620 0x13fd30 0x142440 0x144b50 0x147260 0x149970 0x14c080 0x14e790 0x150ea0 0x1535b0 0x155cc0 0x1583d0>;
				pmic-off-on-delay-us = <0x3e8>;
				pmic-enable-time-us = <0x78>;
				pmic-eco-microamp = <0x2710>;
				pmic-valid-modes-mask = <0x06>;
				pmic-valid-idle-mask = <0x0d>;
				status = "disabled";
				phandle = <0x666>;
			};

			ldo38@34 {
				compatible = "pmic-ldo";
				reg = <0x34>;
				regulator-name = "ldo38";
				regulator-always-on;
				regulator-min-microvolt = <0xe7ef0>;
				regulator-max-microvolt = <0x14689c>;
				pmic-ctrl = <0x34 0x01 0x10>;
				pmic-vset = <0x7a 0x1f>;
				pmic-n-voltages = <0x20>;
				pmic-vset-table = <0xe7ef0 0xeafc4 0xee098 0xf116c 0xf4240 0xf7314 0xfa3e8 0xfd4bc 0x100590 0x103664 0x106738 0x10980c 0x10c8e0 0x10f9b4 0x112a88 0x115b5c 0x118c30 0x11bd04 0x11edd8 0x121eac 0x124f80 0x128054 0x12b128 0x12e1fc 0x1312d0 0x1343a4 0x137478 0x13a54c 0x13d620 0x1406f4 0x1437c8 0x14689c>;
				pmic-off-on-delay-us = <0x3e8>;
				pmic-enable-time-us = <0x78>;
				pmic-eco-microamp = <0x2710>;
				pmic-valid-modes-mask = <0x06>;
				pmic-valid-idle-mask = <0x0d>;
				phandle = <0x667>;
			};

			ldo41@36 {
				compatible = "pmic-ldo";
				reg = <0x36>;
				regulator-name = "ldo41";
				regulator-min-microvolt = <0xe7ef0>;
				regulator-max-microvolt = <0x14689c>;
				pmic-ctrl = <0x36 0x01 0x10>;
				pmic-vset = <0x7d 0x1f>;
				pmic-n-voltages = <0x20>;
				pmic-vset-table = <0xe7ef0 0xeafc4 0xee098 0xf116c 0xf4240 0xf7314 0xfa3e8 0xfd4bc 0x100590 0x103664 0x106738 0x10980c 0x10c8e0 0x10f9b4 0x112a88 0x115b5c 0x118c30 0x11bd04 0x11edd8 0x121eac 0x124f80 0x128054 0x12b128 0x12e1fc 0x1312d0 0x1343a4 0x137478 0x13a54c 0x13d620 0x1406f4 0x1437c8 0x14689c>;
				pmic-off-on-delay-us = <0x3e8>;
				pmic-enable-time-us = <0x78>;
				pmic-eco-microamp = <0x2710>;
				pmic-valid-modes-mask = <0x06>;
				pmic-valid-idle-mask = <0x0d>;
				status = "ok";
				phandle = <0x668>;
			};

			ldo42@37 {
				compatible = "pmic-ldo";
				reg = <0x37>;
				regulator-name = "ldo42";
				regulator-min-microvolt = <0x7a120>;
				regulator-max-microvolt = <0x113e10>;
				pmic-ctrl = <0x37 0x01 0x10>;
				pmic-vset = <0x7e 0x3f>;
				pmic-n-voltages = <0x40>;
				pmic-vset-table = <0x7a120 0x7c830 0x7ef40 0x81650 0x83d60 0x86470 0x88b80 0x8b290 0x8d9a0 0x900b0 0x927c0 0x94ed0 0x975e0 0x99cf0 0x9c400 0x9eb10 0xa1220 0xa3930 0xa6040 0xa8750 0xaae60 0xad570 0xafc80 0xb2390 0xb4aa0 0xb71b0 0xb98c0 0xbbfd0 0xbe6e0 0xc0df0 0xc3500 0xc5c10 0xc8320 0xcaa30 0xcd140 0xcf850 0xd1f60 0xd4670 0xd6d80 0xd9490 0xdbba0 0xde2b0 0xe09c0 0xe30d0 0xe57e0 0xe7ef0 0xea600 0xecd10 0xef420 0xf1b30 0xf4240 0xf6950 0xf9060 0xfb770 0xfde80 0x100590 0x102ca0 0x1053b0 0x107ac0 0x10a1d0 0x10c8e0 0x10eff0 0x111700 0x113e10>;
				pmic-off-on-delay-us = <0x3e8>;
				pmic-enable-time-us = <0x78>;
				pmic-eco-microamp = <0x2710>;
				pmic-valid-modes-mask = <0x06>;
				pmic-valid-idle-mask = <0x0d>;
				status = "disabled";
				phandle = <0x669>;
			};

			ldo43@38 {
				compatible = "pmic-ldo";
				reg = <0x38>;
				regulator-name = "ldo43";
				regulator-min-microvolt = <0x7a120>;
				regulator-max-microvolt = <0x113e10>;
				pmic-ctrl = <0x38 0x01 0x10>;
				pmic-vset = <0x7f 0x3f>;
				pmic-n-voltages = <0x40>;
				pmic-vset-table = <0x7a120 0x7c830 0x7ef40 0x81650 0x83d60 0x86470 0x88b80 0x8b290 0x8d9a0 0x900b0 0x927c0 0x94ed0 0x975e0 0x99cf0 0x9c400 0x9eb10 0xa1220 0xa3930 0xa6040 0xa8750 0xaae60 0xad570 0xafc80 0xb2390 0xb4aa0 0xb71b0 0xb98c0 0xbbfd0 0xbe6e0 0xc0df0 0xc3500 0xc5c10 0xc8320 0xcaa30 0xcd140 0xcf850 0xd1f60 0xd4670 0xd6d80 0xd9490 0xdbba0 0xde2b0 0xe09c0 0xe30d0 0xe57e0 0xe7ef0 0xea600 0xecd10 0xef420 0xf1b30 0xf4240 0xf6950 0xf9060 0xfb770 0xfde80 0x100590 0x102ca0 0x1053b0 0x107ac0 0x10a1d0 0x10c8e0 0x10eff0 0x111700 0x113e10>;
				pmic-off-on-delay-us = <0x3e8>;
				pmic-enable-time-us = <0x78>;
				pmic-eco-microamp = <0x2710>;
				pmic-valid-modes-mask = <0x06>;
				pmic-valid-idle-mask = <0x0d>;
				status = "disabled";
				phandle = <0x66a>;
			};

			ldo44@39 {
				compatible = "pmic-ldo";
				reg = <0x39>;
				regulator-name = "ldo44";
				regulator-min-microvolt = <0x7a120>;
				regulator-max-microvolt = <0x113e10>;
				pmic-ctrl = <0x39 0x01 0x10>;
				pmic-vset = <0x80 0x3f>;
				pmic-n-voltages = <0x40>;
				pmic-vset-table = <0x7a120 0x7c830 0x7ef40 0x81650 0x83d60 0x86470 0x88b80 0x8b290 0x8d9a0 0x900b0 0x927c0 0x94ed0 0x975e0 0x99cf0 0x9c400 0x9eb10 0xa1220 0xa3930 0xa6040 0xa8750 0xaae60 0xad570 0xafc80 0xb2390 0xb4aa0 0xb71b0 0xb98c0 0xbbfd0 0xbe6e0 0xc0df0 0xc3500 0xc5c10 0xc8320 0xcaa30 0xcd140 0xcf850 0xd1f60 0xd4670 0xd6d80 0xd9490 0xdbba0 0xde2b0 0xe09c0 0xe30d0 0xe57e0 0xe7ef0 0xea600 0xecd10 0xef420 0xf1b30 0xf4240 0xf6950 0xf9060 0xfb770 0xfde80 0x100590 0x102ca0 0x1053b0 0x107ac0 0x10a1d0 0x10c8e0 0x10eff0 0x111700 0x113e10>;
				pmic-off-on-delay-us = <0x3e8>;
				pmic-enable-time-us = <0x78>;
				pmic-eco-microamp = <0x2710>;
				pmic-valid-modes-mask = <0x06>;
				pmic-valid-idle-mask = <0x0d>;
				status = "disabled";
				phandle = <0x66b>;
			};

			ldo45@3A {
				compatible = "pmic-ldo";
				reg = <0x3a>;
				regulator-name = "ldo45";
				regulator-min-microvolt = <0x7a120>;
				regulator-max-microvolt = <0x113e10>;
				pmic-ctrl = <0x3a 0x01 0x10>;
				pmic-vset = <0x82 0x3f>;
				pmic-n-voltages = <0x40>;
				pmic-vset-table = <0x7a120 0x7c830 0x7ef40 0x81650 0x83d60 0x86470 0x88b80 0x8b290 0x8d9a0 0x900b0 0x927c0 0x94ed0 0x975e0 0x99cf0 0x9c400 0x9eb10 0xa1220 0xa3930 0xa6040 0xa8750 0xaae60 0xad570 0xafc80 0xb2390 0xb4aa0 0xb71b0 0xb98c0 0xbbfd0 0xbe6e0 0xc0df0 0xc3500 0xc5c10 0xc8320 0xcaa30 0xcd140 0xcf850 0xd1f60 0xd4670 0xd6d80 0xd9490 0xdbba0 0xde2b0 0xe09c0 0xe30d0 0xe57e0 0xe7ef0 0xea600 0xecd10 0xef420 0xf1b30 0xf4240 0xf6950 0xf9060 0xfb770 0xfde80 0x100590 0x102ca0 0x1053b0 0x107ac0 0x10a1d0 0x10c8e0 0x10eff0 0x111700 0x113e10>;
				pmic-off-on-delay-us = <0x3e8>;
				pmic-enable-time-us = <0x78>;
				pmic-eco-microamp = <0x2710>;
				pmic-valid-modes-mask = <0x06>;
				pmic-valid-idle-mask = <0x0d>;
				status = "disabled";
				phandle = <0x66c>;
			};

			ldo46@3B {
				compatible = "pmic-ldo";
				reg = <0x3b>;
				regulator-name = "ldo46";
				regulator-min-microvolt = <0x10c8e0>;
				regulator-max-microvolt = <0x1583d0>;
				pmic-ctrl = <0x3b 0x01 0x10>;
				pmic-vset = <0x83 0x1f>;
				pmic-n-voltages = <0x20>;
				pmic-vset-table = <0x10c8e0 0x10eff0 0x111700 0x113e10 0x116520 0x118c30 0x11b340 0x11da50 0x120160 0x122870 0x124f80 0x127690 0x129da0 0x12c4b0 0x12ebc0 0x1312d0 0x1339e0 0x1360f0 0x138800 0x13af10 0x13d620 0x13fd30 0x142440 0x144b50 0x147260 0x149970 0x14c080 0x14e790 0x150ea0 0x1535b0 0x155cc0 0x1583d0>;
				pmic-off-on-delay-us = <0x3e8>;
				pmic-enable-time-us = <0x78>;
				pmic-eco-microamp = <0x2710>;
				pmic-valid-modes-mask = <0x06>;
				pmic-valid-idle-mask = <0x0d>;
				status = "disabled";
				phandle = <0x66d>;
			};

			pmic_mntn@a0 {
				#address-cells = <0x01>;
				#size-cells = <0x00>;
				compatible = "hisilicon,pmic-mntn";
				interrupt-parent = <0x120>;
				interrupts = <0x00 0x00 0x08 0x00>;
				interrupt-names = "otmp", "ocp";
				reg = <0xa0>;
				pmic-mnt-data-width = <0x08>;
				pmic-mnt-ocp-reg-num = <0x0b>;
				pmic-mnt-ocp-regs = <0x2b5 0x2b6 0x2b7 0x2b8 0x2b9 0x2ba 0x2bb 0x2bc 0x2bd 0x2be 0x2bf>;
				pmic-mnt-record-reg-num = <0x15>;
				pmic-mnt-record-regs = <0x2d2 0x2d3 0x2d4 0x2d5 0x2d6 0x2d7 0x2d8 0x2d9 0x2da 0x2db 0x2dc 0x2cc 0x2cd 0x2ce 0x2cf 0x2d0 0x2d1 0x2dd 0x2de 0x2df 0x2e0>;
				pmic-mnt-ocp-error-dmd-offset-number = <0x58>;
				pmic-mnt-ocp-error-dmd-offset = <0x06 0x05 0x04 0x4d 0x4e 0x4f 0x8c 0x8d 0x31 0x0e 0x0f 0x00 0x01 0x02 0x2f 0x41 0x3b 0x12 0x13 0x14 0x15 0x17 0x08 0x0b 0x18 0x19 0x1a 0x1b 0x1c 0x1d 0x1e 0x1f 0x44 0x45 0x3d 0x35 0x3c 0x24 0x26 0x27 0x68 0x63 0x62 0x61 0x60 0x4b 0x42 0x3e7 0x8e 0x3e7 0x3e7 0x3e7 0x3e7 0x3e7 0x3e7 0x3e7 0x2b 0x2a 0x29 0x52 0x54 0x38 0x8f 0x90 0x48 0x3a 0x49 0x91 0x3e7 0x3e7 0x3e7 0x3e7 0x57 0x59 0x92 0x93 0x3e7 0x3e7 0x3e7 0x3e7 0x5c 0x5e 0x3e7 0x3e7 0x3e7 0x3e7 0x3e7 0x3e7>;
				pmic-mnt-dsm-record-regs-mask = <0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00>;
				pmic-mnt-dsm-ocp-reset-mask = <0x07 0xe0 0x08 0x02 0x5e 0x00 0x00 0x27 0x03 0x00 0x00 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff>;
				pmu-record-reg-num = <0x09>;
				pmu-record-regs = <0x213 0x214 0x50 0x51 0x53 0x55 0x57 0x59 0x5b>;
				pmic_mntn_vsys_surge_event = <0x2e6 0x01 0x69>;
				phandle = <0x66e>;

				OTMP {
					compatible = "pmic-mntn-otmp";
					pmic-mnt-otmp-threshold-val = <0x03>;
					pmic-mnt-otmp-threshold-reg = <0xb6 0x00 0x02>;
					pmic-mnt-otmp-hreset-pwrdown-flag = <0x00>;
					pmic-mnt-otmp-hreset-pwrdown-reg = <0x40d 0x00 0x01>;
					pmic-mnt-otmp-hreset-pwrdown-val = <0x00>;
				};

				SMPL {
					compatible = "pmic-mntn-smpl";
					pmic-mnt-smpl-ctrl-en = <0x00>;
					pmic-mnt-smpl-ctrl-en-reg = <0x40e 0x00 0x01>;
					pmic-mnt-smpl-ctrl-time = <0x02>;
					pmic-mnt-smpl-ctrl-time-reg = <0x40e 0x01 0x02>;
				};

				VSYS_PWROFF_ABS_PD@a1 {
					compatible = "pmic-vsys-pwroff-abs-pd";
					reg = <0xa1>;
					pmic-mnt-vsys-pwroff-abs-pd-ctrl-en = <0x00>;
					pmic-mnt-vsys-pwroff-abs-pd-ctrl-dis = <0x01>;
					pmic-mnt-vsys-pwroff-abs-pd-ctrl-reg = <0x413 0x00 0x01>;
				};

				OCP@2B5 {
					compatible = "pmic-mntn-ocp-reg0x2B5";
					reg = <0x2b5>;
					pmic-mnt-inacceptable-event = <0xff>;
					pmic-mnt-check_ocp_reset = <0x00>;
					pmic-mnt-check_ocp_nofify = <0x00>;
					pmic-mnt-check_ocp_num = <0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00>;
					pmic-mnt-event-bit-name = "buck1", "buck2", "buck3", "buck40", "buck41", "buck42", "buck70", "buck71";
					pmic-mnt-event-ops-reg = <0x0d 0x0e 0x0f 0x10 0x11 0x12 0x14 0x17>;
				};

				OCP@2B6 {
					compatible = "pmic-mntn-ocp-reg0x2B6";
					reg = <0x2b6>;
					pmic-mnt-inacceptable-event = <0xff>;
					pmic-mnt-check_ocp_reset = <0x00>;
					pmic-mnt-check_ocp_nofify = <0x00>;
					pmic-mnt-check_ocp_num = <0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00>;
					pmic-mnt-event-bit-name = "ldo6", "ldo4", "ldo3", "ldo2", "ldo1", "ldo0", "buck5", "buck9";
					pmic-mnt-event-ops-reg = <0x1d 0x1c 0x1b 0xdead 0x1a 0x19 0x13 0x18>;
				};

				OCP@2B7 {
					compatible = "pmic-mntn-ocp-reg0x2B7";
					reg = <0x2b7>;
					pmic-mnt-inacceptable-event = <0xff>;
					pmic-mnt-check_ocp_reset = <0x00>;
					pmic-mnt-check_ocp_nofify = <0x02>;
					pmic-mnt-check_ocp_num = <0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00>;
					pmic-mnt-event-bit-name = "ldo18", "ldo17", "ldo16", "ldo15", "ldo14", "ldo12", "ldo11", "ldo8";
					pmic-mnt-event-ops-reg = <0x25 0x24 0x23 0x22 0x21 0x20 0x1f 0x1e>;
				};

				OCP@2B8 {
					compatible = "pmic-mntn-ocp-reg0x2B8";
					reg = <0x2b8>;
					pmic-mnt-inacceptable-event = <0xff>;
					pmic-mnt-check_ocp_reset = <0x00>;
					pmic-mnt-check_ocp_nofify = <0xb8>;
					pmic-mnt-check_ocp_num = <0x00 0x00 0x00 0x00 0x03 0x00 0x00 0x00>;
					pmic-mnt-event-bit-name = "ldo28", "ldo27", "ldo26", "ldo25", "ldo24", "ldo23", "ldo22", "ldo21";
					pmic-mnt-event-ops-reg = <0x2d 0x2c 0x2b 0x2a 0x29 0x28 0x27 0x26>;
				};

				OCP@2B9 {
					compatible = "pmic-mntn-ocp-reg0x2B9";
					reg = <0x2b9>;
					pmic-mnt-inacceptable-event = <0xff>;
					pmic-mnt-check_ocp_reset = <0x00>;
					pmic-mnt-check_ocp_nofify = <0xa0>;
					pmic-mnt-check_ocp_num = <0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00>;
					pmic-mnt-event-bit-name = "ldo39", "ldo38", "ldo37", "ldo36", "pmuh", "ldo32", "ldo30", "ldo29";
					pmic-mnt-event-ops-reg = <0xdead 0x34 0x33 0x32 0x31 0x30 0x2f 0x2e>;
				};

				OCP@2BA {
					compatible = "pmic-mntn-ocp-reg0x2BA";
					reg = <0x2ba>;
					pmic-mnt-inacceptable-event = <0x7f>;
					pmic-mnt-check_ocp_reset = <0x00>;
					pmic-mnt-check_ocp_nofify = <0x00>;
					pmic-mnt-check_ocp_num = <0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00>;
					pmic-mnt-event-bit-name = "sw1", "ldo46", "ldo45", "ldo44", "ldo43", "ldo42", "ldo41", "reserved";
					pmic-mnt-event-ops-reg = <0x3c 0x3b 0x3a 0x39 0x38 0x37 0x36 0xdead>;
				};

				OCP@2BB {
					compatible = "pmic-mntn-ocp-reg0x2BB";
					reg = <0x2bb>;
					pmic-mnt-inacceptable-event = <0x01>;
					pmic-mnt-check_ocp_reset = <0x00>;
					pmic-mnt-check_ocp_nofify = <0x00>;
					pmic-mnt-check_ocp_num = <0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00>;
					pmic-mnt-event-bit-name = "ldo_sink", "reserved", "reserved", "reserved", "reserved", "reserved", "reserved", "reserved";
					pmic-mnt-event-ops-reg = <0x3d 0xdead 0xdead 0xdead 0xdead 0xdead 0xdead 0xdead>;
				};

				OCP@2BC {
					compatible = "pmic-mntn-ocp-reg0x2BC";
					reg = <0x2bc>;
					pmic-mnt-inacceptable-event = <0xff>;
					pmic-mnt-check_ocp_reset = <0x00>;
					pmic-mnt-check_ocp_nofify = <0x00>;
					pmic-mnt-check_ocp_num = <0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00>;
					pmic-mnt-event-bit-name = "buck1_scp", "buck2_scp", "buck3_scp", "buck401_scp", "buck42_scp", "buck5_scp", "buck70_scp", "buck71_scp";
					pmic-mnt-event-ops-reg = <0x0d 0x0e 0x0f 0x10 0x12 0x13 0x14 0x17>;
				};

				OCP@2BD {
					compatible = "pmic-mntn-ocp-reg0x2BD";
					reg = <0x2bd>;
					pmic-mnt-inacceptable-event = <0x0f>;
					pmic-mnt-check_ocp_reset = <0x00>;
					pmic-mnt-check_ocp_nofify = <0x00>;
					pmic-mnt-check_ocp_num = <0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00>;
					pmic-mnt-event-bit-name = "buck9_scp", "ldobuff_scp", "discharger", "ldo_sink_scp", "reserved", "reserved", "reserved", "reserved";
					pmic-mnt-event-ops-reg = <0x18 0xdead 0xdead 0x3d 0xdead 0xdead 0xdead 0xdead>;
				};

				OCP@2BE {
					compatible = "pmic-mntn-ocp-reg0x2BE";
					reg = <0x2be>;
					pmic-mnt-inacceptable-event = <0x0f>;
					pmic-mnt-check_ocp_reset = <0x00>;
					pmic-mnt-check_ocp_nofify = <0x00>;
					pmic-mnt-check_ocp_num = <0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00>;
					pmic-mnt-event-bit-name = "buck401_ovp", "buck42_ovp", "buck70_ovp", "buck71_ovp", "reserved", "reserved", "reserved", "reserved";
					pmic-mnt-event-ops-reg = <0x10 0x12 0x14 0x17 0xdead 0xdead 0xdead 0xdead>;
				};

				OCP@2BF {
					compatible = "pmic-mntn-ocp-reg0x2BF";
					reg = <0x2bf>;
					pmic-mnt-inacceptable-event = <0x03>;
					pmic-mnt-check_ocp_reset = <0x00>;
					pmic-mnt-check_ocp_nofify = <0x00>;
					pmic-mnt-check_ocp_num = <0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00>;
					pmic-mnt-event-bit-name = "buck401_cur_det", "buck42_cur_det", "reserved", "reserved", "reserved", "reserved", "reserved", "reserved";
					pmic-mnt-event-ops-reg = <0x10 0x12 0xdead 0xdead 0xdead 0xdead 0xdead 0xdead>;
				};

				RECORD@2D2 {
					compatible = "pmic-mntn-record-reg0x2D2";
					reg = <0x2d2>;
					pmic-mnt-inacceptable-event = <0xff>;
					pmic-mnt-event-bit-name = "ocp_buck1", "ocp_buck2", "ocp_buck3", "ocp_buck40", "ocp_buck41", "ocp_buck42", "ocp_buck70", "ocp_buck71";
				};

				RECORD@2D3 {
					compatible = "pmic-mntn-record-reg0x2D3";
					reg = <0x2d3>;
					pmic-mnt-inacceptable-event = <0xff>;
					pmic-mnt-event-bit-name = "ocp_ldo6", "ocp_ldo4", "ocp_ldo3", "ocp_ldo2", "ocp_ldo1", "ocp_ldo0", "ocp_buck5", "ocp_buck9";
				};

				RECORD@2D4 {
					compatible = "pmic-mntn-record-reg0x2D4";
					reg = <0x2d4>;
					pmic-mnt-inacceptable-event = <0xff>;
					pmic-mnt-event-bit-name = "ocp_ldo18", "ocp_ldo17", "ocp_ldo16", "ocp_ldo15", "ocp_ldo14", "ocp_ldo12", "ocp_ldo11", "ocp_ldo8";
				};

				RECORD@2D5 {
					compatible = "pmic-mntn-record-reg0x2D5";
					reg = <0x2d5>;
					pmic-mnt-inacceptable-event = <0xff>;
					pmic-mnt-event-bit-name = "ocp_ldo28", "ocp_ldo27", "ocp_ldo26", "ocp_ldo25", "ocp_ldo24", "ocp_ldo23", "ocp_ldo22", "ocp_ldo21";
				};

				RECORD@2D6 {
					compatible = "pmic-mntn-record-reg0x2D6";
					reg = <0x2d6>;
					pmic-mnt-inacceptable-event = <0xff>;
					pmic-mnt-event-bit-name = "ocp_ldo39", "ocp_ldo38", "ocp_ldo37", "ocp_ldo36", "ocp_pmuh", "ocp_ldo32", "ocp_ldo30", "ocp_ldo29";
				};

				RECORD@2D7 {
					compatible = "pmic-mntn-record-reg0x2D7";
					reg = <0x2d7>;
					pmic-mnt-inacceptable-event = <0x7f>;
					pmic-mnt-event-bit-name = "ocp_sw1", "ocp_ldo46", "ocp_ldo45", "ocp_ldo44", "ocp_ldo43", "ocp_ldo42", "ocp_ldo41", "reserved";
				};

				RECORD@2D8 {
					compatible = "pmic-mntn-record-reg0x2D8";
					reg = <0x2d8>;
					pmic-mnt-inacceptable-event = <0x01>;
					pmic-mnt-event-bit-name = "ocp_ldo_sink", "reserved", "reserved", "reserved", "reserved", "reserved", "reserved", "reserved";
				};

				RECORD@2D9 {
					compatible = "pmic-mntn-record-reg0x2D9";
					reg = <0x2d9>;
					pmic-mnt-inacceptable-event = <0xff>;
					pmic-mnt-event-bit-name = "scp_buck1", "scp_buck2", "scp_buck3", "scp_buck401", "scp_buck42", "scp_buck5", "scp_buck70", "scp_buck71";
				};

				RECORD@2DA {
					compatible = "pmic-mntn-record-reg0x2DA";
					reg = <0x2da>;
					pmic-mnt-inacceptable-event = <0x0f>;
					pmic-mnt-event-bit-name = "scp_buck9", "scp_ldobuff", "ocp_discharger", "scp_ldo_sink", "reserved", "reserved", "reserved", "reserved";
				};

				RECORD@2DB {
					compatible = "pmic-mntn-record-reg0x2DB";
					reg = <0x2db>;
					pmic-mnt-inacceptable-event = <0x0f>;
					pmic-mnt-event-bit-name = "ovp_buck401", "ovp_buck42", "ovp_buck70", "ovp_buck71", "reserved", "reserved", "reserved", "reserved";
				};

				RECORD@2DC {
					compatible = "pmic-mntn-record-reg0x2DC";
					reg = <0x2dc>;
					pmic-mnt-inacceptable-event = <0x03>;
					pmic-mnt-event-bit-name = "buck401_cur_det", "buck42_cur_det", "reserved", "reserved", "reserved", "reserved", "reserved", "reserved";
				};

				RECORD@2CC {
					compatible = "pmic-mntn-record-reg0x2CC";
					reg = <0x2cc>;
					pmic-mnt-inacceptable-event = <0xdf>;
					pmic-mnt-event-bit-name = "vsys_ov", "vsys_pwroff_abs", "vsys_pwroff_deb", "thsd_otmp140", "thsd_otmp125", "hresetn", "avdd_osc_vld", "19m2_dis";
				};

				RECORD@2CD {
					compatible = "pmic-mntn-record-reg0x2CD";
					reg = <0x2cd>;
					pmic-mnt-inacceptable-event = <0x07>;
					pmic-mnt-event-bit-name = "press8s_restart", "pwrhold_shutdown", "press8s_shutdown", "pwrhold_pwrup", "alarm_pwrup", "vbus_pwrup", "press40ms_pwrup", "fast_pwrup";
				};

				RECORD@2CE {
					compatible = "pmic-mntn-record-reg0x2CE";
					reg = <0x2ce>;
					pmic-mnt-inacceptable-event = <0x78>;
					pmic-mnt-event-bit-name = "dcxo_sel_r", "dcxo_sel_f", "vsys_vcoin_sel", "smpl", "core_io_vld_f", "sys_nrst_4s", "pwron_hrst", "pwrup_nfc";
				};

				RECORD@2CF {
					compatible = "pmic-mntn-record-reg0x2CF";
					reg = <0x2cf>;
					pmic-mnt-inacceptable-event = <0x3f>;
					pmic-mnt-event-bit-name = "pmua_short_f", "pmuh_short_f", "vin_ldoh_shutdown", "pwronexp_shutdown", "np_nfc_shutdown", "core_io12_18_vld_f", "reserved", "reserved";
				};

				RECORD@2D0 {
					compatible = "pmic-mntn-record-reg0x2D0";
					reg = <0x2d0>;
					pmic-mnt-inacceptable-event = <0xff>;
					pmic-mnt-event-bit-name = "cali_pmuh_ocp", "cali_ldo26_ocp", "cali_buck2_scp", "cali_buck2_ocp", "cali_pmuh_short", "cali_pmud_short", "cali_vsyspwroff_deb", "cali_vsyspwroff_abs";
				};

				RECORD@2D1 {
					compatible = "pmic-mntn-record-reg0x2D1";
					reg = <0x2d1>;
					pmic-mnt-inacceptable-event = <0x1f>;
					pmic-mnt-event-bit-name = "cali_avdd_osc_vld", "cali_thsd_otmp140", "cali_thsd_otmp125", "cali_vsys_ov", "cali_19m2_dis", "reserved", "reserved", "reserved";
				};

				RECORD@2DD {
					compatible = "pmic-mntn-record-reg0x2DD";
					reg = <0x2dd>;
					pmic-mnt-inacceptable-event = <0x1f>;
					pmic-mnt-event-bit-name = "ramp_buck40", "ramp_buck42", "ramp_buck5", "ramp_buck70", "ramp_buck71", "reserved", "reserved", "reserved";
				};

				RECORD@2DE {
					compatible = "pmic-mntn-record-reg0x2DE";
					reg = <0x2de>;
					pmic-mnt-inacceptable-event = <0x0f>;
					pmic-mnt-event-bit-name = "ramp_ldo0", "ramp_ldo39", "ramp_ldo44", "ramp_ldo45", "reserved", "reserved", "reserved", "reserved";
				};

				RECORD@2DF {
					compatible = "pmic-mntn-record-reg0x2DF";
					reg = <0x2df>;
					pmic-mnt-inacceptable-event = <0x1f>;
					pmic-mnt-event-bit-name = "ramp_buck40_abnor", "ramp_buck42_abnor", "ramp_buck5_abnor", "ramp_buck70_abnor", "ramp_buck71_abnor", "reserved", "reserved", "reserved";
				};

				RECORD@2E0 {
					compatible = "pmic-mntn-record-reg0x2E0";
					reg = <0x2e0>;
					pmic-mnt-inacceptable-event = <0x0f>;
					pmic-mnt-event-bit-name = "ramp_ldo0_abnor", "ramp_ldo39_abnor", "ramp_ldo44_abnor", "ramp_ldo45_abnor", "reserved", "reserved", "reserved", "reserved";
				};
			};

			pmic_led {
				compatible = "led-pmic-spmi";
				status = "ok";
				dr_led_ctrl = <0x14e>;
				dr_out_ctrl = <0x152>;
				phandle = <0x66f>;

				led0 {
					compatible = "hisilicon,led0";
					dr_ctrl = "red";
					dr_start_del = <0x153>;
					dr_iset = <0x14f>;
					dr_time_config0 = <0x156>;
					dr_time_config1 = <0x157>;
				};

				led1 {
					compatible = "hisilicon,led1";
					dr_ctrl = "green";
					dr_start_del = <0x154>;
					dr_iset = <0x150>;
					dr_time_config0 = <0x158>;
					dr_time_config1 = <0x159>;
				};

				led2 {
					compatible = "hisilicon,led2";
					dr_ctrl = "blue";
					dr_start_del = <0x155>;
					dr_iset = <0x151>;
					dr_time_config0 = <0x15a>;
					dr_time_config1 = <0x15b>;
				};
			};

			pmic_rtc {
				#address-cells = <0x01>;
				#size-cells = <0x00>;
				compatible = "rtc-spmi";
				interrupt-parent = <0x120>;
				interrupts = <0x03 0x00>;
				interrupt-names = "pmic-rtc";
				pmic-rtc-base = <0x6000>;
				pmic-rtc-imr = <0x290>;
				pmic-rtc-icr = <0x2b3>;
				pmic-rtc-ib = <0x03>;
				pmic-rtc-xo-thrshd-pwroff-val = <0xffff>;
				status = "ok";
				phandle = <0x670>;

				soc_rtc@a0 {
					compatible = "hisilicon,soc-rtc";
					soc-rtc-baseaddr = <0xfb20c000>;
					reg = <0xfb20c000>;
					interrupt-parent = <0x01>;
					interrupts = <0x00 0x38 0x04>;
				};
			};

			hi6xxx_coul {
				compatible = "hisilicon,hi6xxx_coul";
				interrupt-parent = <0x120>;
				interrupts = <0x09 0x00>;
				interrupt-names = "coulirq";
				status = "disabled";
				phandle = <0x671>;

				batt {
					compatible = "hisilicon,coul_core";
					batt_index = <0x00>;
					batt_name = "battery_gauge";
					batt_indentify_fcc = <0x00>;
					adc_batt_id = <0x0b>;
					r_pcb = <0x00>;
					r_coul_uohm = <0x3e8>;
					ntc_compensation_is = <0x00>;
					current_offset_a = <0xf4240>;
					current_full_enable = <0x00>;
					low_temp_opt_enable = <0x00>;
					normal_cutoff_vol_mv = <0xc4e>;
					sleep_cutoff_vol_mv = <0xd16>;
					low_vol_filter_cnt = <0x03>;
					dischg_ocv_soc = <0x05>;
					wakelock_low_batt_soc = <0x00>;
					soc_at_term = <0x61>;
					phandle = <0x672>;
				};
			};

			hi6xxx_coul_adc {
				compatible = "hisilicon,hi6xxx_coul_adc";
				batt_index = <0x02>;
				batt_name = "xu_battery_gauge";
				r_pcb = <0x00>;
				r_coul_uohm = <0xd16>;
				status = "disabled";
				phandle = <0x673>;
			};

			hisi_soh_pmic@1 {
				compatible = "hisi_soh_pmic";
				interrupt-parent = <0x120>;
				interrupts = <0x11 0x00 0x12 0x00>;
				interrupt-names = "soh_ovh_dis", "soh_ovh";
				pmic_acr_support = <0x01>;
				pmic_dcr_support = <0x01>;
				pmic_pd_leak_support = <0x01>;
				pmic_soh_ovp_support = <0x00>;
				status = "ok";
				phandle = <0x674>;
			};

			hisi_pmic_eis@1 {
				compatible = "hisilicon,pmic_eis";
				batt_index = <0x00>;
				pmic_eis_freq_support = <0x01>;
				pmic_eis_time_support = <0x00>;
				pmic_eis_wavelet_support = <0x00>;
				pmic_eis_support = <0x01>;
				status = "disabled";
				phandle = <0x675>;
			};

			sim0 {
			};

			sim1 {
			};
		};
	};

	spmi1@0xFB248000 {
		#address-cells = <0x01>;
		#size-cells = <0x00>;
		compatible = "hisilicon,spmi-controller";
		status = "disabled";
		reg = <0x00 0xfb248000 0x00 0x1000>;
		spmi-channel = <0x02>;
		spmi-nr = <0x01>;
		phandle = <0x676>;

		pmic2@2 {
			compatible = "mmw-pmic-spmi";
			reg = <0x02>;
			slave_id = <0x08>;
			spmi-slave-container;
			status = "disabled";
			phandle = <0x677>;
		};
	};

	hwspinlock {
		compatible = "hisilicon,hwspinlock";
		hwlock,register-width = <0x20>;
		hwlock,bits-per-single = <0x04>;
		hwlock,groups = <0x08>;
		hwlock,ao-groups = <0x04>;
		hwlock,offset = <0x00 0x0c 0x18 0x24 0x400 0x40c 0x418 0x424>;
		hwlock,ao-offset = <0x500 0x50c 0x8e8 0x8f4>;
		secure,ao-flag = <0x00 0x00 0x01 0x01>;
		status = "ok";
		phandle = <0x678>;
	};

	pm_clk {
		compatible = "hisilicon,pm-clk-monitor";
		pmclk-num = <0x37>;
		clock-names = "clk_ap_ppll1", "clk_ap_ppll2", "clk_ap_ppll3", "clk_ap_ppll7", "clk_ap_pcie0pll", "clk_ap_sdpll", "clk_ppll1_media", "clk_ppll2_media", "clk_ppll2b_media", "clk_ppll3_media", "clk_ppll1_m2", "clk_ppll2_m2", "clk_ppll2b_m2", "clk_ppll3_m2", "clk_edc0", "clk_vdec", "clk_venc", "clk_ispfunc", "clk_jpg_func", "clk_ispcpu", "clk_perf_stat", "clk_dmac", "aclk_isp", "clk_vcodecbus2", "clk_sd", "clk_uart4", "clk_uart5", "clk_uart0", "clk_i2c3", "clk_i2c4", "clk_i2c6_acpu", "clk_i2c7", "clk_spi1", "clk_spi6", "snp_usb3crtl", "clk_hsdt1_usbdp", "usb31phy_apb", "pclk_usb_sctrl", "clk_usb2phy_ref", "clk_hsdt0_pcie0_mcu_bus", "clk_hsdt0_pcie1_mcu_bus", "pclk_pcie_phy", "pclk_pcie1_phy", "clk_dpctrl_16m", "dpctrl_pixel", "clk_ispi2c", "clk_isp_sys", "clk_isp_i3c", "clk_rxdphy0_cfg", "clk_rxdphy1_cfg", "clk_rxdphy2_cfg", "clk_rxdphy3_cfg", "clk_rxdphy4_cfg", "clk_rxdphy5_cfg", "clk_txdphy0_ref";
		status = "ok";
		phandle = <0x679>;
	};

	ddr_devfreq_latency@fffc0000 {
		#address-cells = <0x02>;
		#size-cells = <0x02>;
		compatible = "hisilicon,ddr_devfreq_latency";
		reg = <0x00 0xfffc0000 0x00 0x10000>;
		pm_qos_data_reg = <0x10 0x3c>;
		clocks = <0x03 0x04>;
		pm_qos_class = "memory_latency";
		operating-points = <0x660d0 0x00 0xb6dc8 0x00 0x10d880 0x00 0x175c78 0x00 0x202678 0x00 0x29e690 0x00 0x30c848 0x00>;
		vote_method = "hardware";
		status = "ok";
	};

	ddr_devfreq_l1bus_latency@fffc0000 {
		#address-cells = <0x02>;
		#size-cells = <0x02>;
		compatible = "hisilicon,ddr_devfreq_l1bus_latency";
		reg = <0x00 0xfffc0000 0x00 0x10000>;
		pm_qos_data_reg = <0x01 0x64>;
		clocks = <0x121 0x04>;
		pm_qos_class = "l1bus_latency";
		operating-points = <0x660d0 0x00 0x9cfb8 0x00 0xc3500 0x00 0x104410 0x00>;
		vote_method = "hardware";
		status = "ok";
	};

	ddr@fffc0000 {
		#address-cells = <0x02>;
		#size-cells = <0x02>;
		compatible = "hisilicon,ddr_secprotect";
		reg = <0x00 0xfffc0000 0x00 0x20000>;
		interrupts = <0x00 0x83 0x04>;
		status = "ok";
		phandle = <0x67a>;
	};

	exmbist@fffc0000 {
		#address-cells = <0x02>;
		#size-cells = <0x02>;
		compatible = "hisilicon,hi3650-exmbist";
		reg = <0x00 0xfffc0000 0x00 0x20000>;
		#interrupts = <0x00 0x83 0x04>;
		start_addr = <0x40000000>;
		end_addr = <0x60000000>;
		status = "disabled";
	};

	bootdevice {
		compatible = "hisilicon,bootdevice";
		status = "ok";
		phandle = <0x67b>;
	};

	sdhci1@EFB01000 {
		status = "disable";
		compatible = "hisilicon,scorpio-sdhci";
		reg = <0x00 0xefb01000 0x00 0x1000>;
		interrupts = <0x00 0x98 0x04>;
		interrupt-parent = <0x01>;
		clocks = <0x122 0x123>;
		clock-names = "ciu", "biu";
		bus-width = <0x04>;
		use-adma;
		sdhci-adma-64bit;
		disable-wp;
		caps2-mmc-hs200-1_8v;
		vmmc-supply = <0x124>;
		vqmmc-supply = <0x125>;
		clk-xin = <0xbebc200>;
		cd-vol = <0x01>;
		cd-gpio = <0x43 0x0a 0x00>;
		pinctrl-names = "default", "idle";
		pinctrl-0 = <0x126 0x127 0x128 0x129 0x12a 0x12b 0x12c 0x12d 0x12e 0x12f 0x130 0x131>;
		pinctrl-1 = <0x132 0x133 0x134 0x135 0x136 0x137 0x138 0x139 0x13a 0x13b 0x13c 0x13d>;
		phandle = <0x67c>;
	};

	mmccard@ {
		compatible = "mmc-card";
		broken-hpi;
		phandle = <0x67d>;
	};

	sdhci2@EFB01000 {
		status = "ok";
		compatible = "hisilicon,scorpio-sdhci";
		reg = <0x00 0xefb01000 0x00 0x1000>;
		interrupts = <0x00 0x98 0x04>;
		clocks = <0x122 0x123>;
		clock-names = "ciu", "biu";
		bus-width = <0x04>;
		use-adma;
		sdhci-adma-64bit;
		card-detect-delay = <0xc8>;
		caps2-support-wifi;
		supports-highspeed;
		keep-power-in-suspend;
		vmmc-supply = <0x124>;
		vqmmc-supply = <0x125>;
		clk-xin = <0xbebc200>;
		sdio_support_uhs;
		caps-wifi-no-lowpwr;
		caps2-wifi-support-cmd11;
		pinctrl-names = "default", "idle";
		pinctrl-0 = <0x126 0x127 0x128 0x129 0x12a 0x12b 0x12c 0x12d 0x12e 0x12f 0x130 0x131>;
		pinctrl-1 = <0x132 0x133 0x134 0x135 0x136 0x137 0x138 0x139 0x13a 0x13b 0x13c 0x13d>;
		phandle = <0x67e>;
	};

	ufs@FA400000 {
		compatible = "hisilicon,hufs";
		reg = <0x00 0xfa500000 0x00 0x80000 0x00 0xfa3fd000 0x00 0x1000 0x00 0xfa400000 0x00 0x100000 0x00 0xfa58a000 0x00 0x1000 0x00 0xfb8c3000 0x00 0x1000>;
		interrupt-parent = <0x01>;
		interrupts = <0x00 0x86 0x04 0x00 0x78 0x04 0x00 0x79 0x04 0x00 0x7a 0x04 0x00 0x7b 0x04 0x00 0x7c 0x04 0x00 0x7d 0x04 0x00 0x7e 0x04 0x00 0x7f 0x04>;
		core0-interrupt-index = <0x01>;
		clock-names = "clk_ufsio_ref";
		clocks = <0x13e>;
		vcc-supply = <0x13f>;
		buck-supply = <0x140>;
		hufs-ssu-by-self;
		broken-hce;
		reset_retry_max = <0x03>;
		status = "ok";
		ufs-use-hufs-hc = <0x01>;
		hufs-wb;
		hufs-use-rate-B;
		hufs-broken-fastauto;
		hufs-use-HS-GEAR4;
		hufs-unipro-termination;
		hufs-use-auto-H8;
		hufs-pwm-daemon-intr;
		hufs-dev-tmt-intr;
		hufs-use-main-resume;
		ufs-mphy-cdr-bw-workround;
		phandle = <0x67f>;

		1861 {
			compatible = "white";
			manufacturer_id = <0x8b6>;
			model = "HUFS_MODEL_ANY";
			rev = "HUFS_REV_ANY";
		};

		Hynix_01 {
			compatible = "white";
			manufacturer_id = <0x1ad>;
			model = "H28S7Q302BMR";
			rev = "T002";
		};

		Hynix_02 {
			compatible = "white";
			manufacturer_id = <0x1ad>;
			model = "H28S7Q302BMR";
			rev = "H202";
		};

		Hynix_03 {
			compatible = "white";
			manufacturer_id = <0x1ad>;
			model = "H28S7Q302BMR";
			rev = "H204";
		};

		SAMSUNG_01 {
			smsv6 = "KLUDG4UHDC-B0E1";
		};

		SAMSUNG_02 {
			smsv6 = "KLUEG8UHDC-B0E1";
		};

		SAMSUNG_03 {
			smsv6 = "KLUFG8RHDB-B0E1";
		};

		SAMSUNG_04 {
			smsv6 = "KLUEG8UHGC-B0E1";
		};

		SAMSUNG_05 {
			smsv6 = "KLUFG8RHGB-B0E1";
		};
	};

	ipc@FF870000 {
		#address-cells = <0x02>;
		#size-cells = <0x02>;
		compatible = "hisilicon,HiIPCV230";
		reg = <0x00 0xff870000 0x00 0x10000>;
		interrupts = <0x00 0x1b5 0x04 0x00 0x1b5 0x04>;
		clocks = <0x26>;
		clock-names = "apb_pclk";
		unlock_key = <0x1acce551>;
		capability = <0x0c>;
		rproc_src_id = <0x00 0x00>;
		rproc_num = <0x0d>;
		ipc_type = <0x00>;
		rproc_name = "ACPU", "SENSORHUB", "LPMCU", "HIFI", "MODEM", "IVP0", "IVP1", "ISP", "NPU_TS", "ARPP", "RESERVED", "CPU_LP_CTRL", "GPU_LP_CTRL";
		status = "ok";
		ipc_version = <0x01>;
		sctrl_scbbpdrxstat = <0x534>;
		mailboxes = <0x1b>;
		phandle = <0x680>;

		mailbox-0 {
			compatible = "HiIPCV230,rx-mailbox-fast";
			func = <0x01 0x00 0x01>;
			interrupts = <0x00 0x1b8 0x04>;
			src_bit = <0x02>;
			des_bit = <0x00>;
			index = <0x00>;
			used = <0x01>;
			rproc = "IPC_LPM3_ACPU_MBX_1";
			timeout = <0x12c>;
		};

		mailbox-1 {
			compatible = "HiIPCV230,rx-mailbox-fast";
			func = <0x01 0x00 0x01>;
			interrupts = <0x00 0x1b9 0x04>;
			src_bit = <0x02>;
			des_bit = <0x00>;
			index = <0x01>;
			used = <0x01>;
			rproc = "IPC_LPM3_ACPU_MBX_2";
			timeout = <0x12c>;
		};

		mailbox-2 {
			compatible = "HiIPCV230,rx-mailbox-fast";
			func = <0x01 0x00 0x01>;
			interrupts = <0x00 0x1ba 0x04>;
			src_bit = <0x03>;
			des_bit = <0x00>;
			index = <0x02>;
			used = <0x01>;
			rproc = "IPC_HIFI_ACPU_MBX_1";
			timeout = <0x12c>;
		};

		mailbox-3 {
			compatible = "HiIPCV230,rx-mailbox-fast";
			func = <0x01 0x00 0x01>;
			interrupts = <0x00 0x1bb 0x04>;
			src_bit = <0x02>;
			des_bit = <0x00>;
			index = <0x03>;
			used = <0x01>;
			rproc = "IPC_LPM3_ACPU_MBX_3";
			timeout = <0x12c>;
		};

		mailbox-4 {
			compatible = "HiIPCV230,rx-mailbox-fast";
			func = <0x01 0x00 0x01>;
			interrupts = <0x00 0x1bc 0x04>;
			src_bit = <0x01>;
			des_bit = <0x00>;
			index = <0x04>;
			used = <0x01>;
			rproc = "IPC_IOM3_ACPU_MBX_1";
			timeout = <0x12c>;
		};

		mailbox-5 {
			compatible = "HiIPCV230,rx-mailbox-fast";
			func = <0x01 0x00 0x01>;
			interrupts = <0x00 0x1bd 0x04>;
			src_bit = <0x06>;
			des_bit = <0x00>;
			index = <0x05>;
			used = <0x01>;
			rproc = "IPC_IVP_ACPU_MBX_1";
			timeout = <0x12c>;
		};

		mailbox-6 {
			compatible = "HiIPCV230,rx-mailbox-fast";
			func = <0x01 0x00 0x01>;
			interrupts = <0x00 0x1be 0x04>;
			src_bit = <0x06>;
			des_bit = <0x00>;
			index = <0x06>;
			used = <0x01>;
			rproc = "IPC_IVP_ACPU_MBX_2";
			timeout = <0x12c>;
		};

		mailbox-7 {
			compatible = "HiIPCV230,rx-mailbox-fast";
			func = <0x01 0x00 0x01>;
			interrupts = <0x00 0x1bf 0x04>;
			src_bit = <0x02>;
			des_bit = <0x00>;
			index = <0x07>;
			used = <0x00>;
			timeout = <0x12c>;
		};

		mailbox-8 {
			compatible = "HiIPCV230,rx-mailbox-fast";
			func = <0x01 0x00 0x01>;
			interrupts = <0x00 0x1c0 0x04>;
			src_bit = <0x07>;
			des_bit = <0x00>;
			index = <0x08>;
			used = <0x01>;
			rproc = "IPC_ISP_ACPU_MBX_1";
			timeout = <0x12c>;
		};

		mailbox-9 {
			compatible = "HiIPCV230,rx-mailbox-fast";
			func = <0x01 0x00 0x01>;
			interrupts = <0x00 0x1c1 0x04>;
			src_bit = <0x07>;
			des_bit = <0x00>;
			index = <0x09>;
			used = <0x01>;
			rproc = "IPC_ISP_ACPU_MBX_2";
			timeout = <0x12c>;
		};

		mailbox-10 {
			compatible = "HiIPCV230,rx-mailbox-fast";
			func = <0x01 0x00 0x01>;
			interrupts = <0x00 0x1c2 0x04>;
			src_bit = <0x04>;
			des_bit = <0x00>;
			index = <0x0a>;
			used = <0x01>;
			rproc = "IPC_MODEM_ACPU_MBX_1";
			timeout = <0x12c>;
		};

		mailbox-11 {
			compatible = "HiIPCV230,rx-mailbox-fast";
			func = <0x01 0x00 0x01>;
			interrupts = <0x00 0x1c3 0x04>;
			src_bit = <0x04>;
			des_bit = <0x00>;
			index = <0x0b>;
			used = <0x00>;
			rproc = "IPC_MODEM_ACPU_MBX_2";
			timeout = <0x12c>;
		};

		mailbox-12 {
			compatible = "HiIPCV230,rx-mailbox-fast";
			func = <0x01 0x00 0x01>;
			interrupts = <0x00 0x1c4 0x04>;
			src_bit = <0x04>;
			des_bit = <0x00>;
			index = <0x0c>;
			used = <0x00>;
			rproc = "IPC_MODEM_ACPU_MBX_3";
			timeout = <0x12c>;
		};

		mailbox-13 {
			compatible = "HiIPCV230,rx-mailbox-fast";
			func = <0x01 0x00 0x01>;
			interrupts = <0x00 0x1c5 0x04>;
			src_bit = <0x04>;
			des_bit = <0x00>;
			index = <0x0d>;
			used = <0x00>;
			rproc = "IPC_MODEM_ACPU_MBX_4";
			timeout = <0x12c>;
		};

		mailbox-14 {
			compatible = "HiIPCV230,rx-mailbox-fast";
			func = <0x01 0x00 0x01>;
			interrupts = <0x00 0x1c6 0x04>;
			src_bit = <0x01>;
			des_bit = <0x00>;
			index = <0x0e>;
			used = <0x00>;
			timeout = <0x12c>;
		};

		mailbox-15 {
			compatible = "HiIPCV230,rx-mailbox-fast";
			func = <0x01 0x00 0x01>;
			interrupts = <0x00 0x1c7 0x04>;
			src_bit = <0x06>;
			des_bit = <0x00>;
			index = <0x0f>;
			used = <0x00>;
			timeout = <0x12c>;
		};

		mailbox-16 {
			compatible = "HiIPCV230,rx-mailbox-fast";
			func = <0x01 0x00 0x01>;
			interrupts = <0x00 0x1c8 0x04>;
			src_bit = <0x06>;
			des_bit = <0x00>;
			index = <0x10>;
			used = <0x00>;
			timeout = <0x12c>;
		};

		mailbox-17 {
			compatible = "HiIPCV230,rx-mailbox-fast";
			func = <0x01 0x00 0x01>;
			interrupts = <0x00 0x1c9 0x04>;
			src_bit = <0x02>;
			des_bit = <0x00>;
			index = <0x11>;
			used = <0x00>;
			timeout = <0x12c>;
		};

		mailbox-18 {
			compatible = "HiIPCV230,rx-mailbox-fast";
			func = <0x01 0x00 0x01>;
			interrupts = <0x00 0x1ca 0x04>;
			src_bit = <0x07>;
			des_bit = <0x00>;
			index = <0x12>;
			used = <0x00>;
			timeout = <0x7d0>;
		};

		mailbox-19 {
			compatible = "HiIPCV230,rx-mailbox-fast";
			func = <0x01 0x00 0x01>;
			interrupts = <0x00 0x1cb 0x04>;
			src_bit = <0x07>;
			des_bit = <0x00>;
			index = <0x13>;
			used = <0x00>;
			timeout = <0x12c>;
		};

		mailbox-20 {
			compatible = "HiIPCV230,rx-mailbox-fast";
			func = <0x01 0x00 0x01>;
			interrupts = <0x00 0x1cc 0x04>;
			src_bit = <0x07>;
			des_bit = <0x00>;
			index = <0x14>;
			used = <0x00>;
			timeout = <0x12c>;
		};

		mailbox-21 {
			compatible = "HiIPCV230,rx-mailbox-fast";
			func = <0x01 0x00 0x01>;
			interrupts = <0x00 0x1cd 0x04>;
			src_bit = <0x07>;
			des_bit = <0x00>;
			index = <0x15>;
			used = <0x00>;
			timeout = <0x12c>;
		};

		mailbox-22 {
			compatible = "HiIPCV230,tx-mailbox-fast";
			func = <0x01 0x01 0x00>;
			src_bit = <0x00>;
			des_bit = <0x01>;
			index = <0x16>;
			used = <0x01>;
			rproc = "IPC_ACPU_IOM3_MBX_1";
			timeout = <0x12c>;
		};

		mailbox-23 {
			compatible = "HiIPCV230,tx-mailbox-fast";
			func = <0x01 0x01 0x00>;
			src_bit = <0x00>;
			des_bit = <0x01>;
			index = <0x17>;
			used = <0x01>;
			rproc = "IPC_ACPU_IOM3_MBX_2";
			timeout = <0x12c>;
		};

		mailbox-24 {
			compatible = "HiIPCV230,tx-mailbox-fast";
			func = <0x01 0x01 0x00>;
			src_bit = <0x00>;
			des_bit = <0x01>;
			index = <0x18>;
			used = <0x01>;
			rproc = "IPC_ACPU_IOM3_MBX_3";
			timeout = <0x12c>;
		};

		mailbox-25 {
			compatible = "HiIPCV230,tx-mailbox-fast";
			func = <0x01 0x01 0x00>;
			src_bit = <0x00>;
			des_bit = <0x02>;
			index = <0x19>;
			used = <0x01>;
			rproc = "IPC_ACPU_LPM3_MBX_1";
			timeout = <0x12c>;
			fifo_size = <0x08>;
			sched_priority = <0x01>;
			sched_policy = <0x01>;
		};

		mailbox-26 {
			compatible = "HiIPCV230,tx-mailbox-fast";
			func = <0x01 0x01 0x00>;
			src_bit = <0x00>;
			des_bit = <0x02>;
			index = <0x1a>;
			used = <0x01>;
			rproc = "IPC_ACPU_LPM3_MBX_2";
			timeout = <0x12c>;
		};

		mailbox-27 {
			compatible = "HiIPCV230,tx-mailbox-fast";
			func = <0x01 0x01 0x00>;
			src_bit = <0x00>;
			des_bit = <0x02>;
			index = <0x1b>;
			used = <0x01>;
			rproc = "IPC_ACPU_LPM3_MBX_3";
			timeout = <0x12c>;
		};

		mailbox-28 {
			compatible = "HiIPCV230,tx-mailbox-fast";
			func = <0x01 0x01 0x00>;
			src_bit = <0x00>;
			des_bit = <0x02>;
			index = <0x1c>;
			used = <0x01>;
			rproc = "IPC_ACPU_LPM3_MBX_4";
			timeout = <0x12c>;
		};

		mailbox-29 {
			compatible = "HiIPCV230,tx-mailbox-fast";
			func = <0x01 0x01 0x00>;
			src_bit = <0x00>;
			des_bit = <0x02>;
			index = <0x1d>;
			used = <0x01>;
			rproc = "IPC_ACPU_LPM3_MBX_5";
			timeout = <0x7d0>;
		};

		mailbox-30 {
			compatible = "HiIPCV230,tx-mailbox-fast";
			func = <0x01 0x01 0x00>;
			src_bit = <0x00>;
			des_bit = <0x02>;
			index = <0x1e>;
			used = <0x01>;
			rproc = "IPC_ACPU_LPM3_MBX_6";
			timeout = <0x12c>;
		};

		mailbox-31 {
			compatible = "HiIPCV230,tx-mailbox-fast";
			func = <0x01 0x01 0x00>;
			src_bit = <0x00>;
			des_bit = <0x02>;
			index = <0x1f>;
			used = <0x01>;
			rproc = "IPC_ACPU_LPM3_MBX_7";
			timeout = <0x12c>;
		};

		mailbox-32 {
			compatible = "HiIPCV230,tx-mailbox-fast";
			func = <0x01 0x01 0x00>;
			src_bit = <0x00>;
			des_bit = <0x03>;
			index = <0x20>;
			used = <0x01>;
			rproc = "IPC_ACPU_HIFI_MBX_1";
			timeout = <0x12c>;
		};

		mailbox-33 {
			compatible = "HiIPCV230,tx-mailbox-fast";
			func = <0x01 0x01 0x00>;
			src_bit = <0x00>;
			des_bit = <0x04>;
			index = <0x21>;
			used = <0x01>;
			rproc = "IPC_ACPU_MODEM_MBX_1";
			timeout = <0x12c>;
		};

		mailbox-34 {
			compatible = "HiIPCV230,tx-mailbox-fast";
			func = <0x01 0x01 0x00>;
			src_bit = <0x00>;
			des_bit = <0x04>;
			index = <0x22>;
			used = <0x00>;
			rproc = "IPC_ACPU_MODEM_MBX_2";
			timeout = <0x12c>;
		};

		mailbox-35 {
			compatible = "HiIPCV230,tx-mailbox-fast";
			func = <0x01 0x01 0x00>;
			src_bit = <0x00>;
			des_bit = <0x04>;
			index = <0x23>;
			used = <0x00>;
			rproc = "IPC_ACPU_MODEM_MBX_3";
			timeout = <0x12c>;
		};

		mailbox-36 {
			compatible = "HiIPCV230,tx-mailbox-fast";
			func = <0x01 0x01 0x00>;
			src_bit = <0x00>;
			des_bit = <0x04>;
			index = <0x24>;
			used = <0x00>;
			rproc = "IPC_ACPU_MODEM_MBX_4";
			timeout = <0x12c>;
		};

		mailbox-37 {
			compatible = "HiIPCV230,tx-mailbox-fast";
			func = <0x01 0x01 0x00>;
			src_bit = <0x00>;
			des_bit = <0x04>;
			index = <0x25>;
			used = <0x00>;
			rproc = "IPC_ACPU_MODEM_MBX_5";
			timeout = <0x12c>;
		};

		mailbox-38 {
			compatible = "HiIPCV230,tx-mailbox-fast";
			func = <0x01 0x01 0x00>;
			src_bit = <0x00>;
			des_bit = <0x04>;
			index = <0x26>;
			used = <0x00>;
			timeout = <0x12c>;
		};

		mailbox-39 {
			compatible = "HiIPCV230,tx-mailbox-fast";
			func = <0x01 0x01 0x00>;
			src_bit = <0x00>;
			des_bit = <0x04>;
			index = <0x27>;
			used = <0x00>;
			timeout = <0x12c>;
		};

		mailbox-40 {
			compatible = "HiIPCV230,tx-mailbox-fast";
			func = <0x01 0x01 0x00>;
			src_bit = <0x00>;
			des_bit = <0x04>;
			index = <0x28>;
			used = <0x00>;
			timeout = <0x12c>;
		};

		mailbox-41 {
			compatible = "HiIPCV230,tx-mailbox-fast";
			func = <0x01 0x01 0x00>;
			src_bit = <0x00>;
			des_bit = <0x04>;
			index = <0x29>;
			used = <0x00>;
			timeout = <0x12c>;
		};

		mailbox-42 {
			compatible = "HiIPCV230,tx-mailbox-fast";
			func = <0x01 0x01 0x00>;
			src_bit = <0x00>;
			des_bit = <0x04>;
			index = <0x2a>;
			used = <0x00>;
			timeout = <0x12c>;
		};

		mailbox-43 {
			compatible = "HiIPCV230,tx-mailbox-fast";
			func = <0x01 0x01 0x00>;
			src_bit = <0x00>;
			des_bit = <0x04>;
			index = <0x2b>;
			used = <0x00>;
			timeout = <0x12c>;
		};

		mailbox-44 {
			compatible = "HiIPCV230,tx-mailbox-fast";
			func = <0x01 0x01 0x00>;
			src_bit = <0x00>;
			des_bit = <0x04>;
			index = <0x2c>;
			used = <0x00>;
			timeout = <0x12c>;
		};

		mailbox-45 {
			compatible = "HiIPCV230,tx-mailbox-fast";
			func = <0x01 0x01 0x00>;
			src_bit = <0x00>;
			des_bit = <0x04>;
			index = <0x2d>;
			used = <0x00>;
			timeout = <0x12c>;
		};

		mailbox-46 {
			compatible = "HiIPCV230,tx-mailbox-fast";
			func = <0x01 0x01 0x00>;
			src_bit = <0x00>;
			des_bit = <0x04>;
			index = <0x2e>;
			used = <0x00>;
			timeout = <0x12c>;
		};

		mailbox-47 {
			compatible = "HiIPCV230,tx-mailbox-fast";
			func = <0x01 0x01 0x00>;
			src_bit = <0x00>;
			des_bit = <0x04>;
			index = <0x2f>;
			used = <0x00>;
			timeout = <0x12c>;
		};

		mailbox-48 {
			compatible = "HiIPCV230,tx-mailbox-fast";
			func = <0x01 0x01 0x00>;
			src_bit = <0x00>;
			des_bit = <0x04>;
			index = <0x30>;
			used = <0x00>;
			timeout = <0x12c>;
		};

		mailbox-49 {
			compatible = "HiIPCV230,tx-mailbox-fast";
			func = <0x01 0x01 0x00>;
			src_bit = <0x00>;
			des_bit = <0x04>;
			index = <0x31>;
			used = <0x00>;
			timeout = <0x12c>;
		};

		mailbox-50 {
			compatible = "HiIPCV230,tx-mailbox-fast";
			func = <0x01 0x01 0x00>;
			src_bit = <0x00>;
			des_bit = <0x05>;
			index = <0x32>;
			used = <0x00>;
			rproc = "IPC_ACPU_IVP_MBX_1";
			timeout = <0x12c>;
		};

		mailbox-51 {
			compatible = "HiIPCV230,tx-mailbox-fast";
			func = <0x01 0x01 0x00>;
			src_bit = <0x00>;
			des_bit = <0x05>;
			index = <0x33>;
			used = <0x00>;
			rproc = "IPC_ACPU_IVP_MBX_2";
			timeout = <0x12c>;
		};

		mailbox-52 {
			compatible = "HiIPCV230,tx-mailbox-fast";
			func = <0x01 0x01 0x00>;
			src_bit = <0x00>;
			des_bit = <0x06>;
			index = <0x34>;
			used = <0x00>;
			rproc = "IPC_ACPU_IVP_MBX_3";
			timeout = <0x12c>;
		};

		mailbox-53 {
			compatible = "HiIPCV230,tx-mailbox-fast";
			func = <0x01 0x01 0x00>;
			src_bit = <0x00>;
			des_bit = <0x06>;
			index = <0x35>;
			used = <0x00>;
			rproc = "IPC_ACPU_IVP_MBX_4";
			timeout = <0x12c>;
		};

		mailbox-54 {
			compatible = "HiIPCV230,tx-mailbox-fast";
			func = <0x01 0x01 0x00>;
			src_bit = <0x00>;
			des_bit = <0x07>;
			index = <0x36>;
			used = <0x01>;
			rproc = "IPC_ACPU_ISP_MBX_1";
			timeout = <0x12c>;
		};

		mailbox-55 {
			compatible = "HiIPCV230,tx-mailbox-fast";
			func = <0x01 0x01 0x00>;
			src_bit = <0x00>;
			des_bit = <0x07>;
			index = <0x37>;
			used = <0x01>;
			rproc = "IPC_ACPU_ISP_MBX_2";
			timeout = <0x12c>;
		};

		mailbox-56 {
			compatible = "HiIPCV230,tx-mailbox-fast";
			func = <0x01 0x01 0x00>;
			src_bit = <0x00>;
			des_bit = <0x08>;
			index = <0x38>;
			used = <0x00>;
			timeout = <0x12c>;
		};

		mailbox-57 {
			compatible = "HiIPCV230,tx-mailbox-fast";
			func = <0x01 0x01 0x00>;
			src_bit = <0x00>;
			des_bit = <0x09>;
			index = <0x39>;
			used = <0x00>;
			timeout = <0x12c>;
		};

		mailbox-58 {
			compatible = "HiIPCV230,tx-mailbox-fast";
			func = <0x01 0x01 0x00>;
			src_bit = <0x00>;
			des_bit = <0x09>;
			index = <0x3a>;
			used = <0x00>;
			timeout = <0x12c>;
		};

		mailbox-59 {
			compatible = "HiIPCV230,tx-mailbox-fast";
			func = <0x01 0x01 0x00>;
			src_bit = <0x00>;
			des_bit = <0x09>;
			index = <0x3b>;
			used = <0x00>;
			timeout = <0x12c>;
		};

		mailbox-60 {
			compatible = "HiIPCV230,tx-mailbox-fast";
			func = <0x01 0x01 0x00>;
			src_bit = <0x00>;
			des_bit = <0x09>;
			index = <0x3c>;
			used = <0x00>;
			timeout = <0x12c>;
		};

		mailbox-61 {
			compatible = "HiIPCV230,tx-mailbox-fast";
			func = <0x01 0x01 0x00>;
			src_bit = <0x00>;
			des_bit = <0x09>;
			index = <0x3d>;
			used = <0x00>;
			timeout = <0x12c>;
		};

		mailbox-62 {
			compatible = "HiIPCV230,tx-mailbox-fast";
			func = <0x01 0x01 0x00>;
			src_bit = <0x00>;
			des_bit = <0x09>;
			index = <0x3e>;
			used = <0x00>;
			timeout = <0x12c>;
		};

		mailbox-63 {
			compatible = "HiIPCV230,mailbox-comm";
			func = <0x01 0x01 0x00>;
			src_bit = <0x00>;
			des_bit = <0x02>;
			index = <0x3f>;
			used = <0x01>;
			rproc = "IPC_ACPU_LPM3_MBX_8";
			timeout = <0x12c>;
		};

		mailbox-64 {
			compatible = "HiIPCV230,mailbox-comm";
			func = <0x01 0x01 0x00>;
			src_bit = <0x00>;
			des_bit = <0x02>;
			index = <0x40>;
			used = <0x01>;
			rproc = "IPC_ACPU_LPM3_MBX_9";
			timeout = <0x12c>;
		};

		mailbox-65 {
			compatible = "HiIPCV230,mailbox-comm";
			func = <0x01 0x01 0x00>;
			src_bit = <0x00>;
			des_bit = <0x03>;
			index = <0x41>;
			used = <0x01>;
			rproc = "IPC_ACPU_HIFI_MBX_2";
			timeout = <0x12c>;
		};

		mailbox-66 {
			compatible = "HiIPCV230,mailbox-comm";
			func = <0x01 0x01 0x00>;
			src_bit = <0x00>;
			des_bit = <0x03>;
			index = <0x42>;
			used = <0x00>;
			timeout = <0x12c>;
		};

		mailbox-67 {
			compatible = "HiIPCV230,mailbox-comm";
			func = <0x01 0x01 0x00>;
			src_bit = <0x00>;
			des_bit = <0x04>;
			index = <0x43>;
			used = <0x00>;
			timeout = <0x12c>;
		};

		mailbox-68 {
			compatible = "HiIPCV230,mailbox-comm";
			func = <0x01 0x01 0x00>;
			src_bit = <0x00>;
			des_bit = <0x04>;
			index = <0x44>;
			used = <0x00>;
			timeout = <0x12c>;
		};

		mailbox-69 {
			compatible = "HiIPCV230,mailbox-comm";
			func = <0x00 0x01 0x00>;
			src_bit = <0x00>;
			des_bit = <0x04>;
			index = <0x45>;
			used = <0x00>;
			timeout = <0x12c>;
		};
	};

	ipc@0xFB219000 {
		#address-cells = <0x02>;
		#size-cells = <0x02>;
		compatible = "hisilicon,HiIPCV230";
		reg = <0x00 0xfb219000 0x00 0x1000>;
		interrupts = <0x00 0x1b7 0x04 0x00 0x1b7 0x04>;
		clocks = <0x26>;
		clock-names = "apb_pclk";
		unlock_key = <0x1acce551>;
		capability = <0x08>;
		hardware_board_type = <0x00>;
		rproc_src_id = <0x01 0x01>;
		rproc_num = <0x03>;
		ipc_type = <0xc8>;
		rproc_name = "SENSORHUB", "ACPU", "ISP";
		status = "ok";
		mailboxes = <0x02>;
		phandle = <0x681>;

		ao-mailbox-0 {
			compatible = "HiIPCV230,tx-mailbox-fast";
			func = <0x01 0x01 0x00>;
			src_bit = <0x01>;
			des_bit = <0x00>;
			index = <0xc8>;
			used = <0x01>;
			rproc = "IPC_AO_ACPU_IOM3_MBX1";
			timeout = <0x15e>;
		};

		ao-mailbox-1 {
			compatible = "HiIPCV230,rx-mailbox-fast";
			func = <0x01 0x00 0x01>;
			interrupts = <0x00 0x1cf 0x04>;
			src_bit = <0x00>;
			des_bit = <0x01>;
			index = <0xc9>;
			used = <0x01>;
			rproc = "IPC_AO_IOM3_ACPU_MBX1";
			timeout = <0x12c>;
		};

		ao-mailbox-2 {
			compatible = "HiIPCV230,tx-mailbox-fast";
			func = <0x01 0x01 0x00>;
			src_bit = <0x01>;
			des_bit = <0x02>;
			index = <0xca>;
			used = <0x00>;
			timeout = <0x12c>;
		};

		ao-mailbox-3 {
			compatible = "HiIPCV230,tx-mailbox-fast";
			func = <0x01 0x01 0x00>;
			src_bit = <0x01>;
			des_bit = <0x00>;
			index = <0xcb>;
			used = <0x00>;
			timeout = <0x12c>;
		};

		ao-mailbox-4 {
			compatible = "HiIPCV230,tx-mailbox-fast";
			func = <0x01 0x01 0x00>;
			src_bit = <0x01>;
			des_bit = <0x00>;
			index = <0xcc>;
			used = <0x00>;
			timeout = <0x12c>;
		};

		ao-mailbox-5 {
			compatible = "HiIPCV230,tx-mailbox-fast";
			func = <0x01 0x01 0x00>;
			src_bit = <0x01>;
			des_bit = <0x00>;
			index = <0xcd>;
			used = <0x00>;
			timeout = <0x12c>;
		};

		ao-mailbox-6 {
			compatible = "HiIPCV230,rx-mailbox-fast";
			func = <0x01 0x00 0x01>;
			interrupts = <0x00 0x1d0 0x04>;
			src_bit = <0x00>;
			des_bit = <0x01>;
			index = <0xce>;
			used = <0x00>;
			timeout = <0x12c>;
		};

		ao-mailbox-7 {
			compatible = "HiIPCV230,rx-mailbox-fast";
			func = <0x01 0x00 0x01>;
			interrupts = <0x00 0x1d1 0x04>;
			src_bit = <0x00>;
			des_bit = <0x01>;
			index = <0xcf>;
			used = <0x00>;
			timeout = <0x12c>;
		};

		ao-mailbox-8 {
			compatible = "HiIPCV230,rx-mailbox-fast";
			func = <0x01 0x00 0x01>;
			interrupts = <0x00 0x1d2 0x04>;
			src_bit = <0x00>;
			des_bit = <0x01>;
			index = <0xd0>;
			used = <0x00>;
			timeout = <0x12c>;
		};

		ao-mailbox-9 {
			compatible = "HiIPCV230,mailbox-comm";
			func = <0x00 0x01 0x00>;
			src_bit = <0x01>;
			des_bit = <0x00>;
			index = <0xd1>;
			used = <0x00>;
			timeout = <0x12c>;
		};

		ao-mailbox-10 {
			compatible = "HiIPCV230,mailbox-comm";
			func = <0x00 0x01 0x00>;
			src_bit = <0x00>;
			des_bit = <0x01>;
			index = <0xd2>;
			used = <0x00>;
			timeout = <0x12c>;
		};
	};

	firmware {
		phandle = <0x682>;

		android {
			compatible = "android,firmware";
			boot_devices = "fa400000.ufs,fa500000.ufs,hi_mci.0";

			vbmeta {
				compatible = "android,vbmeta";
				parts = "vbmeta,boot,ramdisk,eng_system,eng_vendor,vbmeta_system,vbmeta_vendor,vbmeta_odm,vbmeta_hw_product,vbmeta_cust,version,preload,modem_driver,modem_vendor,preas,preavs";
				ta_parts = "boot,ramdisk,vbmeta_system,vbmeta_vendor,vbmeta_odm,vbmeta_hw_product,preas,preavs,vbmeta_cust";
			};

			fstab {
				compatible = "android,fstab";

				system_ext4 {
					mnt_point = "/system";
					dev = "system";
					type = "ext4";
					mnt_flags = "ro";
					fsmgr_flags = "wait,avb,logical";
					status = "ok";
				};

				system_erofs {
					mnt_point = "/system";
					dev = "system";
					type = "erofs";
					mnt_flags = "ro";
					fsmgr_flags = "wait,avb,logical";
					status = "ok";
				};

				vendor_ext4 {
					mnt_point = "/vendor";
					dev = "vendor";
					type = "ext4";
					mnt_flags = "ro";
					fsmgr_flags = "wait,avb,logical";
					status = "ok";
				};

				vendor_erofs {
					mnt_point = "/vendor";
					dev = "vendor";
					type = "erofs";
					mnt_flags = "ro";
					fsmgr_flags = "wait,avb,logical";
					status = "ok";
				};

				odm_ext4 {
					mnt_point = "/odm";
					dev = "odm";
					type = "ext4";
					mnt_flags = "ro";
					fsmgr_flags = "wait,avb,logical";
					status = "ok";
				};

				odm_erofs {
					mnt_point = "/odm";
					dev = "odm";
					type = "erofs";
					mnt_flags = "ro";
					fsmgr_flags = "wait,avb,logical";
					status = "ok";
				};

				cust_ext4 {
					mnt_point = "/cust";
					dev = "cust";
					type = "ext4";
					mnt_flags = "ro";
					fsmgr_flags = "wait,nofail,avb,logical";
					status = "ok";
				};

				cust_erofs {
					mnt_point = "/cust";
					dev = "cust";
					type = "erofs";
					mnt_flags = "ro";
					fsmgr_flags = "wait,nofail,avb,logical";
					status = "ok";
				};

				hw_product_ext4 {
					mnt_point = "/hw_product";
					dev = "hw_product";
					type = "ext4";
					mnt_flags = "ro";
					fsmgr_flags = "wait,nofail,avb,logical";
					status = "ok";
				};

				hw_product_erofs {
					mnt_point = "/hw_product";
					dev = "hw_product";
					type = "erofs";
					mnt_flags = "ro";
					fsmgr_flags = "wait,nofail,avb,logical";
					status = "ok";
				};

				version_ext4 {
					mnt_point = "/version";
					dev = "/dev/block/by-name/version";
					type = "ext4";
					mnt_flags = "ro";
					fsmgr_flags = "wait,nofail,avb";
					status = "ok";
				};

				version_erofs {
					mnt_point = "/version";
					dev = "/dev/block/by-name/version";
					type = "erofs";
					mnt_flags = "ro";
					fsmgr_flags = "wait,nofail,avb";
					status = "ok";
				};

				preload_ext4 {
					mnt_point = "/preload";
					dev = "/dev/block/by-name/preload";
					type = "ext4";
					mnt_flags = "ro";
					fsmgr_flags = "wait,nofail,avb";
					status = "ok";
				};

				preload_erofs {
					mnt_point = "/preload";
					dev = "/dev/block/by-name/preload";
					type = "erofs";
					mnt_flags = "ro";
					fsmgr_flags = "wait,nofail,avb";
					status = "ok";
				};

				modem_driver {
					mnt_point = "/vendor/modem/modem_driver";
					dev = "/dev/block/by-name/modem_driver";
					type = "ext4";
					mnt_flags = "ro,barrier=1";
					fsmgr_flags = "wait,avb";
					status = "ok";
				};

				modem_vendor {
					mnt_point = "/vendor/modem/modem_vendor";
					dev = "/dev/block/by-name/modem_vendor";
					type = "ext4";
					mnt_flags = "ro,barrier=1";
					fsmgr_flags = "wait,avb";
					status = "ok";
				};

				patch_ext4 {
					mnt_point = "/patch_hw";
					dev = "/dev/block/by-name/patch";
					type = "ext4";
					mnt_flags = "ro";
					fsmgr_flags = "wait,nofail,avb_keys=/patch_avb_key";
					status = "ok";
				};

				patch_erofs {
					mnt_point = "/patch_hw";
					dev = "/dev/block/by-name/patch";
					type = "erofs";
					mnt_flags = "ro";
					fsmgr_flags = "wait,nofail,avb_keys=/patch_avb_key";
					status = "ok";
				};

				preas_ext4 {
					mnt_point = "/preas";
					dev = "/dev/block/by-name/preas";
					type = "ext4";
					mnt_flags = "ro";
					fsmgr_flags = "wait,nofail,avb";
					status = "ok";
				};

				preas_erofs {
					mnt_point = "/preas";
					dev = "/dev/block/by-name/preas";
					type = "erofs";
					mnt_flags = "ro";
					fsmgr_flags = "wait,nofail,avb";
					status = "ok";
				};

				preavs_ext4 {
					mnt_point = "/vendor/preavs";
					dev = "/dev/block/by-name/preavs";
					type = "ext4";
					mnt_flags = "ro";
					fsmgr_flags = "wait,nofail,avb";
					status = "ok";
				};

				preavs_erofs {
					mnt_point = "/vendor/preavs";
					dev = "/dev/block/by-name/preavs";
					type = "erofs";
					mnt_flags = "ro";
					fsmgr_flags = "wait,nofail,avb";
					status = "ok";
				};

				metadata {
					mnt_point = "/metadata";
					dev = "/dev/block/by-name/metadata";
					type = "ext4";
					mnt_flags = "rw,noatime,nosuid,nodev,discard";
					fsmgr_flags = "wait,first_stage_mount";
					status = "ok";
				};
			};
		};
	};

	aliases {
		i2c2 = "/amba/i2c@FF88B000";
		i2c3 = "/amba/i2c@FF88C000";
		i2c4 = "/amba/i2c@FF88D000";
		i2c6 = "/amba/i2c@FF88E000";
		i2c7 = "/amba/i2c@FF88F000";
		i2c9 = "/amba/i2c@FB227000";
		serial0 = "/amba/uart@ff894000";
		serial4 = "/amba/uart@ff881000";
		serial5 = "/amba/uart@ff885000";
		serial6 = "/amba/uart@ffb82000";
		mshc1 = "/sdhci1@EFB01000";
		mshc2 = "/sdhci2@EFB01000";
		phandle = <0x683>;
	};

	usb_proxy_hcd {
		compatible = "hisilicon,proxy-hcd-hifi";
		base-quirk-devices = <0x10582627 0x105810b8 0x7815595 0x7815591 0x2ba31220 0x9301408 0x90c1000 0x90c3267 0x58f6387 0x7815588 0x95116ae 0x9511666 0x1f750902 0x105825a2 0xdd83908 0x48d1234 0x90c2000 0x21c40809 0xdd83200 0x3f00f59 0x10582621 0x174c235c 0x17ef3892 0x35353281 0x35352000>;
		qos-set = <0x141 0x02 0x4a4 0x01 0x01>;
		qos-reset = <0x141 0x02 0x4a4 0x00 0x01>;
		status = "ok";
		phandle = <0x684>;
	};

	hisi_usb_dp_ctrl@efa70000 {
		compatible = "hisilicon,usb_dp_ctrl";
		reg = <0x00 0xefa70000 0x00 0x1000>;
		phandle = <0x685>;
	};

	hsdt1crg_for_usb@efb02000 {
		compatible = "syscon";
		reg = <0x00 0xefb02000 0x00 0x1000>;
		#chip-usb-reg-cells = <0x04>;
		phandle = <0x144>;
	};

	pmc_for_usb@ffb81000 {
		compatible = "syscon";
		reg = <0x00 0xffb81000 0x00 0x1000>;
		#chip-usb-reg-cells = <0x04>;
		phandle = <0x145>;
	};

	sysctrl_for_usb@fb21b000 {
		compatible = "syscon";
		reg = <0x00 0xfb21b000 0x00 0x1000>;
		#chip-usb-reg-cells = <0x04>;
		phandle = <0x146>;
	};

	sysqic_ib_usb3@fb913000 {
		compatible = "syscon";
		reg = <0x00 0xfb913000 0x00 0x1000>;
		#chip-usb-reg-cells = <0x04>;
		phandle = <0x147>;
	};

	chip_usb_misc_ctrl@efa02000 {
		compatible = "hisilicon,usb-misc-ctrl", "syscon";
		reg = <0x00 0xefa02000 0x00 0x1000>;
		#chip-usb-reg-cells = <0x04>;
		clocks = <0x142 0x143>;
		clock-names = "pclk_usb_sctrl", "aclk_snp_usb3";
		misc_ctrl_reset = <0x144 0x00 0x20 0x20000000 0x00>;
		misc_ctrl_unreset = <0x144 0x00 0x24 0x20000000 0x00>;
		misc_ctrl_is_unreset = <0x144 0x03 0x28 0x00 0x20000000>;
		exit_noc_power_idle = <0x145 0x01 0x380 0x00 0x40>;
		exit_noc_power_idleack = <0x145 0x03 0x384 0x00 0x40>;
		enter_noc_power_idle = <0x145 0x01 0x380 0x40 0x40>;
		enter_noc_power_idleack = <0x145 0x03 0x384 0x40 0x40>;
		init_regcfgs = <0x141 0x00 0x35c 0x00 0x00>;
		sp_memory_need_config = <0x146 0x03 0x0c 0x00 0x8000>;
		sp_memory_config = <0x141 0x02 0x3c4 0x8000800 0x18001800 0x141 0x02 0x3c8 0x8000800 0x18001800 0x141 0x02 0x3cc 0x8000800 0x18001800>;
		tp_memory_need_config = <0x146 0x03 0x0c 0x00 0x100000>;
		tp_memory_config = <0x147 0x02 0x104 0x800 0x1800>;
		phandle = <0x141>;
	};

	usb2_phy {
		compatible = "hisilicon,usb2-phy-t5";
		#phy-cells = <0x00>;
		phy-reset = <0x144 0x00 0x20 0x8080 0x00>;
		phy-unreset = <0x144 0x00 0x24 0x80 0x00 0x144 0x00 0x24 0x8000 0x00>;
		clocks = <0x148 0x149>;
		clock-names = "clk_usb2phy_ref", "pclk_usb2phy";
		status = "ok";
		phy-supply = <0x14a>;
		vbus-valid = <0x141 0x00 0x04 0x01 0x00 0x141 0x00 0xbc 0x03 0x00 0x141 0x00 0x08 0x00 0x00 0x141 0x00 0x08 0x01 0x00>;
		vbus-invalid = <0x141 0x00 0x24c 0x01 0x00 0x141 0x00 0x04 0x00 0x00 0x141 0x00 0xbc 0x00 0x00 0x141 0x00 0x08 0x00 0x00 0x141 0x00 0x08 0x01 0x00>;
		set-eye-param-enable;
		host-eye-param = <0x14b 0x02 0x28 0x24b5 0x7fff 0x14b 0x02 0x20 0x6302 0x7fff 0x14b 0x02 0x3c 0x07 0x07 0x14b 0x02 0x38 0x200 0x780 0x14b 0x02 0x34 0x8000 0x8100>;
		device-eye-param = <0x14b 0x02 0x28 0x14b5 0x7fff 0x14b 0x02 0x20 0x6302 0x7fff 0x14b 0x02 0x38 0x200 0x780>;
		calibrate-enable;
		calibrate-para = <0x14b 0x02 0x30 0x37df 0x3fff>;
		bc12-detect-enable;
		bc12-detect-dcd = <0x141 0x02 0x100 0x00 0x01 0x141 0x02 0x74 0x05 0x07 0x141 0x02 0x84 0x05 0x07 0x141 0x02 0x9c 0x03 0x03 0x141 0x02 0x04 0x01 0x01 0x141 0x02 0x08 0x00 0x01 0x141 0x02 0x08 0x01 0x01 0x141 0x02 0xf8 0x01 0x01 0x141 0x02 0x204 0x01 0x01 0x141 0x02 0x214 0x01 0x01>;
		bc12-check-fsvplus = <0x141 0x03 0x1fc 0x00 0x01>;
		bc12-detect-dcd-end = <0x141 0x02 0x214 0x00 0x01 0x141 0x02 0xf8 0x00 0x01>;
		bc12-primary-detect = <0x14b 0x02 0x68 0x300 0x300 0x14b 0x02 0x38 0x580 0x780 0x141 0x02 0x204 0x01 0x01 0x141 0x02 0x208 0x01 0x01>;
		bc12-check-chrdet = <0x141 0x03 0x20c 0x01 0x01>;
		bc12-detect-sdp-stop = <0x141 0x02 0x204 0x00 0x01 0x141 0x02 0x208 0x00 0x01 0x14b 0x02 0x68 0x300 0x300 0x14b 0x02 0x38 0x580 0x780>;
		bc12-secondary-detect = <0x141 0x02 0x210 0x01 0x01 0x141 0x02 0x208 0x01 0x01 0x141 0x02 0x204 0x01 0x01>;
		bc12-secondary-detect-done = <0x14b 0x02 0x68 0x00 0x300 0x14b 0x02 0x38 0x200 0x780 0x141 0x02 0x210 0x00 0x01 0x141 0x02 0x208 0x00 0x01 0x141 0x02 0x204 0x00 0x01>;
		bc12-detect-cdp-done = <0x14b 0x02 0x68 0x300 0x300 0x14b 0x02 0x38 0x580 0x780 0x141 0x02 0x208 0x01 0x01 0x141 0x02 0x204 0x01 0x01 0x14b 0x02 0x68 0x00 0x300 0x14b 0x02 0x38 0x200 0x780 0x141 0x02 0x208 0x00 0x01 0x141 0x02 0x204 0x00 0x01>;
		bc12-detect-dcd-fail = <0x141 0x02 0x214 0x00 0x01 0x141 0x02 0x204 0x00 0x01 0x141 0x02 0xf8 0x00 0x01>;
		bc12-primary-detect-fail = <0x141 0x02 0x204 0x00 0x01 0x141 0x02 0x208 0x00 0x01 0x14b 0x02 0x68 0x00 0x300 0x14b 0x02 0x38 0x200 0x780>;
		bc12-detect-close = <0x141 0x02 0x74 0x01 0x07 0x141 0x02 0x84 0x01 0x07 0x141 0x02 0x9c 0x01 0x03 0x141 0x02 0x08 0x00 0x01 0x141 0x02 0x08 0x01 0x01>;
		dpdm-pullup = <0x14b 0x02 0x78 0xf000 0xf000 0x14b 0x02 0x78 0x00 0xf000>;
		dpdm-pulldown = <0x14b 0x02 0x78 0xf00 0xf00 0x14b 0x02 0x78 0x00 0xf00>;
		enable-vdp-src = <0x141 0x02 0x100 0x01 0x01 0x14b 0x02 0x60 0x802 0xc03 0x14b 0x02 0x78 0xaa00 0xff00 0x14b 0x02 0x6c 0x30 0x30 0x14b 0x02 0x4c 0x06 0x06>;
		disable-vdp-src = <0x141 0x02 0x100 0x00 0x01 0x14b 0x02 0x60 0x00 0xc03 0x14b 0x02 0x78 0x00 0xff00 0x14b 0x02 0x6c 0x00 0x30 0x14b 0x02 0x4c 0x00 0x06>;
		phandle = <0x14f>;
	};

	combophy_mcu@efd10000 {
		compatible = "hisilicon,combophy-mcu";
		reg = <0x00 0xefd10000 0x00 0x10000 0x00 0xefa40178 0x00 0x16>;
		status = "disable";
		mcu-unresets = <0x144 0x00 0x24 0xaa0000 0x00>;
		mcu-resets = <0x144 0x00 0x20 0xaa0000 0x00>;
		phandle = <0x686>;
	};

	combophy_phy@efa40000 {
		compatible = "hisilicon,combophy-phy";
		reg = <0x00 0xefa40000 0x00 0x8000>;
		#phy-cells = <0x01>;
		status = "ok";
		clocks = <0x14c 0x14d 0x14e>;
		clock-names = "clk_usb31phy_apb", "clk_hsdt1_eusb", "clk_usbdp_mcubus";
		combophy-pre-unreset = <0x144 0x00 0x24 0x400020 0x00>;
		combophy-post-unreset = <0x144 0x00 0x24 0x100000 0x00>;
		combophy-pre-reset = <0x144 0x00 0x20 0x400020 0x00>;
		combophy-post-reset = <0x144 0x00 0x20 0x100000 0x00>;
		txdrvctrl = <0x22>;
		txeqcoeff = <0x58a0e07f>;
		rxctrl0 = <0xf0000210>;
		rxctrl = <0x52500>;
		rxlosctrl = <0x66>;
		rxgsactrl = <0x208bf320>;
		rxeqactrl = <0x20160010>;
		pll0ckgctrlr0 = <0x41203d5>;
		termctrl = <0x80010>;
		pll0sscgcntr0 = <0x1040107>;
		txvcmctrl = <0x08>;
		config-ssc;
		config-quirk-device;
		is-combophy-v2;
		phandle = <0x150>;
	};

	hisi_usb {
		usb_host_wakelock_disable = <0x01>;
		usb_support_s3_wakeup;
		interrupt-names = "wakeup_irq";
		interrupts = <0x00 0x8c 0x04>;
		reg = <0x00 0xefc00000 0x00 0x100000>;
		compatible = "hisilicon,dwc3-usb";
		#address-cells = <0x02>;
		#size-cells = <0x02>;
		ranges;
		bc_again_flag = <0x01>;
		bc_unknown_again_flag = <0x02>;
		bc_dcp_again_flag = <0x01>;
		fpga_flag = <0x00>;
		dma_mask_bit = <0x40>;
		usb_support_dp = <0x00>;
		hifi_ip_first = <0x01>;
		host-maximum-speed = "super-speed";
		use_new_frame;
		notify_speed;
		phys = <0x14f 0x150 0x00>;
		phy-names = "usb2-phy", "usb3-phy";
		usb_tzpc_config;
		controller-list = "snps,dwc3";
		usbc_idx = <0x00>;
		status = "ok";
		phandle = <0x151>;

		combophy_func {
			compatible = "hisilicon,combophy-func";
			status = "ok";
		};

		dwc3@efc00000 {
			snps,xhci-support-s3-wakeup;
			compatible = "snps,dwc3";
			reg = <0x00 0xefc00000 0x00 0x100000>;
			interrupts = <0x00 0x8c 0x04>;
			interrupt-names = "irq";
			dr_mode = "otg";
			phy_type = "utmi";
			snps,hsphy_interface = "utmi";
			maximum-speed = "super-speed";
			linux,sysdev_is_parent;
			snps,ctrl_nyet_abnormal;
			snps,warm_reset_after_init;
			snps,dis-del-phy-power-chg-quirk;
			snps,dis_u2_susphy_quirk;
			snps,dis_u3_susphy_quirk;
			snps,tx_de_emphasis_quirk;
			snps,tx_de_emphasis = <0x01>;
			snps,dis-split-quirk;
			snps,gctl-reset-quirk;
			snps,xhci-delay-ctrl-data-stage;
			snps,dis-dcfg-lpm;
			snps,enable-hst-imm-retry;
			snps,disable-rx-thres;
			snps,clear-svc-opp-per-hs;
			snps,set-svc-opp-per-hs-sep;
			snps,adjust-dtout;
			snps,enable-p4-gate;
			snps,force-disable-host-lpm;
			extcon = <0x151>;
			clocks = <0x152 0x153 0x154 0x155 0x156 0x157>;
			clock-names = "clk_snp_usb3ctrl_ref", "clk_snp_usb3_suspend", "clk_hsdt1_usbdp", "aclk_usb3otg", "aclk_usb3otg_asyncbrg", "hclk_dcdr_mux";
			clk_hsdt1_usbdp = <0xc751640 0x6422c40>;
			reset = <0x144 0x00 0x20 0x52000 0x00>;
			unreset = <0x144 0x00 0x24 0x52000 0x00>;
			phys = <0x150 0x01>;
			phy-names = "usb3-phy";
			snps,en-host-u2-susphy-quirk;
			snps,filter-se0-fsls-quirk;
			snps,pullup-ulpi-reset-phy-quirk;
			snps,dis_u1u2_quirk;
			snps,loa-filter-en-quirk;
			phandle = <0x687>;
		};
	};

	mm,ion {
		compatible = "hisilicon,mm-ion";
		sec_alloc_sc_prot = <0x3e>;
		phandle = <0x688>;

		heap_sec_drm {
			status = "disabled";
		};

		heap_sys_user {
			heap-name = "sys_heap";
			heap-id = <0x00>;
			heap-base = <0x00>;
			heap-size = <0x00>;
			heap-type = "ion_system";
		};

		aod_normal_heap {
			heap-name = "aod_normal_heap";
			heap-type = "ion_dma";
			heap-id = <0x03>;
			heap-base = <0x00>;
			heap-size = "\n@", "";
			cma-name = "aod_dynamic_cma";
			status = "ok";
			phandle = <0x689>;
		};

		sec_heap {
			heap-name = "sec_heap";
			heap-type = "ion_sec_sg";
			heap-id = <0x05>;
			heap-base = <0x00>;
			heap-size = <0xc000000>;
			heap-attr = <0x03>;
			per-bit-size = <0x00 0x200000>;
			per-alloc-size = <0x00 0x200000>;
			status = "ok";
		};

		tiny_heap {
			heap-name = "tiny_heap";
			heap-type = "ion_sec_sg";
			heap-id = <0x07>;
			heap-base = <0x00>;
			heap-size = <0x2800000>;
			heap-attr = <0x02>;
			per-bit-size = <0x00 0x100000>;
			per-alloc-size = <0x00 0x800000>;
			status = "ok";
		};

		normal_sync_heap {
			heap-name = "normal_sync_heap";
			heap-type = "ion_sec";
			heap-id = <0x0e>;
			heap-base = <0x00>;
			heap-size = <0x10000000>;
			heap-attr = <0x00>;
			cma-type = <0x01>;
			cma-region = <0x158>;
			pool-shift = <0x0c>;
			per-alloc-size = <0x00 0x2000000>;
			per-bit-size = <0x00 0x200000>;
			status = "ok";
		};

		tui_normal_heap {
			heap-name = "tui_normal_heap";
			heap-type = "ion_sec";
			heap-id = <0x11>;
			heap-base = <0x00>;
			heap-size = <0x8000000>;
			heap-attr = <0x00>;
			cma-type = <0x01>;
			cma-region = <0x158>;
			pool-shift = <0x15>;
			per-alloc-size = <0x00 0x2000000>;
			per-bit-size = <0x00 0x200000>;
			status = "ok";
		};

		heap_sec_iris {
			heap-name = "heap_sec_iris";
			heap-type = "ion_sec_sg";
			heap-id = <0x12>;
			heap-base = <0x00>;
			heap-size = "\n@", "";
			heap-attr = <0x04>;
			per-bit-size = <0x00 0x200000>;
			per-alloc-size = <0x00 0x200000>;
			status = "ok";
		};

		heap_camera {
			heap-name = "camera_heap";
			heap-id = <0x13>;
			heap-base = <0xffffffff>;
			heap-size = <0xffffffff>;
			heap-type = "ion_dma_pool";
		};

		protect_heap {
			heap-name = "protect_heap";
			heap-type = "ion_sec_sg";
			heap-id = <0x14>;
			heap-base = <0x00>;
			heap-size = <0x10000000>;
			heap-attr = <0x05>;
			per-bit-size = <0x00 0x200000>;
			per-alloc-size = <0x00 0x200000>;
			status = "ok";
		};

		protect_cpa_heap {
			heap-name = "protect_cpa_heap";
			heap-type = "ion_cpa";
			heap-id = <0x16>;
			heap-base = <0x00>;
			heap-size = <0x28000000>;
			status = "ok";
		};

		isp_normal_heap {
			heap-name = "isp_normal_heap";
			heap-type = "ion_sec";
			heap-id = <0x18>;
			heap-base = <0x00>;
			heap-size = <0xa00000>;
			heap-attr = <0x00>;
			cma-type = <0x01>;
			cma-region = <0x159>;
			heap-svc-id = <0x07>;
			pool-shift = <0x15>;
			per-alloc-size = <0x00 0x600000>;
			per-bit-size = <0x00 0x200000>;
			status = "ok";
		};
	};

	media-zone {

		cam_reuse_cma {
			status = "ok";
			phandle = <0x68a>;
		};
	};

	mm,dmabuf_heap {
		compatible = "mm,dmabuf_heap";
		sec_alloc_sc_prot = <0x3e>;
		phandle = <0x68b>;

		system_heap {

			system_heap@0 {
				heap-name = "system_heap";
				heap-align = <0x1000>;
				status = "ok";
			};
		};

		carveout_heap {

			carveout_heap@1 {
				heap-name = "carveout_heap";
				heap-base = <0xbc000000>;
				heap-size = <0x4000000>;
				status = "disabled";
			};
		};

		secsg_heap {

			sec_heap@2 {
				heap-name = "sec_heap";
				heap-base = <0x00>;
				heap-size = <0xc000000>;
				heap-attr = <0x03>;
				per-bit-size = <0x00 0x200000>;
				per-alloc-size = <0x00 0x200000>;
				status = "ok";
			};

			iris_heap@3 {
				heap-name = "iris_heap";
				heap-base = <0x00>;
				heap-size = "\n@", "";
				heap-attr = <0x04>;
				per-bit-size = <0x00 0x200000>;
				per-alloc-size = <0x00 0x200000>;
				status = "ok";
			};

			tiny_heap@4 {
				heap-name = "tiny_heap";
				heap-base = <0x00>;
				heap-size = <0x2800000>;
				heap-attr = <0x02>;
				per-bit-size = <0x00 0x100000>;
				per-alloc-size = <0x00 0x800000>;
				status = "ok";
			};

			protect_heap@5 {
				heap-name = "protect_heap";
				heap-base = <0x00>;
				heap-size = <0x10000000>;
				heap-attr = <0x05>;
				per-bit-size = <0x00 0x200000>;
				per-alloc-size = <0x00 0x200000>;
				status = "ok";
			};
		};

		seccg_heap {

			misc_heap@6 {
				heap-name = "misc_heap";
				heap-base = <0x00>;
				heap-size = <0x10000000>;
				heap-attr = <0x00>;
				cma-type = <0x01>;
				pool-shift = <0x0c>;
				per-alloc-size = <0x00 0x2000000>;
				per-bit-size = <0x00 0x200000>;
				status = "ok";
			};

			tui_heap@7 {
				heap-name = "tui_heap";
				heap-base = <0x00>;
				heap-size = <0x8000000>;
				heap-attr = <0x00>;
				cma-type = <0x01>;
				pool-shift = <0x15>;
				per-alloc-size = <0x00 0x2000000>;
				per-bit-size = <0x00 0x200000>;
				status = "ok";
			};

			ispnn_heap@8 {
				heap-name = "ispnn_heap";
				heap-base = <0x00>;
				heap-size = <0x800000>;
				heap-attr = <0x07>;
				cma-type = <0x01>;
				pool-shift = <0x15>;
				per-alloc-size = <0x00 0x800000>;
				per-bit-size = <0x00 0x800000>;
				status = "ok";
			};
		};

		cma_heap {

			aod_heap@9 {
				heap-name = "aod_heap";
				heap-base = <0x00>;
				heap-size = "\n@", "";
				cma-name = "aod_dynamic_cma";
				status = "ok";
			};
		};

		cpa_heap {

			cpa_heap@10 {
				heap-name = "cpa_heap";
				heap-base = <0x00>;
				heap-size = <0x28000000>;
				status = "ok";
			};
		};

		dma_pool_heap {

			camera_heap@11 {
				heap-name = "camera_heap";
				heap-base = <0xffffffff>;
				heap-size = <0xffffffff>;
				status = "ok";
			};
		};
	};

	hw_vote@FF340000 {
		compatible = "freq-hw-vote";
		reg = <0x00 0xff340000 0x00 0x1000 0x00 0xe9f40000 0x00 0x1000>;

		little-freq {
			result_reg = <0xee0 0xfffff 0xfffff>;
			ratio = <0x01>;

			vote-src-1 {
				vote_reg = <0xe08 0x7fff 0x8000>;
			};
		};

		little-freq-top {
			result_reg = <0xedc 0xfffff 0xfffff>;
			ratio = <0x01>;

			vote-src-1 {
				vote_reg = <0xe00 0x7fff 0x8000>;
			};
		};

		middle-freq {
			result_reg = <0xee8 0xfffff 0xfffff>;
			ratio = <0x01>;

			vote-src-1 {
				vote_reg = <0xe18 0x7fff 0x8000>;
			};
		};

		middle-freq-top {
			result_reg = <0xee4 0xfffff 0xfffff>;
			ratio = <0x01>;

			vote-src-1 {
				vote_reg = <0xe10 0x7fff 0x8000>;
			};
		};

		big-freq {
			result_reg = <0xef0 0xfffff 0xfffff>;
			ratio = <0x01>;

			vote-src-1 {
				vote_reg = <0xe30 0x7fff 0x8000>;
			};
		};

		big-freq-top {
			result_reg = <0xeec 0xfffff 0xfffff>;
			ratio = <0x01>;

			vote-src-1 {
				vote_reg = <0xe20 0x7fff 0x8000>;
			};
		};

		gpu-freq {
			base_index = <0x01>;
			result_reg = <0xedc 0xfffff 0xfffff>;
			ratio = <0x01>;

			vote-src-1 {
				vote_reg = <0xe00 0x7fff 0x8000>;
			};

			vote-src-2 {
				vote_reg = <0xe0c 0x7fff0000 0x80000000>;
			};
		};

		l3-freq {
			result_reg = <0xef8 0xfffff 0xfffff>;
			ratio = <0x01>;

			vote-src-1 {
				vote_reg = <0xe50 0x7fff 0x8000>;
			};
		};

		l3-freq-top {
			result_reg = <0xef4 0xfffff 0xfffff>;
			ratio = <0x01>;

			vote-src-1 {
				vote_reg = <0xe40 0x7fff 0x8000>;
			};
		};
	};

	efuse {
		compatible = "vendor, efuse";
		efuse_mem_attr_group_max = <0x40>;
		efuse_mem_attr_huk = <0x100>;
		efuse_mem_attr_scp = <0x40>;
		efuse_mem_attr_authkey = <0x80>;
		efuse_mem_attr_chipid = <0x40>;
		efuse_mem_attr_tsensor_calibration = <0x37>;
		efuse_mem_attr_huk_rd_disable = <0x03>;
		efuse_mem_attr_authkey_rd_disable = <0x01>;
		efuse_mem_attr_dbg_class_ctrl = <0x02>;
		efuse_mem_attr_dieid = <0xa0>;
		efuse_mem_attr_sltfinishflag = <0x03>;
		efuse_mem_attr_modem_avs = <0x18>;
		phandle = <0x68c>;
	};

	rdr_save_regs {
		compatible = "hisilicon,rdr_save_regs";
		status = "ok";
	};

	rdr_ap_adapter@2F900000 {
		compatible = "hisilicon,rdr_ap_adapter";
		reg-dump-regions = <0x03>;
		reg-names = "sctrl", "pctrl", "peri_crg";
		reg = <0x00 0xfb21b000 0x00 0x800 0x00 0xff7cc000 0x00 0xc00 0x00 0xffb85000 0x00 0xc00>;
		ldrx2dbg-abs-timer = <0xfb21b000 0x1000 0x534 0x538>;
		ap_trace_irq_size = "", "\bp";
		ap_trace_task_size = "", "\bp";
		ap_trace_cpu_idle_size = <0x48000>;
		ap_trace_worker_size = <0x9000>;
		ap_trace_mem_alloc_size = "", "\bp";
		ap_trace_ion_alloc_size = "", "\bp";
		ap_trace_time_size = <0x48000>;
		ap_trace_cpu_on_off_size = <0x400>;
		ap_trace_syscall_size = <0x00>;
		ap_trace_hung_task_size = <0x1000>;
		ap_trace_tasklet_size = <0x2000>;
		ap_trace_diaginfo_size = <0x10000>;
		ap_last_task_switch = <0x01>;
		ap_dump_mem_modu_noc_size = <0x1000>;
		ap_dump_mem_modu_ddr_size = <0x2000>;
		ap_dump_mem_modu_tmc_size = <0x20000>;
		ap_dump_mem_modu_mntn_fac_size = <0x400>;
		ap_dump_mem_modu_smmu_size = <0x4000>;
		ap_dump_mem_modu_qic_size = <0x1000>;
		ap_dump_mem_modu_gap_size = <0x100>;
		status = "ok";
		phandle = <0x68d>;
	};

	ramoops {
		compatible = "ramoops";
		memory-region = <0x15a>;
		#address-cells = <0x02>;
		#size-cells = <0x02>;
		record-size = <0x00 0x20000>;
		console-size = <0x00 0x80000>;
		ftrace-size = <0x00 0x00>;
		pmsg-size = <0x00 0x20000>;
		dump-oops = <0x01>;
		ecc-size = <0x00>;
	};

	exceptiontrace {
		compatible = "hisilicon,exceptiontrace";
		area_num = <0x02>;
		area_names = "AP", "BL31";
		area_sizes = <0x200 0x3f100>;
		status = "ok";
		phandle = <0x68e>;
	};

	powerhold@FB22A000 {
		compatible = "hisilicon,powerhold";
		reg = <0x00 0xfb22a000 0x00 0x1000>;
		offset = <0x00>;
		powerhold_protect_offset = <0x31c>;
		powerhold_protect_bit = <0x0f>;
		powerhold_gpio = <0xb0>;
		gpio_v500_flag;
		status = "disabled";
		phandle = <0x68f>;
	};

	bl31_log {
		compatible = "atf,bl31_log";
		memory-region = <0x110>;
		status = "okay";
		phandle = <0x690>;
	};

	hifi-cma {
		compatible = "hisilicon,hifi-cma";
		memory-region = <0x110>;
		enable-status = "true";
		audio-align = <0x06>;
		cma-sec-config = "secos";
		status = "ok";
	};

	pimon_mntn {
		compatible = "hisilicon,pimon_mntn";
		interrupts = <0x00 0x90 0x04>;
	};

	hisi-l3cache-ecc {
		compatible = "hisilicon,hisi-l3cache-ecc";
		interrupts = <0x00 0x00 0x04 0x00 0x09 0x04>;
		interrupt-names = "errirq", "faultirq";
		status = "disabled";
	};

	dfx_partition {
		compatible = "hisilicon,dfx_partition";
		dfx_module_num = <0x02>;
		dfx_noreboot_size = <0x700000>;
		dfx_zerohung_size = <0x10000>;
	};

	sp_mntn {
		compatible = "hisilicon,sp_mntn";
		sp_mntn_fcm_baseaddr = <0xfd010000>;
		BIGCORE_PARTNUM = <0xd40>;
		LITTLECORE_PARTNUM = <0xd05>;
		reg_offset = <0x1000>;
	};

	sctrl_address {
		compatible = "hisilicon,sctrl_address";
		base_addr = <0xfb21b000>;
		lpctrl_offset = <0x980>;
		bakdata5_offset = <0x420>;
		bakdata10_offset = <0x434>;
		status = "ok";
	};

	qice_address {
		compatible = "hisilicon,qice_address";
		base_addr = <0xff900000>;
		status = "ok";
	};

	gicv600_address {
		compatible = "hisilicon,gicv600_address";
		base_addr = <0xff000000>;
		status = "ok";
	};

	bl31_share_address {
		compatible = "hisilicon,bl31_share_address";
		base_addr = <0x10941000>;
		status = "ok";
	};

	dmss_opti_mntn {
		compatible = "hisilicon,dmss_opti_mntn";
		mid_max = <0x7f>;
	};

	jtagmux {
		compatible = "hisilicon,jtagmux";
		sdio-ldo = <0x125>;
		simio0-ldo = <0x15b>;
		simio1-ldo = <0x15c>;
	};

	syscounter@0xFB216000 {
		compatible = "hisilicon,syscounter-driver";
		reg = <0x00 0xfb216000 0x00 0x2000>;
		clock-rate = <0x00 0x1d4c00>;
		sync-interval = <0x36ee80>;
		phandle = <0x691>;
	};

	contexthub {
		compatible = "hisilicon,contexthub_status";
		hardware_bypass = <0x00>;
		status = "disabled";
		phandle = <0x692>;

		flp_geofence {
			compatible = "hisilicon,flp_geofence";
			lpm = <0x00>;
			unavail_timeout = <0x1e>;
			valid_accuracy = <0x32>;
			high_accuracy = <0x10>;
			min_off_time = <0xb4>;
			prestart_time = <0x0f>;
			vehicle_speed = <0x78>;
			riding_speed = <0x32>;
			walking_speed = <0x05>;
			running_speed = <0x24>;
		};

		timestamp {
			compatible = "hisilicon,ch_timestamp";
			clock_rate = <0x1d4c00>;
		};

		sensorhub_ipc_cfg {
			compatible = "hisilicon,sensorhub_ipc_cfg";
			AP_IOM_MBX_NUM = <0xc8>;
			IOM_AP_MBX_NUM = <0xc9>;
		};
	};

	mlps {
		compatible = "hisilicon,mlps";
		status = "ok";
		operate_conn = "ok";
		phandle = <0x693>;
	};

	ar {
		compatible = "hisilicon,hismart-ar";
		status = "ok";
		ar_support_num = <0x11>;
		ar_support_list = "in_vehicle", "on_bicycle", "walking", "running", "still", "fast_walking", "high_speed_rail", "on_foot", "elevator", "relative_still", "walking_handhold", "lying_posture", "smart_flight", "plane", "stay", "metro", "auto";
		phandle = <0x694>;
	};

	smart-plt {
		compatible = "hisilicon,smart-plt";
		status = "ok";
		phandle = <0x695>;
	};

	ddr_buff@0x106BF000 {
		compatible = "hisilicon,ddr_buff";
		reg = <0x106bf000 0x1000 0x10640000 0x7d000 0x10607c00 0x1c200 0x10623e00 0x1c200 0x10606c00 0x1000 0x10000000 0x600000 0x10000000 0x180000 0x10180000 0x80000 0x14500000 0x100000 0x14500000 0x2a000 0x1452a000 0x2a000 0x14554000 0x2a000 0x1457e000 0x2a000 0x145a8000 0x2a000 0x145d2000 0x2a000>;
		status = "ok";
		phandle = <0x696>;
	};

	soc_syscounter_reg_addr@0x00001008 {
		compatible = "hisilicon,soc_syscounter_reg_addr";
		reg = <0x1008 0x100c>;
		status = "ok";
		phandle = <0x697>;
	};

	contexhub_boot_stat_sctrl_offset@0x478 {
		compatible = "hisilicon,contexhub_boot_stat_sctrl_offset";
		reg = <0x478>;
		status = "ok";
		phandle = <0x698>;
	};

	contexthub_mntn {
		compatible = "hisilicon,contexthub_mntn";
		iomcu_stat_reg = <0x58c>;
		sc_intr_wakeup_reg = <0x14>;
		status = "ok";
		phandle = <0x699>;
	};

	sensorhub_qic_mid {
		compatible = "hisilicon,sensorhub_qic_mid";
		qic_mid = <0x1a 0x01>;
	};

	softtimer@FB205000 {
		compatible = "hisilicon,contexthub-softtimer";
		status = "ok";
		reg = <0x00 0xfb205000 0x00 0x1000>;
		interrupts = <0x00 0x42 0x04>;
		clocks = <0x15d>;
		clock-names = "clk_timer5";
		phandle = <0x69a>;
	};

	playback {
		compatible = "hisilicon,Contexthub-playback";
		status = "disabled";
	};

	flp {
		compatible = "hisilicon,flp-common";
		status = "ok";
		phandle = <0x69b>;
	};

	ble {
		compatible = "hisilicon,contexthub_ble";
		status = "ok";
		phandle = <0x69c>;
	};

	swing_dev {
		compatible = "hisilicon,igs-dev";
		level2_chip = <0x00>;
		hardware_bypass = <0x00>;
		status = "disabled";
		npu-avs-volt = <0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00>;
		pa-code-margin = <0x00 0x00>;
		phandle = <0x69d>;
	};

	swing_dbg {
		compatible = "hisilicon,swing-dbg";
		status = "ok";
		phandle = <0x69e>;
	};

	swing_tof_sensor {
		compatible = "huawei,swing_tof_sensor";
		status = "ok";
		phandle = <0x69f>;
	};

	dev {
		compatible = "hisilicon,swing-cam";
		status = "ok";
		phandle = <0x6a0>;
	};

	swing_tof_dev {
		compatible = "hisilicon,swing-tof-dev";
		status = "ok";
		phandle = <0x6a1>;
	};

	iomcu_di {
		compatible = "hisilicon,iomcu_di";
		status = "ok";
		phandle = <0x6a2>;
	};

	recovery_iomcu_image_skip {
		compatible = "hisilicon,recovery_iomcu_image_skip";
		status = "ok";
	};

	iomcu_ao_ns_ipc@FB219000 {
		compatible = "hisilicon,iomcu_ao_ns_ipc";
		reg = <0x00 0xfb219000 0x00 0x1000>;
		mailno = <0x03 0x04 0x05>;
		status = "ok";
		phandle = <0x6a3>;
	};

	iomcu_logic {
		compatible = "hisilicon,iomcu_logic";
		logic_available_pair = <0xff7cd014 0x02>;
		status = "disabled";
		phandle = <0x6a4>;
	};

	vendor,chip_isp350 {
		pinctrl-3 = <0x22e 0x230 0x239 0x23b>;
		pinctrl-2 = <0x22d 0x22f 0x238 0x23a>;
		pinctrl-1 = <0x1ba 0x1bc 0x1be 0x1c0 0x2b 0x2c 0x1c2 0x1c4 0x1c6 0x1c8 0x1ca 0x1ce 0x1d2 0x2bd 0x2bf 0x317 0x1ed 0x1ef 0x1f1 0x1f3 0x2d 0x2e 0x1f5 0x1f7 0x1f9 0x1fb 0x1fd 0x201 0x205 0x360 0x362 0x3ba 0x268 0x26a 0x26c 0x278>;
		pinctrl-0 = <0x1b9 0x1bb 0x1bd 0x1bf 0x27 0x28 0x1c1 0x1c3 0x1c5 0x1c7 0x1c9 0x1cd 0x1d1 0x2bc 0x2be 0x316 0x1ec 0x1ee 0x1f0 0x1f2 0x29 0x2a 0x1f4 0x1f6 0x1f8 0x1fa 0x1fc 0x200 0x204 0x35f 0x361 0x3b9 0x267 0x269 0x26b 0x277>;
		pinctrl-names = "default", "idle", "i3c-default", "i3c-idle";
		pinctrl-extra-pairs = "i3c";
		compatible = "vendor,chip_isp350";
		hisi,product_name = "charlotte";
		vendor,is_fpga = <0x00>;
		clocks = <0x11a>;
		clock-names = "aclk_isp";
		status = "ok";
		phandle = <0x6a5>;
	};

	vendor,vendor_camera {
		phandle = <0x6a6>;
	};

	huawei,camcfgdev {
		compatible = "huawei,camcfgdev";
		vendor,binderized = <0x01>;
		status = "ok";
	};

	vendor,cam_sync {
		compatible = "vendor,cam_sync";
		status = "ok";
	};

	vendor,cam_buf {
		compatible = "vendor,cam_buf";
		vendor,devtype = <0x00>;
		status = "ok";
		iommus = <0xf6 0x03 0x00>;
		secmemtype = <0x01>;
		tlb_flush = <0x01>;
		phandle = <0x6a7>;

		iova_info {
			start-addr = <0x00 0x200000>;
			size = <0x01 0x00>;
			iova-align = <0x00 0x200000>;
		};
	};

	vendor,cam_buf1 {
		compatible = "vendor,cam_buf_v3";
		vendor,devtype = <0x01>;
		status = "ok";
		iommus = <0xf6 0x02 0x00>;
		tlb_flush = <0x01>;
		phandle = <0x6a8>;
	};

	vendor,cam_buf2 {
		compatible = "vendor,cam_buf_v3";
		vendor,devtype = <0x02>;
		status = "ok";
		iommus = <0x111 0x08 0x00>;
		vendor,support-iova-padding = <0x00>;
		phandle = <0x6a9>;

		iova_info {
			start-addr = <0x00 0x800000>;
			size = <0x00 0xbf800000>;
			iova-align = <0x00 0x8000>;
		};
	};

	vendor,cam_buf3 {
		compatible = "vendor,cam_buf_v3";
		vendor,devtype = <0x04>;
		status = "ok";
		iommus = <0x111 0x08 0x02>;
		phandle = <0x6aa>;

		iova_info {
			start-addr = <0x00 0x800000>;
			size = <0x00 0xbf800000>;
			iova-align = <0x00 0x8000>;
		};
	};

	vendor,cam_buf4 {
		compatible = "vendor,cam_buf_v3";
		vendor,devtype = <0x05>;
		status = "ok";
		iommus = <0x111 0x08 0x03>;
		phandle = <0x6ab>;

		iova_info {
			start-addr = <0x00 0x800000>;
			size = <0x00 0xbf800000>;
			iova-align = <0x00 0x8000>;
		};
	};

	vendor,cam_buf5 {
		compatible = "vendor,cam_buf_v3";
		vendor,devtype = <0x07>;
		status = "ok";
		iommus = <0x111 0x08 0x05>;
		phandle = <0x6ac>;

		iova_info {
			start-addr = <0x00 0x800000>;
			size = <0x00 0xbf800000>;
			iova-align = <0x00 0x8000>;
		};
	};

	vendor,cam_buf6 {
		compatible = "vendor,cam_buf_v3";
		vendor,devtype = <0x08>;
		status = "ok";
		iommus = <0x111 0x08 0x06>;
		phandle = <0x6ad>;

		iova_info {
			start-addr = <0x00 0x800000>;
			size = <0x00 0xbf800000>;
			iova-align = <0x00 0x8000>;
		};
	};

	vendor,cam_buf7 {
		compatible = "vendor,cam_buf_v3";
		vendor,devtype = <0x09>;
		status = "ok";
		iommus = <0x111 0x08 0x07>;
		phandle = <0x6ae>;

		iova_info {
			start-addr = <0x00 0x800000>;
			size = <0x00 0xbf800000>;
			iova-align = <0x00 0x8000>;
		};
	};

	vendor,cam_buf8 {
		compatible = "vendor,cam_buf_v3";
		vendor,devtype = <0x0a>;
		status = "ok";
		iommus = <0x111 0x08 0x08>;
		phandle = <0x6af>;

		iova_info {
			start-addr = <0x00 0x800000>;
			size = <0x00 0xbf800000>;
			iova-align = <0x00 0x8000>;
		};
	};

	vendor,cam_buf9 {
		compatible = "vendor,cam_buf_v3";
		vendor,devtype = <0x03>;
		status = "ok";
		iommus = <0x111 0x08 0x0e>;
		phandle = <0x6b0>;

		iova_info {
			start-addr = <0x00 0x800000>;
			size = <0x00 0xbf800000>;
			iova-align = <0x00 0x8000>;
		};
	};

	vendor,hjpeg@E8C00000 {
		compatible = "vendor,hjpeg";
		vendor,hjpeg-base = <0xe8c00000 0x1000>;
		vendor,smmu-base = <0xe8c60000 0x3000>;
		vendor,cvdr-base = <0xe8c06000 0x2000>;
		vendor,secadapt-base = <0xe8c63000 0x1000>;
		vendor,sid-ssid = <0x08 0x00>;
		vendor,jpgen-swid = <0x03 0x03>;
		vendor,subctrl-base = <0xe8c04000 0x1000>;
		vendor,chip_type = <0x01>;
		vendor,irq-merge = <0x02>;
		vendor,prefetch_bypass = <0x01>;
		vendor,smmu_bypass = <0x00>;
		vendor,smmu_type = <0x02>;
		vendor,power_control = <0x03>;
		vendor,cvdr = <0x00 0x04 0x1e>;
		vendor,stream_id = <0x00 0x04 0x05>;
		vendor,qos_update = <0x01>;
		vendor,iova_update = <0x01>;
		vendor,pix_format_update = <0x02>;
		vendor,wr_port_addr_update = <0x01>;
		vendor,clk_ctl_offset = <0x01>;
		vendor,cvdr_limiter_du = <0x0f 0x0f 0x0f>;
		vendor,support-iova-padding = <0x00>;
		vendor,max_encode_size = <0x8000 0x8000>;
		jpegclk-rate-mode = <0x00>;
		jpegclk-lowfreq-mode = <0x01>;
		jpegclk-offfreq-mode = <0x04>;
		vendor,use_platform_config = <0x01>;
		reg = <0x00 0xe8c00000 0x00 0x1000>;
		interrupts = <0x00 0xa6 0x04>;
		hjpeg-srt-supply = <0x113>;
		hjpeg-media-supply = <0x112>;
		status = "ok";
		iommus = <0x111 0x08 0x00>;
		phandle = <0x6b1>;

		iova_info {
			start-addr = <0x00 0x800000>;
			size = <0x00 0xbf800000>;
			iova-align = <0x00 0x8000>;
		};
	};

	sensorhub {
		#address-cells = <0x01>;
		#size-cells = <0x00>;
		phandle = <0x6b2>;

		connectivity {
			phandle = <0x891>;
			#size-cells = <0x00>;
			#address-cells = <0x01>;

			connectivity1 {
				status = "ok";
				gpio3_wakeup_gps_pinmux = <0x02>;
				gpio3_wakeup_gps_sh = <0x3f8>;
				gpio3_wakeup_gps_ap = <0xd6>;
				gpio2_gps_ready_pinmux = <0x02>;
				gpio2_gps_ready_sh = <0x3fb>;
				gpio2_gps_ready_ap = <0xdd>;
				gpio1_gps_cmd_pinmux = <0x02>;
				gpio1_gps_cmd_sh = <0x3fa>;
				gpio1_gps_cmd_ap = <0xdc>;
				sensor_type = "connectivity";
				file_id = <0x2f>;
				chip_id_value = <0x00>;
				chip_id_register = <0x91>;
				reg = <0x6e>;
				i2c_address = <0x6e>;
				bus_number = <0x03>;
				bus_type = "i3c";
				compatible = "huawei,connectivity-vs";
			};
		};

		light {
			#address-cells = <0x01>;
			#size-cells = <0x00>;
			phandle = <0x6b3>;

			als1 {
				vendor = "STK";
				sensorlist_name = "als-stk3338";
				als_extend_data = <0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00>;
				is_close = <0x01>;
				als_phone_version = <0x0a>;
				als_phone_type = <0x52>;
				aux_prop = <0x01>;
				is_cali_supported = <0x01>;
				compatible = "huawei,arrow_stk3338";
				bus_number = <0x00>;
				reg = <0x47>;
				chip_id_register = <0x3e>;
				chip_id_value = <0x58>;
				file_id = <0xcd>;
				sensor_list_info_id = <0x23>;
				sensor_type = "als1";
				poll_interval = <0x15e>;
				threshold_value = <0x01>;
				GA1 = <0x1046>;
				GA2 = <0xf3c>;
				GA3 = <0x1194>;
				tp_color = <0x00>;
				again = <0x01>;
				atime = <0xdb>;
				init_time = <0x96>;
				status = "ok";
			};

			als2 {
				vendor = "liteon";
				sensorlist_name = "als-ltr2568";
				als_extend_data = <0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00>;
				is_close = <0x01>;
				als_phone_version = <0x0a>;
				als_phone_type = <0x52>;
				status = "ok";
				poll_interval = <0x15e>;
				aux_prop = <0x01>;
				sensor_type = "als1";
				sensor_list_info_id = <0x23>;
				file_id = <0x7a>;
				chip_id_value = <0x1c>;
				chip_id_register = <0x86>;
				reg = <0x23>;
				bus_number = <0x00>;
				compatible = "huawei,liteon_ltr2568";
				is_cali_supported = <0x01>;
			};

			als3 {
			};

			als4 {
			};

			als5 {
			};

			als6 {
			};
		};

		proximity {
			#address-cells = <0x01>;
			#size-cells = <0x00>;
			phandle = <0x6b4>;

			ps1 {
				compatible = "huawei,txc-pa224";
				bus_number = <0x00>;
				reg = <0x1e>;
				chip_id_register = <0x7f>;
				chip_id_value = <0x11>;
				file_id = <0x27>;
				sensor_list_info_id = <0x04>;
				sensor_type = "ps";
				tp_color = <0x00>;
				min_proximity_value = <0xdc>;
				pwindows_value = <0x0e>;
				pwave_value = <0x0c>;
				threshold_value = <0x19>;
				ps_pulse_count = <0x05>;
				persistent = <0x33>;
				rdata_under_sun = <0x157c>;
				ptime = <0xff>;
				p_on = <0x00>;
				poll_interval = <0x1e>;
				init_time = <0x32>;
				status = "disabled";
			};

			ps2 {
			};
		};

		gsensor {
			#address-cells = <0x01>;
			#size-cells = <0x00>;
			phandle = <0x6b5>;

			acc1 {
				calibrate_way = <0x01>;
				maxDelay = <0x30d40>;
				fifoMaxEventCount = <0x00>;
				fifoReservedEventCount = <0x00>;
				minDelay = <0x7d0>;
				power = <0xe6>;
				maxRange = <0x08>;
				vendor = "st";
				sensorlist_name = "accelerometer-lsm6dsm";
				z_calibrate_thredhold = <0x140>;
				y_calibrate_thredhold = <0xfa>;
				x_calibrate_thredhold = <0xfa>;
				calibrate_style = <0x00>;
				used_int_pin = <0x01>;
				gpio_int2_sh_func = <0x02>;
				gpio_int2_sh = <0x3f4>;
				gpio_int2 = <0xf5 0x04 0x00>;
				gpio_int1 = <0xf5 0x04 0x00>;
				sensitivity_z = <0x01>;
				sensitivity_y = <0x01>;
				sensitivity_x = <0x01>;
				i2c_address = <0x6a>;
				bus_type = "i3c";
				compatible = "huawei,st-lsm6dsm";
				bus_number = <0x02>;
				reg = <0x6a>;
				chip_id_register = <0x0f>;
				chip_id_value = <0x6a>;
				file_id = <0x22>;
				sensor_list_info_id = <0x00>;
				sensor_type = "acc";
				axis_map_x = <0x01>;
				axis_map_y = <0x00>;
				axis_map_z = <0x02>;
				negate_x = <0x01>;
				negate_y = <0x00>;
				negate_z = <0x00>;
				offset_x = <0x00>;
				offset_y = <0x00>;
				offset_z = <0x00>;
				poll_interval = <0x0a>;
				status = "ok";
			};

			acc2 {
				status = "disabled";
				calibrate_way = <0x01>;
				maxDelay = <0x30d40>;
				fifoMaxEventCount = <0x00>;
				fifoReservedEventCount = <0x00>;
				minDelay = <0x7d0>;
				power = <0xe6>;
				maxRange = <0x08>;
				vendor = "invensense";
				sensorlist_name = "accelerometer-icm20690";
				z_calibrate_thredhold = <0x140>;
				y_calibrate_thredhold = <0xfa>;
				x_calibrate_thredhold = <0xfa>;
				used_int_pin = <0x01>;
				calibrate_style = <0x00>;
				gpio_int2_sh_func = <0x02>;
				gpio_int2_sh = <0x3f4>;
				gpio_int2 = <0xf5 0x04 0x00>;
				gpio_int1 = <0xf5 0x04 0x00>;
				poll_interval = <0x0a>;
				sensitivity_z = <0x01>;
				sensitivity_y = <0x01>;
				sensitivity_x = <0x01>;
				offset_z = <0x00>;
				offset_y = <0x00>;
				offset_x = <0x00>;
				negate_z = <0x00>;
				negate_y = <0x00>;
				negate_x = <0x01>;
				axis_map_z = <0x02>;
				axis_map_y = <0x00>;
				axis_map_x = <0x01>;
				sensor_type = "acc";
				sensor_list_info_id = <0x00>;
				file_id = <0x35>;
				chip_id_value = <0x20>;
				chip_id_register = <0x75>;
				reg = <0x68>;
				i2c_address = <0x68>;
				bus_number = <0x02>;
				bus_type = "i3c";
				compatible = "huawei,invensense-icm20690";
			};

			acc3 {
			};

			acc4 {
			};

			acc5 {
			};

			acc6 {
			};

			acc7 {
			};

			acc8 {
			};
		};

		gyroscope {
			#address-cells = <0x01>;
			#size-cells = <0x00>;
			phandle = <0x6b6>;

			gyro1 {
				calibrate_way = <0x01>;
				maxDelay = <0x30d40>;
				minDelay = <0x7d0>;
				vendor = "st";
				sensorlist_name = "gyroscope-lsm6dsm";
				calibrate_thredhold = <0x23c>;
				gpio_int2_sh = <0x3f4>;
				gpio_int2 = <0xf5 0x04 0x00>;
				gpio_int1 = <0xf5 0x04 0x00>;
				position = <0x02>;
				i2c_address = <0x6a>;
				bus_type = "i3c";
				compatible = "huawei,st-lsm6dsm";
				bus_number = <0x02>;
				reg = <0x6a>;
				chip_id_register = <0x0f>;
				chip_id_value = <0x6a>;
				file_id = <0x24>;
				sensor_list_info_id = <0x05>;
				sensor_type = "gyro";
				axis_map_x = <0x01>;
				axis_map_y = <0x00>;
				axis_map_z = <0x02>;
				negate_x = <0x01>;
				negate_y = <0x00>;
				negate_z = <0x00>;
				poll_interval = <0x0a>;
				status = "ok";
			};

			gyro2 {
				status = "disabled";
				calibrate_way = <0x01>;
				maxDelay = <0x30d40>;
				minDelay = <0x7d0>;
				vendor = "invensense";
				sensorlist_name = "gyroscope-icm20690";
				gpio_int2_sh = <0x3f4>;
				gpio_int2 = <0xf5 0x04 0x00>;
				gpio_int1 = <0xf5 0x04 0x00>;
				poll_interval = <0x0a>;
				negate_z = <0x00>;
				negate_y = <0x00>;
				negate_x = <0x01>;
				axis_map_z = <0x02>;
				axis_map_y = <0x00>;
				axis_map_x = <0x01>;
				position = <0x02>;
				sensor_type = "gyro";
				sensor_list_info_id = <0x05>;
				file_id = <0x36>;
				chip_id_value = <0x20>;
				chip_id_register = <0x75>;
				reg = <0x68>;
				i2c_address = <0x68>;
				bus_number = <0x02>;
				bus_type = "i3c";
				compatible = "huawei,inv-icm20690";
			};

			gyro3 {
			};

			gyro4 {
			};

			gyro5 {
			};

			gyro6 {
			};

			gyro7 {
			};

			gyro8 {
			};
		};

		compass {
			#address-cells = <0x01>;
			#size-cells = <0x00>;
			phandle = <0x6b7>;

			mag1 {
				fifoMaxEventCount = <0x00>;
				fifoReservedEventCount = <0x00>;
				minDelay = <0x2710>;
				vendor = "akm";
				sensorlist_name = "akm-akm09918";
				gpio_reset = <0x2f 0x00 0x00>;
				gpio_int1 = <0x2f 0x00 0x00>;
				compatible = "huawei,akm-akm09918";
				bus_number = <0x00>;
				reg = <0x0c>;
				chip_id_register = <0x00>;
				chip_id_value = <0x48>;
				file_id = <0x43>;
				sensor_list_info_id = <0x01>;
				sensor_type = "mag";
				outbit = <0x00>;
				calibrate_method = <0x02>;
				axis_map_x = <0x01>;
				axis_map_y = <0x00>;
				axis_map_z = <0x02>;
				negate_x = <0x00>;
				negate_y = <0x00>;
				negate_z = <0x01>;
				poll_interval = <0x0a>;
				softiron_parameter = <0x0f 0x28 0xf9 0x01 0xea 0x00 0xf9 0x01 0x86 0x23 0xa4 0xff 0xea 0x00 0xa5 0xff 0xe4 0x27 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00>;
				status = "ok";
			};

			mag2 {
			};

			mag3 {
			};
		};

		vibrator {
			#address-cells = <0x01>;
			#size-cells = <0x00>;
			phandle = <0x6b8>;

			vibrator1 {
				compatible = "huawei,nxp-tfa9874";
				bus_number = <0x00>;
				i2c_address = <0x36>;
				reg = <0x36>;
				file_id = <0x1b>;
				sensor_list_info_id = <0x00>;
				sensor_type = "vibrator";
				ti,max-timeout-ms = <0x3e8>;
				ti,reduce-timeout-ms = <0x0a>;
				calibrate_style = <0x00>;
				sensorlist_name = "vibrator-tfa9874";
				vendor = "nxp";
				calibrate_way = <0x01>;
				status = "disabled";
			};
		};

		fingerprint {

			finger1 {
			};

			finger2 {
			};
		};

		airpress {
			#size-cells = <0x00>;
			#address-cells = <0x01>;

			airpress1 {
				status = "disabled";
				tp_touch_coordinate_threshold = <0x266033a 0x7c7089b>;
				touch_fac_wait_time = <0x00>;
				fifoMaxEventCount = <0x12c>;
				fifoReservedEventCount = <0x12c>;
				vendor = "st";
				sensorlist_name = "airpress-lps22bh";
				poll_interval = <0x1f4>;
				sensor_type = "airpress";
				sensor_list_info_id = <0x09>;
				file_id = <0x30>;
				chip_id_value = <0xb1>;
				chip_id_register = <0x0f>;
				reg = <0x5d>;
				bus_number = <0x00>;
				compatible = "huawei,st_lps22bh";
			};

			airpress2 {
				status = "ok";
				fifoMaxEventCount = <0x12c>;
				fifoReservedEventCount = <0x12c>;
				vendor = "bosch";
				sensorlist_name = "airpress-bmp380";
				poll_interval = <0x1f4>;
				sensor_type = "airpress";
				sensor_list_info_id = <0x09>;
				file_id = <0x52>;
				chip_id_value = <0x50>;
				chip_id_register = <0x00>;
				reg = <0x77>;
				bus_number = <0x00>;
				compatible = "huawei,bosch_bmp380";
			};

			airpress3 {
			};

			airpress4 {
			};
		};
	};

	sensorhub_ex {
		adapt_file_id = <0x0e>;
		compatible = "huawei,sensorhub";
		akm_need_current = "no";
		invensense_exist = "no";
		isensor_version = "no";
		adapt_sensor_list_id = <0x02 0x06 0x07 0x08 0x09 0x0a 0x1a 0x1b 0x1c 0x22>;
		phandle = <0x6b9>;
	};

	sensorhub_io_power {
		sensor-io-supply = <0x65d>;
		compatible = "huawei,sensorhub_io";
		interrupts = <0x00 0x17 0x04>;
		status = "ok";
		phandle = <0x6ba>;
	};

	chg_watchdog {
		compatible = "hisilicon,chgwdg";
		reg = <0x00 0xff4e2000 0x00 0x1000>;
		interrupts = <0x00 0x190 0x04>;
		status = "disabled";
		phandle = <0x6bb>;
	};

	ddrflux {
		#address-cells = <0x02>;
		#size-cells = <0x02>;
		compatible = "hisilicon,chamaeleon-ddrc-flux";
		clocks = <0x04 0x15e>;
		clock-names = "clk_ddrc_freq", "clk_timer5_b";
		interrupts = <0x00 0x43 0x04>;
		status = "ok";
		phandle = <0x6bc>;
	};

	fastboot_sub_pmic {
		compatible = "fastboot,sub-pmic";
		pmic-init-reg-num = <0x00>;
		pmic-init-reg-addrs = <0x00>;
		pmic-init-reg-vals = <0x00>;
		phandle = <0x6bd>;
	};

	hisi_pmic_hi6563v200 {
		compatible = "hisi,hi6563v200";
		reg-addrs = <0x17>;
		vendor,pmic-pin = <0x14f>;
		fastboot_i2c_bus = <0x04>;
		boost_5v_support = <0x01>;
		status = "ok";
		phandle = <0x6be>;
	};

	pcie_kport {
		rc_num = <0x02>;
	};

	pci@f8000000 {
		status = "ok";
		skip_s5;
		sup_s4;
		skip_s3;
		eq_preset = <0x04>;
		lim_speed = <0x03>;
		compatible = "pcie-kport,rc";
		reg = <0x00 0xf8000000 0x00 0x400000 0x00 0xee0a3000 0x00 0x1000 0x00 0xee0a0000 0x00 0x3000 0x00 0xf8400000 0x00 0x2000>;
		reg-names = "dbi", "apb", "phy", "config";
		clocks = <0x15f 0x160 0x161 0x162 0x163 0x164 0x165>;
		clock-names = "pcie_aux", "pcie_apb_phy", "pcie_apb_sys", "pcie_aclk", "pcie_tcu_clk", "pcie_tbu_clk", "pcie_refclk";
		interrupts = <0x00 0x5d 0x04 0x00 0x5e 0x04 0x00 0x5f 0x04 0x00 0x60 0x04 0x00 0x5c 0x04 0x00 0x84 0x04 0x00 0x5a 0x04 0x00 0x5b 0x04 0x00 0x61 0x04>;
		interrupt-names = "INTa", "INTb", "INTc", "INTd", "link_down", "cpl_timeout", "pcie_idle_timeout", "pcie_idle_wake", "pcie_phy_irq";
		#address-cells = <0x03>;
		#size-cells = <0x02>;
		device_type = "pci";
		chip_type = <0x02>;
		ranges = <0x2000000 0x00 0xf8500000 0x00 0xf8500000 0x00 0x1d00000>;
		phy_layout_info = <0x00 0x00 0x2000>;
		num-lanes = <0x01>;
		rc-id = <0x00>;
		iso_info = <0x00 0x08>;
		bus-range = <0x00 0xff>;
		#interrupt-cells = <0x01>;
		interrupt-map-mask = <0x00 0x00 0x00 0x07>;
		interrupt-map = <0x00 0x00 0x00 0x01 0x01 0x00 0x00 0x00 0x5d 0x04 0x00 0x00 0x00 0x02 0x01 0x00 0x00 0x00 0x5e 0x04 0x00 0x00 0x00 0x03 0x01 0x00 0x00 0x00 0x5f 0x04 0x00 0x00 0x00 0x04 0x01 0x00 0x00 0x00 0x60 0x04>;
		reset-gpio = <0x166 0x0e 0x00>;
		assert_info = <0x60 0x300>;
		noc_target_id = <0x21>;
		num-viewport = <0x10>;
		ep_ltr_latency = <0x10031003>;
		ep_l1ss_ctrl2 = <0x00>;
		l1ss_ctrl1 = <0x4004370f>;
		t_ref2perst = <0xa410 0xb3b0>;
		t_perst2access = <0x249f0 0x27100>;
		t_perst2rst = <0x2710 0x2af8>;
		aspm_state = <0x02>;
		iatu_base_offset = <0x2ffffc>;
		ep_device_type = <0x00>;
		support_32k_idle;
		idle_timeout_en = <0x00 0x01 0x68>;
		idle_timeout_clr = <0x00 0x6c>;
		idle_wake_en = <0x02 0x03 0x68>;
		idle_wake_clr = <0x00 0x70>;
		l1ss_cnt_base = <0x177000 0x74>;
		board_type = <0x02>;
		phandle = <0x6bf>;

		pcie_kport_phy {
			compatible = "pcie,xw-phy";
			mcore_tcm = <0x00 0xfa300000 0x00 0x10000>;
			clocks = <0x167 0x168 0x169 0x16a>;
			clock-names = "pcie_mcu_19p2", "pcie_mcu", "pcie_mcu_bus", "pcie_mcu_32k";
			status = "ok";
		};
	};

	pci@edc00000 {
		sup_s4;
		skip_s3;
		eq_preset = <0x04>;
		lim_speed = <0x03>;
		ep_device_type = <0x00>;
		compatible = "pcie-kport,rc";
		reg = <0x00 0xedc00000 0x00 0x400000 0x00 0xee1a3000 0x00 0x1000 0x00 0xee1a0000 0x00 0x3000 0x00 0xea000000 0x00 0x2000>;
		reg-names = "dbi", "apb", "phy", "config";
		clocks = <0x16b 0x16c 0x16d 0x16e 0x163 0x16f 0x165>;
		clock-names = "pcie_aux", "pcie_apb_phy", "pcie_apb_sys", "pcie_aclk", "pcie_tcu_clk", "pcie_tbu_clk", "pcie_refclk";
		interrupts = <0x00 0x68 0x04 0x00 0x69 0x04 0x00 0x6a 0x04 0x00 0x6b 0x04 0x00 0x67 0x04 0x00 0x85 0x04 0x00 0x65 0x04 0x00 0x66 0x04 0x00 0x6c 0x04>;
		interrupt-names = "INTa", "INTb", "INTc", "INTd", "link_down", "cpl_timeout", "pcie_idle_timeout", "pcie_idle_wake", "pcie_phy_irq";
		#address-cells = <0x03>;
		#size-cells = <0x02>;
		device_type = "pci";
		chip_type = <0x02>;
		ranges = <0x2000000 0x00 0xea100000 0x00 0xea100000 0x00 0x3b00000>;
		phy_layout_info = <0x00 0x00 0x2000>;
		num-lanes = <0x01>;
		rc-id = <0x01>;
		iso_info = <0x00 0x10>;
		bus-range = <0x00 0xff>;
		#interrupt-cells = <0x01>;
		interrupt-map-mask = <0x00 0x00 0x00 0x07>;
		interrupt-map = <0x00 0x00 0x00 0x01 0x01 0x00 0x00 0x00 0x68 0x04 0x00 0x00 0x00 0x02 0x01 0x00 0x00 0x00 0x69 0x04 0x00 0x00 0x00 0x03 0x01 0x00 0x00 0x00 0x6a 0x04 0x00 0x00 0x00 0x04 0x01 0x00 0x00 0x00 0x6b 0x04>;
		reset-gpio = <0x63 0x09 0x00>;
		assert_info = <0x60 0xc00000>;
		noc_target_id = <0x22>;
		num-viewport = <0x10>;
		ep_ltr_latency = <0x10031003>;
		ep_l1ss_ctrl2 = <0x00>;
		l1ss_ctrl1 = <0x4004370f>;
		t_ref2perst = <0xa410 0xb3b0>;
		t_perst2access = <0x249f0 0x27100>;
		t_perst2rst = <0x2710 0x2af8>;
		aspm_state = <0x00>;
		iatu_base_offset = <0x2ffffc>;
		status = "ok";
		support_32k_idle;
		idle_timeout_en = <0x00 0x01 0x68>;
		idle_timeout_clr = <0x00 0x6c>;
		idle_wake_en = <0x02 0x03 0x68>;
		idle_wake_clr = <0x00 0x70>;
		l1ss_cnt_base = <0x177000 0x74>;
		board_type = <0x02>;
		phandle = <0x6c0>;

		pcie_kport_phy {
			compatible = "pcie,xw-phy";
			mcore_tcm = <0x00 0xfa310000 0x00 0x10000>;
			clocks = <0x170 0x171 0x172 0x173>;
			clock-names = "pcie_mcu_19p2", "pcie_mcu", "pcie_mcu_bus", "pcie_mcu_32k";
			status = "ok";
		};
	};

	bl31-kernel-shared-memory {
		#address-cells = <0x01>;
		#size-cells = <0x01>;

		dmss-int-mem@0 {
			reg = <0x00 0x400>;
		};

		ddr-flux-mem@400 {
			reg = <0x400 0x400>;
		};

		efuse-mem@800 {
			compatible = "vendor,share-memory-efuse";
			reg = <0x800 0x400>;
		};

		sec-qic-mem@C00 {
			reg = <0xc00 0x400>;
		};

		mem-no-use@1000 {
			compatible = "atf,not use";
			reg = <0x1000 0x400>;
		};

		drm-mem@1400 {
			compatible = "dpu,share-memory-drm";
			reg = <0x1400 0x400>;
		};

		getval-mem {
			compatible = "lowpower, get_val";
			lowpower,bl31-share-mem = <0x1800 0x400>;
		};

		bl31-mntn-mem {
			compatible = "hisilicon, bl31_mntn";
			dfx,bl31-share-mem = <0x1c00 0x100>;
		};

		ddr-perdata {
			compatible = "hisilicon,ddr-perfctrldata";
			ddr-perfctrldata = <0x1d00 0x100>;
		};

		cust-no-use1@2e00 {
			compatible = "cust-no-use1";
			reg = <0x2e00 0x200>;
		};

		cust-shmem@3000 {
			compatible = "cust-shmem";
			reg = <0x3000 0x2000>;
		};

		cust-no-use2@5000 {
			compatible = "cust-no-use1";
			reg = <0x5000 0x3000>;
		};

		rpmd-mem@8000 {
			compatible = "vendor,share-memory-rpmb";
			base = <0x00 0x10941000>;
			reg = <0x8000 0x8000>;
		};
	};

	timekeeper@fff1b000 {
		compatible = "hisilicon,timekeeper";
		reg = <0x00 0xfff1b000 0x00 0x1000>;
		interrupts = <0x00 0x3f 0x01>;
		status = "ok";
	};

	hisi_dmsspt@ff900000 {
		compatible = "hisilicon,chamaeleon-dmsspt";
		reg = <0x00 0xff900000 0x00 0x100000>;
		interrupts = <0x00 0x19c 0x04>;
		status = "ok";
	};

	hhee {
		compatible = "hkip,hkip-hhee";
		interrupts = <0x00 0x15e 0x04>;
		hhee_enable = <0x00>;
		hhee_api_tvm = <0x01>;
		hhee_api_livepatch = <0x01>;
		hhee_read_cnt = <0x28>;
	};

	bl2-log {
		compatible = "atf,atf-bl2";
	};

	secs_power_ctrl {
		compatible = "hisilicon,secs_power_ctrl";
		phandle = <0x6c1>;
	};

	hisi_pmu_dump {
		#address-cells = <0x01>;
		#size-cells = <0x01>;
		compatible = "hisi_pmu_dump";

		pmu_reg {
			PMEVTYPER0 = <0x400 0x04 0x404 0x04 0x408 0x04 0x40c 0x04 0x410 0x04 0x414 0x04>;
			PMCNTENSET = <0xc00 0x04>;
			PMCCNTR_L_OFFSET = <0xf8 0x04>;
			PMCCNTR_H_OFFSET = <0xfc 0x04>;
			PMEVCNTR0 = <0x00 0x04 0x08 0x04 0x10 0x04 0x18 0x04 0x20 0x04 0x28 0x04>;
			PMCR = <0xe04 0x04>;
			PMLAR = <0xfb0 0x04>;
			phandle = <0x175>;
		};

		debug_reg {
			EDLAR = <0xfb0 0x04>;
			OSLAR = <0x300 0x04>;
			phandle = <0x174>;
		};

		cpu0 {
			id = [00];
			debug_base = <0xfd810000 0x1000>;
			debug = <0x174>;
			pmu_base = <0xfd830000 0x1000>;
			pmu = <0x175>;
		};

		cpu1 {
			id = [01];
			debug_base = <0xfd910000 0x1000>;
			debug = <0x174>;
			pmu_base = <0xfd930000 0x1000>;
			pmu = <0x175>;
		};

		cpu2 {
			id = [02];
			debug_base = <0xfda10000 0x1000>;
			debug = <0x174>;
			pmu_base = <0xfda30000 0x1000>;
			pmu = <0x175>;
		};

		cpu3 {
			id = [03];
			debug_base = <0xfdb10000 0x1000>;
			debug = <0x174>;
			pmu_base = <0xfdb30000 0x1000>;
			pmu = <0x175>;
		};

		cpu4 {
			id = [04];
			debug_base = <0xfdc10000 0x1000>;
			debug = <0x174>;
			pmu_base = <0xfdc30000 0x1000>;
			pmu = <0x175>;
		};

		cpu5 {
			id = [05];
			debug_base = <0xfdd10000 0x1000>;
			debug = <0x174>;
			pmu_base = <0xfdd30000 0x1000>;
			pmu = <0x175>;
		};

		cpu6 {
			id = [06];
			debug_base = <0xfde10000 0x1000>;
			debug = <0x174>;
			pmu_base = <0xfde30000 0x1000>;
			pmu = <0x175>;
		};

		cpu7 {
			id = [07];
			debug_base = <0xfdf10000 0x1000>;
			debug = <0x174>;
			pmu_base = <0xfdf30000 0x1000>;
			pmu = <0x175>;
		};
	};

	dpm {
		compatible = "dpm-params";
		media1-dpm-supply = <0x112>;
		media2-dpm-supply = <0xf7>;
	};

	subpmu_dieid {
		compatible = "hisilicon,subpmu-dieid";
		status = "ok";

		hi6422_1 {
			pmu-type = "Hi6422v300";
			bus-type = "spmi";
			slave-id = <0x05>;
		};

		hi6422_2 {
			pmu-type = "Hi6422v300";
			bus-type = "spmi";
			slave-id = <0x03>;
		};
	};

	hkip_atkinfo {
		compatible = "hisi,hkip-atkinfo";
		hkip_atkinfo_enable = <0x01>;
		cycle-time = <0x5265c00>;
	};

	lowpm_pmu {
		phandle = <0x6c2>;

		lowpm_board_type_mmw {
			status = "disabled";
		};
	};

	hifi_voice_proxy {
		compatible = "hisilicon,voice_proxy";
		status = "disabled";
		phandle = <0x6c3>;

		voice_proxy_volte {
			compatible = "hisilicon,voice_proxy_volte";
			status = "ok";
		};

		voice_proxy_vowifi {
			compatible = "hisilicon,voice_proxy_vowifi";
			status = "ok";
		};

		voice_proxy_fusion {
			compatible = "hisilicon,voice_proxy_fusion";
			status = "ok";
		};
	};

	framebuffer {
		fpga_flag = <0x00>;
		#address-cells = <0x02>;
		#size-cells = <0x02>;
		compatible = "dkmd,dpu_device", "hisilicon,dpufb";
		disp_device_arch = <0x00>;
		status = "ok";
		phandle = <0x6c4>;
	};

	disp_manager {
		#address-cells = <0x02>;
		#size-cells = <0x02>;
		compatible = "dkmd,composer_manager";
		reg = <0x00 0xe8800000 0x00 0x100000 0x00 0xff7cc000 0x00 0x2000 0x00 0xff7c9000 0x00 0x1000>;
		regulator_disp_ch1subsys-supply = <0x176>;
		regulator_dsssubsys-supply = <0x177>;
		regulator_vivobus-supply = <0x118>;
		regulator_media_subsys-supply = <0x112>;
		regulator_smmu_tcu-supply = <0x114>;
		regulator_vivobus_autodiv-supply = <0x178>;
		interrupts = <0x00 0xa1 0x04 0x00 0xa0 0x04>;
		status = "ok";
		phandle = <0x6c5>;

		online@0 {
			scene_id = <0x00>;
			status = "ok";
		};

		online@1 {
			scene_id = <0x01>;
			status = "ok";
		};

		online@2 {
			scene_id = <0x02>;
			status = "ok";
		};

		online@3 {
			scene_id = <0x03>;
			status = "ok";
		};

		offline@4 {
			scene_id = <0x04>;
			status = "ok";
		};

		offline@5 {
			scene_id = <0x05>;
			status = "ok";
		};

		offline@6 {
			scene_id = <0x06>;
			status = "ok";
		};
	};

	dpu_resource {
		#address-cells = <0x02>;
		#size-cells = <0x02>;
		compatible = "dkmd,dpu_resource";
		reg = <0x00 0xe8900000 0x00 0x180000 0x00 0xffb85000 0x00 0x1000 0x00 0xfb21b000 0x00 0x1000 0x00 0xff7cc000 0x00 0x1000 0x00 0xffb81000 0x00 0x1000 0x00 0xe8d01000 0x00 0x1000 0x00 0xefb02000 0x00 0x1000 0x00 0xefa71000 0x00 0x1000 0x00 0xff7cb000 0x00 0x1000>;
		linebuf_size = <0x40000>;
		offline_scene_id = <0x04 0x05 0x06>;
		fpga_flag = <0x00>;
		pmctrl_dvfs_enable = <0x01>;
		clocks = <0x119>;
		status = "ok";
		iommus = <0x111 0x01 0x00>;
		ssid_nums = <0x20>;
		tlb_flush = <0x02>;
		phandle = <0x6c6>;

		iova_info {
			start-addr = <0x00 0x10000>;
			size = <0x01 0x00>;
			iova-align = <0x00 0x10000>;
		};
	};

	dpu_cmdlist {
		#address-cells = <0x02>;
		#size-cells = <0x02>;
		compatible = "ukmd,dpu_cmdlist";
		scene_num = <0x08>;
		cmdlist_max_size = <0x3000000>;
		status = "ok";
	};

	connector_manager {
		#address-cells = <0x02>;
		#size-cells = <0x02>;
		compatible = "dkmd,connector";
		reg = <0x00 0xe8800000 0x00 0x100000 0x00 0xffb85000 0x00 0x1000 0x00 0xff7cc000 0x00 0x2000>;
		regulator_disp_ch1subsys-supply = <0x176>;
		regulator_dsssubsys-supply = <0x177>;
		regulator_vivobus-supply = <0x118>;
		regulator_media_subsys-supply = <0x112>;
		clocks = <0x119>;
		clock-names = "clk_edc0";
		status = "ok";
		phandle = <0x6c7>;

		mipi_dsi@0 {
			connector_id = <0x00>;
			interrupts = <0x00 0x1e0 0x04>;
			clocks = <0x179 0x17a>;
			clock-names = "clk_txdphy0_ref", "clk_txdphy0_cfg";
			status = "ok";
		};

		mipi_dsi@1 {
			connector_id = <0x01>;
			interrupts = <0x00 0x1e1 0x04>;
			clocks = <0x179 0x17a>;
			clock-names = "clk_txdphy0_ref", "clk_txdphy0_cfg";
			status = "ok";
		};

		mipi_dsi@2 {
			connector_id = <0x02>;
			interrupts = <0x00 0x1e2 0x04>;
			clocks = <0x179 0x17a>;
			clock-names = "clk_txdphy0_ref", "clk_txdphy0_cfg";
			status = "ok";
		};

		dp_ctrl@0 {
			connector_id = <0x03>;
			interrupts = <0x00 0x90 0x04>;
			clocks = <0x17b 0x17c>;
			clock-names = "clk_dpctrl_16m", "pclk_dpctrl";
			preemphasis_swing = <0x262 0x10e018 0x122 0x1810e018 0x22 0x3810e018 0x22 0x5860e018 0x122 0xe018 0x22 0x2820e018 0x22 0x58e0e018 0x22 0x20e018 0x22 0x38f0e018 0x22 0xf0e018>;
			ssc_ppm = <0xa8c 0x154 0x151 0x8ca 0x11c 0x119 0x8ca 0x11c 0x119 0xd2f 0x1aa 0x1a5>;
			status = "ok";
		};

		dp_ctrl@1 {
			connector_id = <0x04>;
			interrupts = <0x00 0x90 0x04>;
			clocks = <0x17b 0x17c>;
			clock-names = "clk_dpctrl_16m", "pclk_dpctrl";
			preemphasis_swing = <0x262 0x10e018 0x122 0x1810e018 0x22 0x3810e018 0x22 0x5860e018 0x122 0xe018 0x22 0x2820e018 0x22 0x58e0e018 0x22 0x20e018 0x22 0x38f0e018 0x22 0xf0e018>;
			ssc_ppm = <0xa8c 0x154 0x151 0x8ca 0x11c 0x119 0x8ca 0x11c 0x119 0xd2f 0x1aa 0x1a5>;
			status = "ok";
		};

		offline@0 {
			connector_id = <0x05>;
			interrupts = <0x00 0xb4 0x04>;
			status = "ok";
		};

		mipi_dsi@3 {
			connector_id = <0x07>;
			interrupts = <0x00 0x1e0 0x04>;
			clocks = <0x179 0x17a>;
			clock-names = "clk_txdphy0_ref", "clk_txdphy0_cfg";
			status = "ok";
		};
	};

	panel_td4322 {
		#address-cells = <0x02>;
		#size-cells = <0x02>;
		compatible = "dkmd,panel_td4322";
		lcd-bl-type = <0x08>;
		lcd-display-type = <0x10>;
		lcd-ifbc-type = <0x00>;
		gpios = <0x166 0x00 0x00 0x166 0x17 0x00 0x166 0x0b 0x00 0x166 0x16 0x00 0x166 0x01 0x00>;
		gpio_nums = <0x20 0x37 0x2b 0x36 0x21>;
		connector_id = <0x00>;
		pipe_sw_post_chn_idx = <0x00>;
		pipe_sw_itfch_idx = <0x00>;
		active_flag = <0x01>;
		fpga_flag = <0x00>;
		status = "disabled";
	};

	panel_nt37700p {
		pinctrl-1 = <0x219 0x228 0x270>;
		pinctrl-0 = <0x218 0x227 0x26f>;
		pinctrl-names = "default", "idle";
		lcddig-vcc-supply = <0x662>;
		lcdio-vcc-supply = <0x655>;
		#address-cells = <0x02>;
		#size-cells = <0x02>;
		compatible = "dkmd,panel_nt37700p";
		lcd-bl-type = <0x08>;
		lcd-display-type = <0x10>;
		lcd-ifbc-type = <0x00>;
		gpios = <0x4e 0x08 0x00 0x196 0x10 0x00 0x4e 0x01 0x00>;
		gpio_nums = <0x48 0x150 0x41>;
		connector_id = <0x00>;
		pipe_sw_post_chn_idx = <0x00>;
		pipe_sw_itfch_idx = <0x00>;
		active_flag = <0x01>;
		fpga_flag = <0x00>;
		status = "disabled";
		phandle = <0x6c8>;
	};

	panel_nt37800a {
		pinctrl-1 = <0x219 0x228 0x270>;
		pinctrl-0 = <0x218 0x227 0x26f>;
		pinctrl-names = "default", "idle";
		lcddig-vcc-supply = <0x662>;
		lcdio-vcc-supply = <0x655>;
		#address-cells = <0x02>;
		#size-cells = <0x02>;
		compatible = "dkmd,panel_nt37800a";
		lcd-bl-type = <0x08>;
		lcd-display-type = <0x10>;
		lcd-ifbc-type = <0x00>;
		gpios = <0x4e 0x08 0x00 0x196 0x10 0x00 0x4e 0x01 0x00>;
		gpio_nums = <0x48 0x150 0x41>;
		connector_id = <0x00>;
		pipe_sw_post_chn_idx = <0x00>;
		pipe_sw_itfch_idx = <0x00>;
		active_flag = <0x01>;
		fpga_flag = <0x00>;
		status = "disabled";
		phandle = <0x6c9>;
	};

	panel_nt37290 {
		pinctrl-1 = <0x219 0x228 0x270>;
		pinctrl-0 = <0x218 0x227 0x26f>;
		pinctrl-names = "default", "idle";
		lcddig-vcc-supply = <0x662>;
		lcdio-vcc-supply = <0x655>;
		#address-cells = <0x02>;
		#size-cells = <0x02>;
		compatible = "dkmd,panel_nt37290";
		lcd-bl-type = <0x08>;
		lcd-display-type = <0x10>;
		lcd-ifbc-type = <0x00>;
		gpios = <0x4e 0x08 0x00 0x196 0x10 0x00 0x4e 0x01 0x00>;
		gpio_nums = <0x48 0x150 0x41>;
		connector_id = <0x00>;
		pipe_sw_post_chn_idx = <0x00>;
		pipe_sw_itfch_idx = <0x00>;
		active_flag = <0x01>;
		fpga_flag = <0x00>;
		status = "disabled";
		phandle = <0x6ca>;
	};

	panel_nt37701_brq {
		pinctrl-1 = <0x219 0x228 0x270>;
		pinctrl-0 = <0x218 0x227 0x26f>;
		pinctrl-names = "default", "idle";
		lcddig-vcc-supply = <0x662>;
		lcdio-vcc-supply = <0x655>;
		#address-cells = <0x02>;
		#size-cells = <0x02>;
		compatible = "dkmd,panel_nt37701_brq";
		lcd-bl-type = <0x08>;
		lcd-display-type = <0x10>;
		lcd-ifbc-type = <0x0f>;
		gpios = <0x4e 0x08 0x00 0x196 0x10 0x00 0x4e 0x01 0x00>;
		gpio_nums = <0x48 0x150 0x41>;
		connector_id = <0x00>;
		pipe_sw_post_chn_idx = <0x00>;
		pipe_sw_itfch_idx = <0x00>;
		active_flag = <0x01>;
		fpga_flag = <0x00>;
		status = "disabled";
		phandle = <0x6cb>;
	};

	panel_hx5293 {
		pinctrl-1 = <0x255 0x253 0x219 0x2d3 0x280 0x27e 0x228 0x376>;
		pinctrl-0 = <0x254 0x252 0x218 0x2d2 0x27f 0x27d 0x227 0x375>;
		pinctrl-names = "default", "idle";
		lcdio-vcc-supply = <0x655>;
		lcd-bl-ic-name = "KTZ8864";
		compatible = "dkmd,panel_hx5293";
		lcd-bl-type = <0x04>;
		lcd-display-type = <0x40>;
		lcd-ifbc-type = <0x09>;
		connector_id = <0x00 0x02>;
		pipe_sw_post_chn_idx = <0x00 0x02>;
		pipe_sw_itfch_idx = <0x00>;
		active_flag = <0x01>;
		gpios = <0x196 0x18 0x00 0x196 0x17 0x00 0x4e 0x08 0x00 0x4f 0x1e 0x00 0x4e 0x01 0x00>;
		gpio_nums = <0x158 0x157 0x48 0xbe 0x41>;
		fpga_flag = <0x00>;
		status = "disabled";
		phandle = <0x6cc>;
	};

	panel_nt36870 {
		pinctrl-1 = <0x251 0x24f 0x219 0x2d3 0x27c 0x27a 0x228 0x376>;
		pinctrl-0 = <0x250 0x24e 0x218 0x2d2 0x27b 0x279 0x227 0x375>;
		pinctrl-names = "default", "idle";
		lcdanalog-vcc-supply = <0x659>;
		lcdio-vcc-supply = <0x655>;
		gpio_nums = <0x156 0x155 0x48 0xbe 0x41>;
		gpios = <0x196 0x16 0x00 0x196 0x15 0x00 0x4e 0x08 0x00 0x4f 0x1e 0x00 0x4e 0x01 0x00>;
		#address-cells = <0x02>;
		#size-cells = <0x02>;
		compatible = "dkmd,panel_nt36870";
		lcd-bl-type = <0x04>;
		lcd-display-type = <0x08>;
		lcd-ifbc-type = <0x09>;
		lcd-bl-ic-name = "ktz8864";
		connector_id = <0x00>;
		pipe_sw_post_chn_idx = <0x00>;
		pipe_sw_itfch_idx = <0x00>;
		active_flag = <0x01>;
		fpga_flag = <0x00>;
		status = "disabled";
		phandle = <0x6cd>;
	};

	panel_visionox_6p39 {
		gpio_nums = <0x150 0x1a 0x14e 0x48 0x41 0x14f>;
		gpios = <0x196 0x10 0x00 0x2f 0x1a 0x00 0x196 0x0e 0x00 0x166 0x01 0x00 0x4e 0x01 0x00 0x196 0x0f 0x00>;
		#address-cells = <0x02>;
		#size-cells = <0x02>;
		compatible = "dkmd,panel_visionox_6p39";
		lcd-bl-type = <0x08>;
		lcd-display-type = <0x10>;
		lcd-ifbc-type = <0x00>;
		connector_id = <0x00>;
		pipe_sw_post_chn_idx = <0x00>;
		pipe_sw_itfch_idx = <0x00>;
		active_flag = <0x01>;
		fpga_flag = <0x00>;
		status = "disabled";
		phandle = <0x6ce>;
	};

	panel_visionox310 {
		#address-cells = <0x02>;
		#size-cells = <0x02>;
		compatible = "dkmd,panel_visionox310";
		lcd-bl-type = <0x08>;
		lcd-display-type = <0x40>;
		lcd-ifbc-type = <0x09>;
		connector_id = <0x00 0x02>;
		pipe_sw_post_chn_idx = <0x00 0x02>;
		pipe_sw_itfch_idx = <0x00>;
		active_flag = <0x01>;
		fpga_flag = <0x00>;
		status = "disabled";
	};

	panel_boe_7p847 {
		gpio_nums = <0x155 0x154 0x22 0x159 0x40>;
		gpios = <0x196 0x15 0x00 0x196 0x14 0x00 0x166 0x02 0x00 0x196 0x19 0x00 0x4e 0x00 0x00>;
		#address-cells = <0x02>;
		#size-cells = <0x02>;
		compatible = "dkmd,panel_boe_7p847";
		lcd-bl-type = <0x08>;
		lcd-display-type = <0x40>;
		lcd-ifbc-type = <0x09>;
		connector_id = <0x00 0x02>;
		pipe_sw_post_chn_idx = <0x00 0x02>;
		pipe_sw_itfch_idx = <0x00>;
		active_flag = <0x01>;
		fpga_flag = <0x00>;
		status = "disabled";
		phandle = <0x6cf>;
	};

	panel_boe_6p39 {
		gpio_nums = <0x150 0x1a 0x14e 0x48 0x41 0x14f>;
		gpios = <0x196 0x10 0x00 0x2f 0x1a 0x00 0x196 0x0e 0x00 0x4e 0x08 0x00 0x4e 0x01 0x00 0x196 0x0f 0x00>;
		#address-cells = <0x02>;
		#size-cells = <0x02>;
		compatible = "dkmd,panel_boe_6p39";
		lcd-bl-type = <0x08>;
		lcd-display-type = <0x10>;
		lcd-ifbc-type = <0x00>;
		connector_id = <0x07>;
		pipe_sw_post_chn_idx = <0x00>;
		pipe_sw_itfch_idx = <0x00>;
		active_flag = <0x00>;
		fpga_flag = <0x00>;
		status = "disabled";
		phandle = <0x6d0>;
	};

	panel_mipi_fake {
		#address-cells = <0x02>;
		#size-cells = <0x02>;
		compatible = "dkmd,mipi_fake_panel";
		lcd-bl-type = <0x08>;
		lcd-display-type = <0x08>;
		lcd-ifbc-type = <0x00>;
		connector_id = <0x02>;
		pipe_sw_post_chn_idx = <0x02>;
		pipe_sw_itfch_idx = <0x02>;
		fake_panel_flag = <0x01>;
		active_flag = <0x01>;
		fpga_flag = <0x00>;
		status = "disabled";
		phandle = <0x6d1>;
	};

	dp_panel {
		#address-cells = <0x02>;
		#size-cells = <0x02>;
		compatible = "dkmd,gfx_dp";
		reg = <0x00 0xefa71000 0x00 0x1000 0x00 0xefb02000 0x00 0x1000 0x00 0xefa40000 0x00 0x8000 0x00 0xefa70000 0x00 0x1000>;
		clocks = <0x17d>;
		clock-names = "dpctrl_pixel";
		connector_id = <0x04>;
		pipe_sw_post_chn_idx = <0x04>;
		pipe_sw_itfch_idx = <0x01>;
		fake_panel_flag = <0x01>;
		active_flag = <0x01>;
		fpga_flag = <0x00>;
		status = "ok";
		phandle = <0x6d2>;
	};

	offline_panel {
		#address-cells = <0x02>;
		#size-cells = <0x02>;
		compatible = "dkmd,gfx_offline";
		connector_id = <0x05>;
		pipe_sw_post_chn_idx = <0x05>;
		pipe_sw_itfch_idx = <0x04>;
		fake_panel_flag = <0x01>;
		active_flag = <0x01>;
		fpga_flag = <0x00>;
		status = "ok";
		phandle = <0x6d3>;
	};

	cmdlist_7xx {
		compatible = "hisi,cmdlist";
		reg = <0x00 0xe8800000 0x00 0x200000>;
		memory_size = <0x3000000>;
		channel_count = <0x09>;

		channel-0 {
			channel_id = <0x00>;
			scene_id = <0x00>;
		};

		channel-1 {
			channel_id = <0x01>;
			scene_id = <0x01>;
		};

		channel-2 {
			channel_id = <0x02>;
			scene_id = <0x02>;
		};

		channel-3 {
			channel_id = <0x03>;
			scene_id = <0x03>;
		};

		channel-4 {
			channel_id = <0x04>;
			scene_id = <0x04>;
		};

		channel-5 {
			channel_id = <0x05>;
			scene_id = <0x05>;
		};

		channel-6 {
			channel_id = <0x06>;
			scene_id = <0x06>;
		};

		channel-7 {
			channel_id = <0x07>;
			scene_id = <0x07>;
		};

		channel-8 {
			channel_id = <0x08>;
			scene_id = <0x08>;
		};
	};

	hisi,heaps-drm {
		compatible = "hisilicon, hisi-drm-heaps";

		hisi_drm_page_pool_heap@0 {
			heap-name = "hisi_drm_page_pool_heap";
			heap-type = "hisi_drm_page_pool";
			heap-id = <0x00>;
			water_mark = <0x32000000>;
			status = "ok";
		};

		hisi_drm_debug_heap@1 {
			heap-name = "hisi_drm_debug_heap";
			heap-type = "hisi_drm_debug_pool";
			heap-id = <0x01>;
			status = "disabled";
		};
	};

	dpu_drm {
		compatible = "hisi,dpu_drm";
	};

	composer_manager {
		compatible = "hisi,dpu_composer_manager";
		reg = <0x00 0xe8800000 0x00 0x100000 0x00 0xff7cc000 0x00 0x2000 0x00 0xe8d01000 0x00 0x1000>;
		cmdlist_dev_name = "cmdlist_7xx";
		regulator_disp_ch1subsys-supply = <0x176>;
		regulator_dsssubsys-supply = <0x177>;
		regulator_vivobus-supply = <0x118>;
		regulator_media_subsys-supply = <0x112>;
		regulator_smmu_tcu-supply = <0x114>;
		interrupts = <0x00 0xa1 0x04 0x00 0x1e0 0x04>;
		interrupt-names = "sdbirq", "dsiirq";
		clocks = <0x119>;
		fastboot_enable_flag = <0x00>;
		pipe_sw_post_chn_idx = <0x04>;
		status = "ok";
		iommus = <0x111 0x01 0x00>;
		ssid_nums = <0x20>;
		tlb_flush = <0x02>;

		iova_info {
			start-addr = <0x00 0x10000>;
			size = <0x01 0x00>;
			iova-align = <0x00 0x10000>;
		};
	};

	dsi@E8800000 {
		compatible = "hisi,dpu-mipi-dsi";
		#address-cells = <0x02>;
		#size-cells = <0x02>;
		reg = <0x00 0xe8800000 0x00 0x100000 0x00 0xffb85000 0x00 0x1000 0x00 0xff7cc000 0x00 0x2000 0x00 0xffb81000 0x00 0x1000>;
		regulator_disp_ch1subsys-supply = <0x176>;
		regulator_dsssubsys-supply = <0x177>;
		regulator_vivobus-supply = <0x118>;
		regulator_media_subsys-supply = <0x112>;
		connector_id = <0x00>;
		interrupts = <0x00 0x1e0 0x04>;
		clocks = <0x179 0x17a>;
		clock-names = "clk_txdphy0_ref", "clk_txdphy0_cfg";
		fastboot_enable_flag = <0x00>;
		lt9611_chip_reset = <0x41>;
		status = "ok";
		phandle = <0x6d4>;

		ports {
			#address-cells = <0x01>;
			#size-cells = <0x00>;

			port@0 {
				reg = <0x00>;

				endpoint {
					remote-endpoint = <0x28e>;
					phandle = <0x28d>;
				};
			};

			port@1 {
				reg = <0x01>;

				endpoint@0 {
					reg = <0x00>;
					remote-endpoint = <0x17e>;
					phandle = <0x44>;
				};
			};
		};
	};

	dp_connector_manager {
		#address-cells = <0x02>;
		#size-cells = <0x02>;
		compatible = "hisi,dp-manager";
		reg = <0x00 0xe8900000 0x00 0x100000 0x00 0xffb85000 0x00 0x1000 0x00 0xff7cc000 0x00 0x2000 0x00 0xffb81000 0x00 0x1000>;
		regulator_disp_ch1subsys-supply = <0x176>;
		regulator_dsssubsys-supply = <0x177>;
		regulator_vivobus-supply = <0x118>;
		regulator_media_subsys-supply = <0x112>;
		clocks = <0x119>;
		clock-names = "clk_edc0";
		status = "ok";

		dp_ctrl@0 {
			connector_id = <0x03>;
			interrupts = <0x00 0x90 0x04>;
			clocks = <0x17b 0x17c>;
			clock-names = "clk_dpctrl_16m", "pclk_dpctrl";
			preemphasis_swing = <0x262 0x10e018 0x122 0x1810e018 0x22 0x3810e018 0x22 0x5860e018 0x122 0xe018 0x22 0x2820e018 0x22 0x58e0e018 0x22 0x20e018 0x22 0x38f0e018 0x22 0xf0e018>;
			ssc_ppm = <0xa8c 0x154 0x151 0x8ca 0x11c 0x119 0x8ca 0x11c 0x119 0xd2f 0x1aa 0x1a5>;
			status = "ok";
		};

		dp_ctrl@1 {
			connector_id = <0x04>;
			interrupts = <0x00 0x90 0x04>;
			clocks = <0x17b 0x17c>;
			clock-names = "clk_dpctrl_16m", "pclk_dpctrl";
			preemphasis_swing = <0x262 0x10e018 0x122 0x1810e018 0x22 0x3810e018 0x22 0x5860e018 0x122 0xe018 0x22 0x2820e018 0x22 0x58e0e018 0x22 0x20e018 0x22 0x38f0e018 0x22 0xf0e018>;
			ssc_ppm = <0xa8c 0x154 0x151 0x8ca 0x11c 0x119 0x8ca 0x11c 0x119 0xd2f 0x1aa 0x1a5>;
			status = "ok";
		};
	};

	dpu_dp_panel {
		#address-cells = <0x02>;
		#size-cells = <0x02>;
		compatible = "hisi,dpu-dp";
		reg = <0x00 0xefa71000 0x00 0x1000 0x00 0xefb02000 0x00 0x1000 0x00 0xefa40000 0x00 0x8000 0x00 0xefa70000 0x00 0x1000>;
		gpios = <0x4f 0x13 0x00>;
		dp_hpd_gpio = <0xf2>;
		clocks = <0x17d>;
		clock-names = "dpctrl_pixel";
		connector_id = <0x04>;
		pipe_sw_post_chn_idx = <0x04>;
		pipe_sw_itfch_idx = <0x01>;
		fake_panel_flag = <0x01>;
		active_flag = <0x01>;
		fpga_flag = <0x00>;
		status = "ok";
	};

	dpu_opr_mgr {
		compatible = "hisi,dpu_operator_manager";
		reg = <0x00 0xe8800000 0x00 0x100000>;
		opr_ids = <0x00 0x08 0x0a 0x0d>;
	};

	pmic_dcxo_ap {
		compatible = "hisilicon,pmic_dcxo_ap";
		ap_cali_in_pmu = <0x00>;
		status = "disabled";
		phandle = <0x6d5>;
	};

	pmic_dcxo_cp {
		compatible = "hisilicon,pmic_dcxo_cp";
		status = "disabled";
		phandle = <0x6d6>;
	};

	pmic_dcxo_cali {
		compatible = "hisilicon,pmic_dcxo_cali";
		support-proc-ipcmsg = <0x01>;
		status = "ok";
		phandle = <0x6d7>;
	};

	vbat_drop {
		compatible = "hisilicon,vbat-drop-protect";
		interrupt-parent = <0x01>;
		interrupts = <0x00 0x191 0x01>;
		vbat_drop_vol_mv = <0xbb8>;
		vbat_drop_vol_normal_cnt = <0x02>;
		delayed_work_time = <0x7d0>;
		lpm3_ctrl_en = <0x00>;
		xpu_ctrl_en = <0x01>;
		big_cpu_auto_div_en = <0x00>;
		middle_cpu_auto_div_en = <0x00>;
		little_cpu_auto_div_en = <0x00>;
		l3_cpu_auto_div_en = <0x00>;
		gpu_auto_div_en = <0x00>;
		npu_auto_div_en = <0x00>;
		bigfreq-limit-channel = "big-freq-top", "vote-src-1";
		middlefreq-limit-channel = "middle-freq-top", "vote-src-1";
		littlefreq-limit-channel = "little-freq-top", "vote-src-1";
		gpufreq-limit-channel = "gpu-freq", "vote-src-2";
		l3freq-limit-channel = "l3-freq-top", "vote-src-1";
		status = "disabled";
		phandle = <0x6d8>;
	};

	mips_ddr_c0 {
		compatible = "mips-mem";
		reg = <0x00 0xffb81000 0x00 0x1000>;
		vote-reg = <0x278 0x7fff>;
		vote-reg-mask = <0x8000>;
		vote-reg-bit = <0x00>;
		refill-event-id = <0xa2>;
		core-dev-table = <0xa3160 0x1a1 0x13a358 0x2ed>;
		phandle = <0x0a>;
	};

	mips_ddr_c1 {
		compatible = "mips-mem";
		reg = <0x00 0xffb81000 0x00 0x1000>;
		vote-reg = <0x27c 0x7fff>;
		vote-reg-mask = <0x8000>;
		vote-reg-bit = <0x00>;
		refill-event-id = <0x2a>;
		core-dev-table = <0x3d090 0x1a1 0x8ca00 0x2ed 0x10d880 0x5fb 0x1c3a90 0x5fb 0x1ed2a0 0xaba 0x20ce70 0xc7d>;
		phandle = <0x10>;
	};

	mips_ddr_c2 {
		compatible = "mips-mem";
		reg = <0x00 0xffb81000 0x00 0x1000>;
		vote-reg = <0x278 0x7fff0000>;
		vote-reg-mask = <0x80000000>;
		vote-reg-bit = <0x10>;
		refill-event-id = <0x2a>;
		core-dev-table = <0x927c0 0x1a1 0xf4240 0x2ed 0x14d020 0x5fb 0x1c2320 0x5fb 0x23dbb0 0xaba 0x27fa60 0xc7d>;
		phandle = <0x15>;
	};

	mips_l3_c0 {
		compatible = "mips-mem";
		reg = <0x00 0xff340000 0x00 0x1000>;
		vote-reg = <0xe50 0x7fff0000>;
		vote-reg-mask = <0x80000000>;
		vote-reg-bit = <0x10>;
		refill-event-id = <0x17>;
		core-dev-table = <0x77a10 0x14f 0xa3160 0x1a2 0xb90f0 0x21a 0xd2f00 0x258 0xf8890 0x2b4 0x13a358 0x3c4 0x15d1f0 0x42a 0x175890 0x4e2>;
		phandle = <0x0b>;
	};

	mips_l3_c1 {
		compatible = "mips-mem";
		reg = <0x00 0xff340000 0x00 0x1000>;
		vote-reg = <0xe54 0x7fff>;
		vote-reg-mask = <0x8000>;
		vote-reg-bit = <0x00>;
		refill-event-id = <0x17>;
		core-dev-table = <0x3d090 0x14f 0x6ddd0 0x1a2 0xa8f20 0x1c2 0xd4288 0x21a 0xf3e58 0x258 0x125f20 0x2b4 0x15f900 0x360 0x193520 0x42a 0x1c3a90 0x4e2 0x1ed2a0 0x524 0x20ce70 0x564>;
		phandle = <0x11>;
	};

	mips_l3_c2 {
		compatible = "mips-mem";
		reg = <0x00 0xff340000 0x00 0x1000>;
		vote-reg = <0xe54 0x7fff0000>;
		vote-reg-mask = <0x80000000>;
		vote-reg-bit = <0x10>;
		refill-event-id = <0x17>;
		core-dev-table = <0x927c0 0x14f 0xc3500 0x1c2 0xf4240 0x21a 0x12e7d8 0x258 0x169158 0x2ed 0x185290 0x360 0x19e100 0x42a 0x1c2320 0x480 0x1e6540 0x4e2 0x222248 0x524 0x27fa60 0x564>;
		phandle = <0x16>;
	};

	ufs,ufs_dss {
		compatible = "ufs,ufs_dss";
		phandle = <0x6d9>;

		Chips {

			Toshiba {
				chipname = "toshiba";
				manufacturer_id = <0x198>;
				mode_enable = <0x00>;
				gear_type = <0x00>;
				flow_cnt_per_ms = <0x04>;
				flow_size_per_100us = <0x08>;
			};

			Hynix {
				chipname = "hynix";
				manufacturer_id = <0x1ad>;
				mode_enable = <0x00>;
				gear_type = <0x00>;
				flow_cnt_per_ms = <0x04>;
				flow_size_per_100us = <0x08>;
			};

			Sumsang {
				chipname = "samsang";
				manufacturer_id = <0x1ce>;
				mode_enable = <0x00>;
				gear_type = <0x00>;
				flow_cnt_per_ms = <0x04>;
				flow_size_per_100us = <0x08>;
			};

			Hi1861 {
				chipname = "Hi1861";
				manufacturer_id = <0x8b6>;
				mode_enable = <0x00>;
				gear_type = <0x00>;
				flow_cnt_per_ms = <0x04>;
				flow_size_per_100us = <0x08>;
				model_white_lists = "THR935";
			};

			Micron {
				chipname = "micron";
				manufacturer_id = <0x12c>;
				mode_enable = <0x00>;
				gear_type = <0x00>;
				flow_cnt_per_ms = <0x04>;
				flow_size_per_100us = <0x08>;
			};

			Sandisk {
				chipname = "sandisk";
				manufacturer_id = <0x145>;
				mode_enable = <0x00>;
				gear_type = <0x00>;
				flow_cnt_per_ms = <0x04>;
				flow_size_per_100us = <0x08>;
			};
		};
	};

	seplat {
		compatible = "hisilicon,seplat";
		status = "disabled";
		chip_type = "ca11";
		phandle = <0x6da>;
	};

	blpwm@FF4E4000 {
		compatible = "hisilicon,blpwm";
		reg = <0x00 0xff4e4000 0x00 0x1000>;
		clocks = <0x17f>;
		#pwm-cells = <0x02>;
		status = "ok";
		phandle = <0x180>;
	};

	blpwm_test {
		compatible = "hisilicon,blpwm_test";
		reg = <0x00 0xff4e3000 0x00 0x1000>;
		pwms = <0x180 0x00 0x9c40>;
		status = "ok";
		phandle = <0x6db>;
	};

	lowpm_func@ffb82000 {
		compatible = "hisilicon,lowpm_func";
		reg = <0x00 0xffb82000 0x00 0x1000>;
		plat-name = "charlotte_cs";
		fpga_flag = <0x01>;
		ao-gpio-irq = <0x260 0x261 0x262 0x263 0x264 0x265 0x266 0x267>;
		ao-gpio-group-idx = <0x05 0x06 0x07 0x08 0x05 0x06 0x07 0x08>;
		pmu-addr-end = <0x29e>;
		mg-sec-reg = <0xff800700 0xff80070c 0xff810700 0xff81071c 0xee265700 0xee265714>;
		cg-sec-reg = <0xff800f00 0xff800f0c 0xff810f00 0xff810f1c 0xee265f00 0xee265f14>;
		status = "ok";
		ap-irq-table = "IPI_RESCHEDULE", "IPI_CALL_FUNC", "IPI_CALL_FUNC_SINGLE", "IPI_CPU_STOP", "IPI_TIMER", "IPI_SECURE_RPMB", "IPI_MNTN_INFORM", "IPI_CPU_BACKTRACE", "NULL", "NULL", "NULL", "NULL", "NULL", "NULL", "NULL", "NULL", "NULL", "NULL", "NULL", "NULL", "NULL", "NULL", "NULL", "NULL", "NULL", "Virtual maintenance", "Hypervisor timer", "Virtual timer", "Legacy FIQ signal", "Secure physical timer", "Non-secure physical timer", "Legacy IRQ signal", "intr_asp_arm_secure", "intr_asp_arm", "intr_asp_ipc_arm", "intr_aspdmac_secure", "intr_aspdmac_nonsecure", "intr_vad", "intr_asp_to_gic_bak_0", "intr_asp_to_gic_bak_1", "intr_asp_to_gic_bak_2", "intr_asp_to_gic_bak_3", "intr_asp_to_gic_bak_4", "intr_asp_to_gic_bak_5", "intr_asp_to_gic_bak_6", "intr_asp_to_gic_bak_7", "intr_asp_to_gic_bak_8", "intr_asp_to_gic_bak_9", "intr_asp_to_gic_bak_10", "intr_asp_to_gic_bak_11", "intr_asp_to_gic_bak_12", "intr_asp_to_gic_bak_13", "intr_asp_to_gic_bak_14", "intr_asp_rsv_0", "intr_asp_rsv_1", "intr_iomcu_wdog", "intr_iomcu_i3c2", "intr_iomcu_i2c0", "intr_iomcu_i2c1", "intr_iomcu_i3c1", "intr_iomcu_gpio0_gic", "intr_iomcu_gpio1_gic", "intr_iomcu_gpio2_gic", "intr_iomcu_gpio3_gic", "intr_iomcu_dma_ns_gic", "intr_iomcu_dma_gic", "intr_iomcu_comb", "intr_i3c0", "intr_iomcu_i3c3", "intr_iomcu_blpwm", "intr_iomcu_i2c5", "intr_i2c8", "intr_iomcu_spi", "intr_iomcu_uart3", "intr_iomcu_uart8", "intr_iomcu_spi2", "intr_iomcu_rsv_0", "intr_iomcu_rsv_1", "intr_hhsee_wdog", "intr_hhsee_ipc_gic_0", "intr_hhsee_ipc_gic_1", "intr_hhsee_ipc_gic_2", "intr_hhsee_ipc_gic_3", "intr_hhsee_rsv_0", "intr_hhsee_rsv_1", "intr_spi5", "intr_ao_blpwm", "intr_i2c9", "intr_rtc0", "intr_rtc1", "intr_ao_wd", "intr_ao_wd1", "intr_repair_err_0", "intr_repair_err_1", "intr_ckm_soc", "intr_gpio1_se_cpu", "intr_timer00", "intr_timer11", "intr_timer50", "intr_timer51", "intr_timer60", "intr_timer70", "intr_timer01", "intr_timer10", "intr_timer20", "intr_timer21", "intr_ao_rsv0", "intr_ao_rsv1", "intr_ao_rsv2", "intr_ao_rsv3", "intr_gic_from_l2_0_ao", "intr_gic_from_l2_1_ao", "intr_gic_from_l2_2_ao", "intr_gic_from_l2_3_ao", "intr_gic_from_l2_4_ao", "intr_gic_from_l2_5_ao", "NULL", "NULL", "NULL", "NULL", "NULL", "NULL", "intr_pcie0_100ms_idle_timeout_gic_lpmcu", "intr_pcie0_l12_wake_gic_lpmcu", "intr_pcie0_ap_sys_local_int0_gic_lpmcu", "intr_pcie0_ap_sys_inta_gic_lpmcu", "intr_pcie0_ap_sys_intb_gic", "intr_pcie0_ap_sys_intc_gic", "intr_pcie0_ap_sys_intd_gic", "intr_pcie0_pcs_gic_lpmcu", "intr_reserve_from_hsdt0_pcie0_0", "intr_reserve_from_hsdt0_pcie0_1", "intr_reserve_from_hsdt0_pcie0_2", "intr_pcie1_100ms_idle_timeout_gic_lpmcu", "intr_pcie1_l12_wake_gic_lpmcu", "intr_pcie1_ap_sys_local_int0_gic_lpmcu", "intr_pcie1_ap_sys_inta_gic_lpmcu", "intr_pcie1_ap_sys_intb_gic", "intr_pcie1_ap_sys_intc_gic", "intr_pcie1_ap_sys_intd_gic", "intr_pcie1_pcs_gic_lpmcu", "intr_reserve_from_hsdt0_pcie1_0", "intr_reserve_from_hsdt0_pcie1_1", "intr_reserve_from_hsdt0_pcie1_2", "intr_pcie0_tbu_irpt_ns_gic", "intr_pcie0_tbu_irpt_s_gic", "intr_pcie1_tbu_irpt_ns_gic", "intr_pcie1_tbu_irpt_s_gic", "intr_hsdt0_tcu_irpt_ns_gic", "intr_hsdt0_tcu_irpt_s_gic", "intr_reserve_from_hsdt0_smmu_0", "intr_reserve_from_hsdt0_smmu_1", "intr_ufshc_core_gic_0", "intr_ufshc_core_gic_1", "intr_ufshc_core_gic_2", "intr_ufshc_core_gic_3", "intr_ufshc_core_gic_4", "intr_ufshc_core_gic_5", "intr_ufshc_core_gic_6", "intr_ufshc_core_gic_7", "intr_reserve_from_hsdt0_ufs_0", "intr_reserve_from_hsdt0_ufs_1", "intr_hheps_alarm_gic_lpmcu", "intr_reserve_from_hsdt0_hheps", "intr_gic_from_l2_0_hsdt0", "intr_gic_from_l2_1_hsdt0", "intr_gic_from_l2_2_hsdt0", "intr_gic_from_l2_3_hsdt0", "intr_gic_from_l2_4_hsdt0", "intr_gic_from_l2_5_hsdt0", "NULL", "NULL", "intr_usb_sum_gic_lpmcu_iomcu", "intr_usbdp_mcu_gic_lpmcu", "intr_reserve_from_hsdt1_usb_0", "intr_reserve_from_hsdt1_usb_1", "intr_hidptx_ctrl_gic_lpmcu_iomcu", "intr_reserve_from_hsdt1_hidptx_0", "intr_reserve_from_hsdt1_hidptx_1", "intr_reserve_from_hsdt1_hidptx_2", "intr_hidif_ctrl_gic_lpmcu_iomcu", "intr_hidif_phy_pcs_gic_lpmcu_iomcu", "intr_reserve_from_hsdt1_hidif_0", "intr_reserve_from_hsdt1_hidif_1", "intr_sd3", "intr_sdio", "intr_reserve_from_hsdt1_sd_0", "intr_reserve_from_hsdt1_sd_1", "NULL", "NULL", "NULL", "NULL", "intr_dss_ns_mdp_to_gic", "intr_dss_ns_sdp_to_gic", "intr_dss_s_mdp_to_gic", "intr_dss_s_sdp_to_gic", "intr_dss_rsv_0", "intr_dss_rsv_1", "intr_ipp2acpu_1", "intr_ipp2acpu_2", "intr_ipp2acpu_11", "intr_ipp2acpu_16", "intr_ipp_rsv_0", "intr_ipp_rsv_1", "intr_ipp_rsv_2", "intr_merge_arpp2acpu_ns", "intr_merge_arpp2acpu_s", "intr_vdec_norm_to_gic", "intr_vdec_safe_to_gic", "intr_med1_tcu_irpt_ns", "intr_med1_tcu_irpt_s", "intr_med1_tcu_evento", "intr_gic_from_l2_0_m1", "intr_gic_from_l2_1_m1", "intr_gic_from_l2_2_m1", "intr_gic_from_l2_3_m1", "intr_gic_from_l2_4_m1", "NULL", "NULL", "NULL", "NULL", "NULL", "intr_isp_axi_dlock_irq_to_gic", "intr_isp_cpu_wdog_to_gic", "intr_isp_irq_to_gic_4", "intr_ivp32_watch_dog", "intr_ivp_dwaxi_dlock_to_gic", "intr_ivp_tbu_ns_to_gic", "intr_ivp_tbu_s_to_gic", "intr_venc_norm_to_gic", "intr_venc_safe_to_gic", "intr_idi2axi_gic", "intr_med2_tcu_irpt_ns", "intr_med2_tcu_irpt_s", "intr_med2_tcu_evento", "intr_gic_from_l2_0_m2", "intr_gic_from_l2_1_m2", "intr_gic_from_l2_2_m2", "NULL", "NULL", "NULL", "NULL", "intr_npu2acpu_hwts_normal_ns", "intr_npu2acpu_hwts_error_ns", "intr_npu2acpu_hwts_normal_s", "intr_npu2acpu_hwts_error_s", "intr_npu2acpu_tiny_hwts_normal", "intr_npu2acpu_tiny_hwts_error", "intr_npu2acpu_ipc_ns", "intr_npu2acpu_ipc_s", "intr_npu2acpu_ipc_ns_mbox_0", "intr_npu2acpu_ipc_ns_mbox_1", "intr_npu2acpu_ipc_s_mbox_0", "intr_npu2acpu_ipc_s_mbox_1", "intr_npu2acpu_hw_exp_irq_0", "intr_npu2acpu_hw_exp_irq_1", "intr_npu2acpu_hw_exp_irq_2", "intr_npu2acpu_hw_exp_irq_3", "intr_npu2acpu_hw_exp_irq_4", "intr_npu2acpu_hw_exp_irq_5", "intr_npu2acpu_hw_exp_irq_6", "intr_npu2acpu_hw_exp_irq_7", "intr_npu2acpu_tbu_ns", "intr_npu2acpu_tbu_s", "intr_npu2acpu_tcu_ns", "intr_npu2acpu_tcu_s", "intr_npu_gic_rsv_0", "intr_npu_gic_rsv_1", "intr_npu_gic_rsv_2", "intr_npu_gic_rsv_3", "intr_npu_gic_rsv_4", "intr_gic_from_l2_0_npu", "intr_gic_from_l2_1_npu", "intr_gic_from_l2_2_npu", "NULL", "NULL", "NULL", "NULL", "NULL", "NULL", "NULL", "NULL", "intr_cpu_to_gic_0", "intr_cpu_to_gic_1", "intr_cpu_to_gic_2", "intr_cpu_to_gic_3", "intr_cpu_to_gic_4", "intr_cpu_to_gic_5", "intr_cpu_to_gic_6", "intr_cpu_to_gic_7", "intr_cpu_to_gic_8", "intr_cpu_to_gic_9", "intr_cpu_to_gic_10", "intr_cpu_to_gic_11", "intr_cpu_to_gic_12", "intr_cpu_to_gic_13", "intr_cpu_to_gic_14", "intr_cpu_to_gic_15", "intr_cpu_to_gic_16", "intr_cpu_to_gic_17", "intr_cpu_to_gic_18", "intr_cpu_to_gic_19", "intr_cpu_to_gic_20", "intr_cpu_to_gic_21", "intr_cpu_to_gic_22", "intr_cpu_to_gic_23", "intr_cpu_to_gic_24", "intr_cpu_to_gic_25", "intr_cpu_to_gic_26", "intr_cpu_to_gic_27", "intr_cpu_to_gic_28", "intr_cpu_to_gic_29", "intr_cpu_to_gic_30", "intr_cpu_to_gic_31", "intr_cpu_fvt_cpu_big_power_aware_assert_to_gic", "intr_cpu_fvt_cpu_mid_power_aware_assert_to_gic", "intr_cpu_fvt_cpu_lit_power_aware_assert_to_gic", "intr_cpu_lp_ctrl_to_acpu_0", "intr_cpu_lp_ctrl_to_acpu_1", "intr_cpu_lp_ctrl_to_acpu_2", "intr_cpu_lp_ctrl_to_acpu_3", "intr_cpu_lp_ctrl_to_acpu_4", "intr_cpu_ip_to_gic_0", "intr_cpu_ip_to_gic_1", "intr_cpu_ip_to_gic_2", "intr_cpu_ip_to_gic_3", "intr_cpu_ip_to_gic_4", "intr_cpu_ip_to_gic_5", "intr_cpu_ip_to_gic_6", "intr_cpu_ip_to_gic_7", "intr_cpu_ip_to_gic_8", "intr_cpu_ip_to_gic_9", "intr_cpu_ip_to_gic_10", "intr_cpu_ip_to_gic_11", "intr_cpu_ip_to_gic_12", "intr_cpu_ip_to_gic_13", "intr_cpu_ip_to_gic_14", "intr_cpu_ip_to_gic_15", "intr_cpu_ip_to_gic_16", "intr_cpu_ip_to_gic_17", "intr_cpu_ip_to_gic_18", "intr_cpu_ip_to_gic_19", "intr_cpu_ip_to_gic_20", "intr_cpu_ip_to_gic_21", "intr_cpu_ip_to_gic_22", "intr_cpu_ip_to_gic_23", "intr_cpu_ip_to_gic_24", "intr_cpu_ip_to_gic_25", "intr_cpu_ip_to_gic_26", "intr_cpu_ip_to_gic_27", "intr_cpu_ip_to_gic_28", "intr_cpu_ip_to_gic_29", "intr_cpu_ip_to_gic_30", "intr_cpu_ip_to_gic_31", "trusted_core", "NULL", "NULL", "NULL", "NULL", "NULL", "NULL", "NULL", "intr_gic_wake_request_gic_lpmcu_0", "intr_gic_wake_request_gic_lpmcu_1", "intr_gic_wake_request_gic_lpmcu_2", "intr_gic_wake_request_gic_lpmcu_3", "intr_gic_wake_request_gic_lpmcu_4", "intr_gic_wake_request_gic_lpmcu_5", "intr_gic_wake_request_gic_lpmcu_6", "intr_gic_wake_request_gic_lpmcu_7", "intr_gic_wake_request_gic_lpmcu_8", "intr_pcr_cpub_to_gic", "intr_pcr_cpum_to_gic", "intr_pcr_cpul_to_gic", "NULL", "NULL", "NULL", "NULL", "NULL", "NULL", "NULL", "NULL", "intr_atgc", "intr_dma_0", "intr_dma_ns_0", "intr_etf_full", "intr_etr_full", "intr_gpio0_se_cpu", "intr_i2c2", "intr_i2c3", "intr_i2c4", "intr_i2c6", "intr_i2c7", "intr_i3c4", "intr_irq_aes_0", "intr_irq_aes_1", "intr_lat_mon", "intr_lpmcu_wdog", "intr_np_trig_flag_gic_lpmcu", "intr_perf_stat", "intr_peri_blpwm", "intr_peri_dvs_stat_pmc2acpu", "intr_pll_fsm", "intr_pll_unlock_acpu", "intr_power_stat_gic_lpmcu", "intr_sc_acpu_preload_done_ns", "intr_sc_acpu_preload_done_s", "intr_sc_dfx_ns_gic_lpmcu", "intr_sc_dfx_s_gic_lpmcu", "intr_sc_fc_ns_gic_lpmcu", "intr_sc_fc_s_gic_lpmcu", "intr_spi1", "intr_spi3", "intr_spi4", "intr_spmi_1", "intr_spmi_2", "intr_spmi1_1", "intr_spmi1_2", "intr_timer100", "intr_timer101", "intr_timer110", "intr_timer111", "intr_timer120", "intr_timer121", "intr_timer90", "intr_timer91", "intr_tsen", "intr_uart0", "intr_uart4", "intr_uart5", "intr_uart6", "intr_wd0", "intr_wd1", "vbat_drop_protect_db", "NULL", "NULL", "NULL", "NULL", "NULL", "NULL", "NULL", "NULL", "qic_comb_intr_lpmcu_acpu", "intr_comb_qice_dlock_ns_to_lpmcu_gic", "intr_comb_qice_dfx_ns_to_lpmcu_gic", "intr_comb_qice_sec_s_to_lpmcu_gic", "intr_comb_qice_pmon_ns_to_lpmcu_gic", "NULL", "NULL", "NULL", "NULL", "NULL", "intr_ipc_0", "intr_ipc_3", "intr_ipc_mbx_0", "intr_ipc_mbx_1", "intr_ipc_mbx_2", "intr_ipc_mbx_3", "intr_ipc_mbx_4", "intr_ipc_mbx_5", "intr_ipc_mbx_6", "intr_ipc_mbx_7", "intr_ipc_mbx_8", "intr_ipc_mbx_9", "intr_ipc_mbx_20", "intr_ipc_mbx_38", "intr_ipc_mbx_39", "intr_ipc_mbx_40", "intr_ipc_mbx_41", "intr_ipc_ns_0", "intr_ipc_ns_3", "intr_ipc_ns_ao_1", "intr_ipc_ns_mbx_0", "intr_ipc_ns_mbx_1", "intr_ipc_ns_mbx_2", "intr_ipc_ns_mbx_3", "intr_ipc_ns_mbx_4", "intr_ipc_ns_mbx_5", "intr_ipc_ns_mbx_6", "intr_ipc_ns_mbx_7", "intr_ipc_ns_mbx_8", "intr_ipc_ns_mbx_9", "intr_ipc_ns_mbx_10", "intr_ipc_ns_mbx_11", "intr_ipc_ns_mbx_12", "intr_ipc_ns_mbx_13", "intr_ipc_ns_mbx_14", "intr_ipc_ns_mbx_15", "intr_ipc_ns_mbx_16", "intr_ipc_ns_mbx_17", "intr_ipc_ns_mbx_18", "intr_ipc_ns_mbx_19", "intr_ipc_ns_mbx_20", "intr_ipc_ns_mbx_21", "intr_ipc_ns_mbx_32", "intr_ipc_ns_mbx_ao_1", "intr_ipc_ns_mbx_ao_6", "intr_ipc_ns_mbx_ao_7", "intr_ipc_ns_mbx_ao_8", "intr_ipc_s_ao_2", "intr_ipc_s_mbx_ao_12", "intr_ipc_s_mbx_ao_13", "intr_ipc_s_mbx_ao_14", "intr_ipc_s_mbx_ao_15", "intr_modem_ipc0_s_0", "intr_modem_ipc1_s_0", "NULL", "NULL", "NULL", "NULL", "NULL", "NULL", "intr_cpu_dsi0", "intr_cpu_dsi1", "intr_dsi2_cpu_int_gic", "intr_dsi2_mcu_int_gic_lpmcu", "intr_dsi2_pmm_int_gic", "intr_idi_csid", "intr_irq_csi2_e", "intr_mcu_dsi0", "intr_mcu_dsi1", "intr_pmm_dsi0", "intr_pmm_dsi1", "NULL", "NULL", "NULL", "NULL", "NULL", "NULL", "NULL", "NULL", "NULL", "intr_ddrc0_err_gic_lpmcu", "intr_ddrc_inband_ecc_err_gic_lpmcu_0", "intr_ddrc_fatal_gic_lpmcu_0", "intr_uce0_wdog_gic_lpmcu", "intr_ddrphy_gic_lpmcu_0", "intr_exmbist_l_gic_lpmcu", "NULL", "NULL", "NULL", "NULL", "eicc_int_0", "eicc_int_2", "eicc_int_4", "eicc_int_6", "intr_ipf0", "intr_ipf1", "intr_ipf2", "intr_maa_0", "intr_maa_1", "intr_maa_debug", "intr_modem_ipc0_ns_0", "intr_modem_ipc1_ns_0", "intr_socp_0", "intr_socp_1", "intr_spe_a", "intr_spe_c", "MDM2AP_ACPU_INTR_IF", "MDM2AP_ACPU_INTR_IF", "MDM2AP_ACPU_INTR_IF", "MDM2AP_ACPU_INTR_IF", "MDM2AP_ACPU_INTR_IF", "MDM2AP_ACPU_INTR_IF", "MDM2AP_ACPU_INTR_IF", "MDM2AP_ACPU_INTR_IF", "MDM2AP_ACPU_INTR_IF", "MDM2AP_ACPU_INTR_IF", "MDM2AP_ACPU_INTR_IF", "MDM2AP_ACPU_INTR_IF", "MDM2AP_ACPU_INTR_IF", "NULL", "NULL", "NULL", "NULL", "NULL", "NULL", "NULL", "NULL", "NULL", "NULL", "NULL", "intr_g3d_irqevent", "intr_g3d_irqgpu", "intr_g3d_irqjob", "intr_g3d_irqmmu", "intr_gpu_ctiirq0_gic", "intr_gpu_ctiirq1_gic", "intr_gpu_lp_ctrl_to_acpu_0", "intr_gpu_lp_ctrl_to_acpu_1", "intr_gpu_lp_ctrl_to_acpu_2", "intr_gpu_lp_ctrl_to_acpu_3", "intr_gpu_lp_ctrl_to_acpu_4", "intr_pcr_gpu_gic_lpmcu", "NULL", "NULL", "NULL", "NULL", "NULL", "NULL", "NULL", "NULL", "intr_peri_ioc_to_acpu0_0", "intr_peri_ioc_to_acpu0_1", "intr_peri_ioc_to_acpu1_0", "intr_peri_ioc_to_acpu1_1", "intr_peri_dsi_ioc_to_acpu0", "intr_peri_dsi_ioc_to_acpu1", "intr_ao_ioc_to_acpu0_0", "intr_ao_ioc_to_acpu0_1", "intr_ao_ioc_to_acpu0_2", "intr_ao_ioc_to_acpu0_3", "intr_ao_ioc_to_acpu1_0", "intr_ao_ioc_to_acpu1_1", "intr_ao_ioc_to_acpu1_2", "intr_ao_ioc_to_acpu1_3", "intr_hsdt0_ioc_to_acpu0", "intr_hsdt0_ioc_to_acpu1", "intr_hsdt1_ioc_to_acpu0", "intr_hsdt1_ioc_to_acpu1";
		lpmcu-irq-table = "IRQ_ASPIPC", "IRQ_VAD", "IRQ_MAD", "IRQ_IOMCU_WDT", "IRQ_WAKEUP_IGS_ENTER_REQ", "IRQ_WAKEUP_IGS_EXIT_REQ", "IRQ_INTR_WAKEUP_IOM3", "IRQ_HHSEE_WDOG", "IRQ_HHSEE_IPC_LPMCU0", "IRQ_HHSEE_IPC_LPMCU1", "IRQ_MSPC_TIMER0_LPMCU", "IRQ_MSPC_TIMER1_LPMCU", "IRQ_WAKEUP_SCTRL2M3_STAT", "IRQ_ASP_POWERUP", "IRQ_ASP_POWERDN", "IRQ_LFC_MODE_QUIT_TO_SCTRL_AND_LPMCU", "IRQ_RTC0", "IRQ_RTC1", "IRQ_AO_WD", "IRQ_AO_WD1", "IRQ_REPAIR_ERR_0", "IRQ_REPAIR_ERR_1", "IRQ_MC0", "IRQ_MC1", "IRQ_GPIO0_SE_LPMCU", "IRQ_AO_RSV0", "IRQ_AO_RSV1", "IRQ_AO_RSV2", "IRQ_LPMCU_FROM_L2_0_AO", "IRQ_LPMCU_FROM_L2_1_AO", "IRQ_LPMCU_FROM_L2_2_AO", "IRQ_LPMCU_FROM_L2_3_AO", "IRQ_LPMCU_FROM_L2_4_AO", "IRQ_LPMCU_FROM_L2_5_AO", "IRQ_LPMCU_FROM_L2_6_AO", "IRQ_LPMCU_FROM_L2_7_AO", "reserved", "reserved", "IRQ_LPMCU_FROM_L2_0_NPU", "reserved", "IRQ_PCIE0_100MS_IDLE_TIMEOUT_GIC_LPMCU", "IRQ_PCIE0_L12_WAKE_GIC_LPMCU", "IRQ_PCIE1_100MS_IDLE_TIMEOUT_GIC_LPMCU", "IRQ_PCIE1_L12_WAKE_GIC_LPMCU", "IRQ_HHEPS_ALARM_GIC_LPMCU", "reserved", "reserved", "reserved", "IRQ_LPMCU_FROM_L2_0_HSDT0", "IRQ_LPMCU_FROM_L2_1_HSDT0", "IRQ_LPMCU_FROM_L2_2_HSDT0", "IRQ_LPMCU_FROM_L2_3_HSDT0", "reserved", "reserved", "reserved", "IRQ_USB_SUM_GIC_LPMCU_IOMCU", "IRQ_USBDP_MCU_GIC_LPMCU", "IRQ_HIDPTX_CTRL_GIC_LPMCU_IOMCU", "IRQ_HIDIF_CTRL_GIC_LPMCU_IOMCU", "IRQ_HIDIF_PHY_PCS_GIC_LPMCU_IOMCU", "IRQ_DSS_NS_DFS_OK_TO_LPMCU", "IRQ_DSS_S_MDP_TO_LPMCU", "IRQ_LPMCU_FROM_L2_0_M1", "IRQ_LPMCU_FROM_L2_1_M1", "IRQ_LPMCU_FROM_L2_2_M1", "IRQ_ISP_CPU_TO_M3_IPC_TO_LPMCU", "IRQ_ISP_CPU_WDOG_TO_LPMCU", "reserved", "IRQ_ISP_CPU_TO_M3_MBX_TO_LPMCU0", "IRQ_ISP_CPU_TO_M3_MBX_TO_LPMCU1", "IRQ_MED2_LPMCU_RSV", "IRQ_IVP32_WATCH_DOG", "IRQ_LPMCU_FROM_L2_0_M2", "IRQ_LPMCU_FROM_L2_1_M2", "reserved", "IRQ_CPU_BIG_PWR_LPMCU", "IRQ_CPU_LITTLE_PWR_LPMCU", "IRQ_CPU_MIDDLE_PWR_LPMCU", "reserved", "IRQ_CPU_LP_CTRL_TO_LPMCU0", "IRQ_CPU_LP_CTRL_TO_LPMCU1", "IRQ_CPU_LP_CTRL_TO_LPMCU2", "reserved", "IRQ_PCR_CPUB_TO_LPMCU", "reserved", "IRQ_DMA2", "IRQ_DMA_NS2", "IRQ_FREQUENCY_VOTE", "IRQ_LAT_MON", "IRQ_LPMCU_PCTRL_TIMEOUT", "IRQ_WATCHDOG", "IRQ_MCU_DSI0", "IRQ_MCU_DSI1", "IRQ_NOCBUS_NONIDLE_PEND", "IRQ_NP_TRIG_FLAG_GIC_LPMCU", "IRQ_PERI_DVS_STAT_PMC2LPM3", "IRQ_PLL_FSM", "IRQ_PLL_UNLOCK_LPMCU", "IRQ_POWER_STAT_GIC_LPMCU", "IRQ_PROBHIT", "IRQ_SC_FC_S_GIC_LPMCU", "IRQ_TSEN", "IRQ_UART0", "IRQ_UART6", "IRQ_APWDOG", "IRQ_WD1", "IRQ_ATGC", "IRQ_GPIO1_SE_LPMCU", "reserved", "reserved", "IRQ_MODEM_IPC0_S6", "IRQ_MODEM_IPC0_S0", "IRQ_MODEM_IPC0_S7", "IRQ_MODEM_IPC0_NS2", "IRQ_MODEM_IPC0_S3", "IRQ_MODEM_IPC0_S4", "IRQ_MODEM_IPC0_S5", "IRQ_NVIC117_MDM2AP_CM3_IF", "IRQ_SOCP0", "IRQ_EICC_INT0", "IRQ_EICC_INT8", "IRQ_EICC_INT10", "IRQ_EICC_INT12", "IRQ_EICC_INT14", "IRQ_SPE_A", "IRQ_TSP0_WAKEUP_INTR", "IRQ_TSP1_WAKEUP_INTR", "IRQ_TSP2_WAKEUP_INTR", "IRQ_NVIC128_MDM2AP_CM3_IF", "IRQ_NVIC129_MDM2AP_CM3_IF", "IRQ_MAA_0", "IRQ_NVIC131_MDM2AP_CM3_IF", "IRQ_NVIC132_MDM2AP_CM3_IF", "IRQ_NVIC133_MDM2AP_CM3_IF", "IRQ_NVIC134_MDM2AP_CM3_IF", "IRQ_NVIC135_MDM2AP_CM3_IF", "reserved", "reserved", "reserved", "reserved", "IRQ_DDRC_FATAL_GIC_LPMCU0", "IRQ_DDRC_INBAND_ECC_ERR_GIC_LPMCU0", "IRQ_DDRC0_ERR_GIC_LPMCU", "IRQ_DDRCA0_RESET_LPMCU", "IRQ_DDRPHY_GIC_LPMCU0", "IRQ_DDRXCTRL_TO_LPMCU0", "IRQ_EXMBIST_L_GIC_LPMCU", "IRQ_MDDRC_RESET_L_LPMCU", "IRQ_UCE0_IPC_LPMCU", "IRQ_UCE0_IPC_MBX_LPMCU", "IRQ_UCE1_IPC_LPMCU", "IRQ_UCE1_IPC_MBX_LPMCU", "IRQ_UCE2_IPC_LPMCU", "IRQ_UCE2_IPC_MBX_LPMCU", "IRQ_UCE3_IPC_LPMCU", "IRQ_UCE3_IPC_MBX_LPMCU", "IRQ_UCE0_RTACTIVE_LPMCU", "IRQ_UCE0_WDOG_GIC_LPMCU", "reserved", "reserved", "IRQ_DSI2_MCU_INT_GIC_LPMCU", "IRQ_SLEEP_IDLE_DSI_LPM3", "IRQ_GPU_LP_CTRL_TO_LPMCU0", "IRQ_GPU_LP_CTRL_TO_LPMCU1", "IRQ_GPU_LP_CTRL_TO_LPMCU2", "IRQ_COMB_QICE_DLOCK_NS_TO_LPMCU_GIC", "IRQ_IPC0", "_IRQ_COMB_IOM3_IPC", "IRQ_IPC_S_AO3", "IRQ_IPC_MBX21", "IRQ_IPC2", "IRQ_IPC_MBX13", "IRQ_IPC_MBX14", "IRQ_IPC_MBX15", "IRQ_IPC_MBX16", "IRQ_IPC_MBX17", "IRQ_IPC_MBX18", "IRQ_IPC_MBX19", "IRQ_IPC_MBX42", "IRQ_IPC_MBX43", "IRQ_IPC_MBX44", "IRQ_IPC_MBX45", "IRQ_IPC_NS2", "IRQ_IPC_NS_MBX25", "IRQ_IPC_NS_MBX26", "IRQ_IPC_NS_MBX27", "IRQ_IPC_NS_MBX28", "IRQ_IPC_NS_MBX29", "IRQ_IPC_NS_MBX30", "IRQ_IPC_NS_MBX31", "IRQ_IPC_NS_MBX63", "IRQ_IPC_NS_MBX64", "IRQ_IPC_S_AO1", "IRQ_AO_IPC_S_MBX4", "IRQ_IPC_S_MBX_AO5", "IRQ_PERI_IOC_TO_ACPU0_0", "IRQ_PERI_IOC_TO_IOMCU_0", "IRQ_PERI_IOC_TO_MDM_0", "IRQ_PERI_IOC_TO_LPMCU_0", "reserved", "reserved", "IRQ_GIC_WAKE_REQUEST_GIC_LPMCU0", "reserved", "IRQ_NVIC203_BBPON2CM3_IF", "IRQ_NVIC204_BBPON2CM3_IF", "reserved", "IRQ_NVIC206_MDM2AP_WAKEUP_IF", "IRQ_NVIC207_MDM2AP_WAKEUP_IF", "IRQ_MDM2AP_WAKEUP_IF", "reserved", "IRQ_I2C2", "IRQ_SPE_C", "IRQ_QIC_PERI_COMB_LPMCU_ACPU", "IRQ_CPU_FVT_CPU_BIG_DVFS_EVENT_UP_TO_LPMCU", "reserved", "reserved", "reserved", "reserved", "reserved", "reserved", "reserved", "reserved", "reserved", "reserved", "reserved", "reserved", "reserved", "IRQ_TIMINT1", "IRQ_TIMINT2", "IRQ_RXEV";
		phandle = <0x6dc>;

		pmu_buck00 {
			compatible = "lowpm_sr_mntn_pmu";
			lp-pmu-name = "BUCK00";
			lp-pmu-module = "<PERI>";
			lp-pmu-status-value = <0x01>;
			lp-pmu-status = "CLOSE_BY_PERI_EN";
			offset = <0x0a>;
			mask = <0x02>;
		};

		pmu_buck01 {
			compatible = "lowpm_sr_mntn_pmu";
			lp-pmu-name = "BUCK01";
			lp-pmu-module = "<PERI>";
			lp-pmu-status-value = <0x02>;
			lp-pmu-status = "ECO_BY_PERI_EN";
			offset = <0x0b>;
			mask = <0x02>;
		};

		pmu_buck1 {
			compatible = "lowpm_sr_mntn_pmu";
			lp-pmu-name = "BUCK1";
			lp-pmu-module = "<1.12V plane/LPDDR4x/SOC PHY/VDD11>";
			lp-pmu-status-value = <0x02>;
			lp-pmu-status = "ECO_BY_PERI_EN";
			offset = <0x0d>;
			mask = <0x02>;
		};

		pmu_buck2 {
			compatible = "lowpm_sr_mntn_pmu";
			lp-pmu-name = "BUCK2";
			lp-pmu-module = "<1.3V Power plane>";
			lp-pmu-status-value = <0x02>;
			lp-pmu-status = "ECO_BY_PERI_EN";
			offset = <0x0e>;
			mask = <0x02>;
		};

		pmu_buck3 {
			compatible = "lowpm_sr_mntn_pmu";
			lp-pmu-name = "BUCK3";
			lp-pmu-module = "<1.95V Power plane CODEC PVDD HI1103>";
			lp-pmu-status-value = <0x02>;
			lp-pmu-status = "ECO_BY_PERI_EN";
			offset = <0x0f>;
			mask = <0x02>;
		};

		pmu_buck4 {
			compatible = "lowpm_sr_mntn_pmu";
			lp-pmu-name = "BUCK4";
			lp-pmu-module = "<modem>";
			lp-pmu-status-value = <0x08>;
			lp-pmu-status = "CLOSE_BY_ACPU";
			offset = <0x10>;
			mask = <0x02>;
		};

		pmu_buck5 {
			compatible = "lowpm_sr_mntn_pmu";
			lp-pmu-name = "BUCK5";
			lp-pmu-module = "<PERI DUARAIL MODEM MEM >";
			lp-pmu-status-value = <0x08>;
			lp-pmu-status = "CLOSE_BY_LPMCU";
			offset = <0x11>;
			mask = <0x02>;
		};

		pmu_buck6 {
			compatible = "lowpm_sr_mntn_pmu";
			lp-pmu-name = "BUCK6";
			lp-pmu-module = "<DDR DMC/PHY CORE>";
			lp-pmu-status-value = <0x08>;
			lp-pmu-status = "CLOSE_BY_LPMCU";
			offset = <0x12>;
			mask = <0x02>;
		};

		pmu_buck7 {
			compatible = "lowpm_sr_mntn_pmu";
			lp-pmu-name = "BUCK7";
			lp-pmu-module = "<LPDDR4 DDR_PHY_IO LPDDR4X VDDQ>";
			lp-pmu-status-value = <0x08>;
			lp-pmu-status = "CLOSE_BY_ACPU";
			offset = <0x13>;
			mask = <0x02>;
		};

		pmu_buck8 {
			compatible = "lowpm_sr_mntn_pmu";
			lp-pmu-name = "BUCK8";
			lp-pmu-module = "<SOCIO UFS LPDDR4x TPIO>";
			lp-pmu-status-value = <0x08>;
			lp-pmu-status = "ECO_BY_PERI_EN";
			offset = <0x14>;
			mask = <0x02>;
		};

		pmu_buck9 {
			compatible = "lowpm_sr_mntn_pmu";
			lp-pmu-name = "BUCK9";
			lp-pmu-module = "<AO plane power 0.9v>";
			lp-pmu-status-value = <0x08>;
			lp-pmu-status = "ECO_BY_PERI_EN";
			offset = <0x15>;
			mask = <0x02>;
		};

		pmu_buck10 {
			compatible = "lowpm_sr_mntn_pmu";
			lp-pmu-name = "BUCK10";
			lp-pmu-module = "<NPU>";
			lp-pmu-status-value = <0x08>;
			lp-pmu-status = "ECO_BY_PERI_EN";
			offset = <0x0c>;
			mask = <0x02>;
		};

		pmu_buck9_ldo0 {
			compatible = "lowpm_sr_mntn_pmu";
			lp-pmu-name = "BUCK1_LDO0";
			lp-pmu-module = "<SYS CORE DSP IOMCU HIFD>";
			lp-pmu-status-value = <0x02>;
			lp-pmu-status = "ECO_BY_PERI_EN";
			offset = <0x16>;
			mask = <0x02>;
		};

		pmu_buck2_ldo1 {
			compatible = "lowpm_sr_mntn_pmu";
			lp-pmu-name = "BUCK2_LDO1";
			lp-pmu-module = "<Hi6363 Analog 1 RF1>";
			lp-pmu-status-value = <0x08>;
			lp-pmu-status = "CLOSE_BY_ACPU";
			offset = <0x17>;
			mask = <0x02>;
		};

		pmu_buck3_ldo2_1 {
			compatible = "lowpm_sr_mntn_pmu";
			lp-pmu-name = "BUCK3_LDO2_1";
			lp-pmu-module = "<EFUSE 1.8V>";
			lp-pmu-status-value = <0x02>;
			lp-pmu-status = "CLOSE_BY_LPMCU";
			offset = <0x18>;
			mask = <0x02>;
		};

		pmu_buck3_ldo2_2 {
			compatible = "lowpm_sr_mntn_pmu";
			lp-pmu-name = "BUCK3_LDO2_2";
			lp-pmu-module = "<Hisee 1.8V>";
			lp-pmu-status-value = <0x02>;
			lp-pmu-status = "CLOSE_BY_LPMCU";
			offset = <0x19>;
			mask = <0x02>;
		};

		pmu_buck3_ldo3 {
			compatible = "lowpm_sr_mntn_pmu";
			lp-pmu-name = "BUCK3_LDO3";
			lp-pmu-module = "<hi6363 avdd2 LNA>";
			lp-pmu-status-value = <0x08>;
			lp-pmu-status = "CLOSE_BY_ACPU";
			offset = <0x1a>;
			mask = <0x02>;
		};

		pmu_buck3_ldo4 {
			compatible = "lowpm_sr_mntn_pmu";
			lp-pmu-name = "BUCK3_LDO4";
			lp-pmu-module = "<LCD&TP 1.8V IO>";
			lp-pmu-status-value = <0x08>;
			lp-pmu-status = "CLOSE_BY_ACPU";
			offset = <0x1b>;
			mask = <0x02>;
		};

		pmu_buck1_ldo6 {
			compatible = "lowpm_sr_mntn_pmu";
			lp-pmu-name = "BUCK1_LDO6";
			lp-pmu-module = "<ABB analog>";
			lp-pmu-status-value = <0x02>;
			lp-pmu-status = "CLOSE_BY_PERI_EN";
			offset = <0x1d>;
			mask = <0x02>;
		};

		pmu_buck3_ldo7 {
			compatible = "lowpm_sr_mntn_pmu";
			lp-pmu-name = "BUCK3_LDO7";
			lp-pmu-module = "<AVDDH_ABB AVDD1P8_PLL>";
			lp-pmu-status-value = <0x01>;
			lp-pmu-status = "CLOSE_BY_PERI_EN";
			offset = <0x1e>;
			mask = <0x02>;
		};

		pmu_buck3_ldo8 {
			compatible = "lowpm_sr_mntn_pmu";
			lp-pmu-name = "BUCK3_LDO8";
			lp-pmu-module = "<CODECCLK AOCAM CLK for hi6421v80 hkadc>";
			lp-pmu-status-value = <0x40>;
			lp-pmu-status = "ECO_BY_SOFTWARE";
			offset = <0x1f>;
			mask = <0x02>;
		};

		pmu_boost_ldo9 {
			compatible = "lowpm_sr_mntn_pmu";
			lp-pmu-name = "BOOST_LDO9";
			lp-pmu-module = "<vdd of sd card io>";
			lp-pmu-status-value = <0x08>;
			lp-pmu-status = "CLOSE_BY_ACPU";
			offset = <0x20>;
			mask = <0x02>;
		};

		pmu_boost_ldo11 {
			compatible = "lowpm_sr_mntn_pmu";
			lp-pmu-name = "BOOST_LDO11";
			lp-pmu-module = "<SIM0>";
			lp-pmu-status-value = <0x02>;
			lp-pmu-status = "ECO_BY_PERI_EN";
			offset = <0x21>;
			mask = <0x02>;
		};

		pmu_boost_ldo12 {
			compatible = "lowpm_sr_mntn_pmu";
			lp-pmu-name = "BOOST_LDO12";
			lp-pmu-module = "<SIM1>";
			lp-pmu-status-value = <0x02>;
			lp-pmu-status = "ECO_BY_PERI_EN";
			offset = <0x22>;
			mask = <0x02>;
		};

		pmu_boost_ldo14 {
			compatible = "lowpm_sr_mntn_pmu";
			lp-pmu-name = "BOOST_LDO14";
			lp-pmu-module = "<AUX_DAC RF Switch>";
			lp-pmu-status-value = <0x08>;
			lp-pmu-status = "CLOSE_BY_ACPU";
			offset = <0x23>;
			mask = <0x02>;
		};

		pmu_boost_ldo15 {
			compatible = "lowpm_sr_mntn_pmu";
			lp-pmu-name = "BOOST_LDO15";
			lp-pmu-module = "<UFS>";
			lp-pmu-status-value = <0x08>;
			lp-pmu-status = "ECO_BY_PERI_EN";
			offset = <0x24>;
			mask = <0x02>;
		};

		pmu_boost_ldo16 {
			compatible = "lowpm_sr_mntn_pmu";
			lp-pmu-name = "BOOST_LDO16";
			lp-pmu-module = "<SD>";
			lp-pmu-status-value = <0x08>;
			lp-pmu-status = "CLOSE_BY_ACPU";
			offset = <0x25>;
			mask = <0x02>;
		};

		pmu_boost_ldo17 {
			compatible = "lowpm_sr_mntn_pmu";
			lp-pmu-name = "BOOST_LDO17";
			lp-pmu-module = "<LCD &TP AVDD 2.8V>";
			lp-pmu-status-value = <0x08>;
			lp-pmu-status = "CLOSE_BY_ACPU";
			offset = <0x26>;
			mask = <0x02>;
		};

		pmu_buck3_ldo18 {
			compatible = "lowpm_sr_mntn_pmu";
			lp-pmu-name = "BUCK3_LDO18";
			lp-pmu-module = "<NFC Sensor Connect Codec TP>";
			lp-pmu-status-value = <0x08>;
			lp-pmu-status = "ECO_BY_PERI_EN";
			offset = <0x27>;
			mask = <0x02>;
		};

		pmu_buck3_ldo21 {
			compatible = "lowpm_sr_mntn_pmu";
			lp-pmu-name = "BUCK3_LDO21";
			lp-pmu-module = "<Camera IO>";
			lp-pmu-status-value = <0x08>;
			lp-pmu-status = "CLOSE_BY_ACPU";
			offset = <0x28>;
			mask = <0x02>;
		};

		pmu_buck2_ldo22 {
			compatible = "lowpm_sr_mntn_pmu";
			lp-pmu-name = "BUCK2_LDO22";
			lp-pmu-module = "<hi6363 analog1 RF2>";
			lp-pmu-status-value = <0x08>;
			lp-pmu-status = "CLOSE_BY_ACPU";
			offset = <0x29>;
			mask = <0x02>;
		};

		pmu_boost_ldo23 {
			compatible = "lowpm_sr_mntn_pmu";
			lp-pmu-name = "BOOST_LDO23";
			lp-pmu-module = "<USB20>";
			lp-pmu-status-value = <0x01>;
			lp-pmu-status = "CLOSE_BY_ACPU";
			offset = <0x2a>;
			mask = <0x02>;
		};

		pmu_boost_ldo24 {
			compatible = "lowpm_sr_mntn_pmu";
			lp-pmu-name = "BOOST_LDO24";
			lp-pmu-module = "<X_Sensor AVDD Digital>";
			lp-pmu-status-value = <0x08>;
			lp-pmu-status = "ECO_BY_SOFTWARE";
			offset = <0x2b>;
			mask = <0x02>;
		};

		pmu_buck2_ldo25 {
			compatible = "lowpm_sr_mntn_pmu";
			lp-pmu-name = "BOOST_LDO25";
			lp-pmu-module = "<RF-6363>";
			lp-pmu-status-value = <0x08>;
			lp-pmu-status = "CLOSE_BY_ACPU";
			offset = <0x2c>;
			mask = <0x02>;
		};

		pmu_buck3_ldo26 {
			compatible = "lowpm_sr_mntn_pmu";
			lp-pmu-name = "BUCK3_LDO26";
			lp-pmu-module = "<DCXO_XO>";
			lp-pmu-status-value = <0x02>;
			lp-pmu-status = "CLK_EN_ECO";
			offset = <0x2d>;
			mask = <0x02>;
		};

		pmu_boost_ldo27 {
			compatible = "lowpm_sr_mntn_pmu";
			lp-pmu-name = "BOOST_LDO27";
			lp-pmu-module = "<XO ADC+HKADC>";
			lp-pmu-status-value = <0x10>;
			lp-pmu-status = "CLOSE_BY_PERI_EN";
			offset = <0x2e>;
			mask = <0x02>;
		};

		pmu_buck3_ldo28 {
			compatible = "lowpm_sr_mntn_pmu";
			lp-pmu-name = "BUCK3_LDO28";
			lp-pmu-module = "<RF MIPI Tuner 1.8V>";
			lp-pmu-status-value = <0x08>;
			lp-pmu-status = "CLOSE_BY_ACPU";
			offset = <0x2f>;
			mask = <0x02>;
		};

		pmu_buck3_ldo29 {
			compatible = "lowpm_sr_mntn_pmu";
			lp-pmu-name = "BUCK3_LDO29";
			lp-pmu-module = "<AMOLED VDDIO>";
			lp-pmu-status-value = <0x02>;
			lp-pmu-status = "ECO_BY_PERI_EN";
			offset = <0x30>;
			mask = <0x02>;
		};

		pmu_buck9_ldo30 {
			compatible = "lowpm_sr_mntn_pmu";
			lp-pmu-name = "BUCK1_LDO30";
			lp-pmu-module = "<SOC USB PHY>";
			lp-pmu-status-value = <0x01>;
			lp-pmu-status = "CLOSE_BY_PERI_EN";
			offset = <0x31>;
			mask = <0x02>;
		};

		pmu_buck2_ldo32 {
			compatible = "lowpm_sr_mntn_pmu";
			lp-pmu-name = "BUCK2_LDO32";
			lp-pmu-module = "<camera vdd>";
			lp-pmu-status-value = <0x08>;
			lp-pmu-status = "CLOSE_BY_ACPU";
			offset = <0x32>;
			mask = <0x02>;
		};

		pmu_boost_ldo34 {
			compatible = "lowpm_sr_mntn_pmu";
			lp-pmu-name = "BOOST_LDO34";
			lp-pmu-module = "<Finger Pr AVDD Codec>";
			lp-pmu-status-value = <0x08>;
			lp-pmu-status = "ECO_BY_SOFTWARE";
			offset = <0x33>;
			mask = <0x02>;
		};

		pmu_boost_pmuh {
			compatible = "lowpm_sr_mntn_pmu";
			lp-pmu-name = "BOOST_PMUH";
			lp-pmu-module = "<PMUH>";
			lp-pmu-status-value = <0x08>;
			lp-pmu-status = "ECO_BY_PERI_EN";
			offset = <0x34>;
			mask = <0x02>;
		};

		pmu_buck2_ldo36 {
			compatible = "lowpm_sr_mntn_pmu";
			lp-pmu-name = "BUCK3_LDO36";
			lp-pmu-module = "<UFS IO SYS_CLK>";
			lp-pmu-status-value = <0x08>;
			lp-pmu-status = "ECO_BY_SOFTWARE";
			offset = <0x35>;
			mask = <0x02>;
		};

		pmu_buck2_ldo37 {
			compatible = "lowpm_sr_mntn_pmu";
			lp-pmu-name = "BUCK3_LDO37";
			lp-pmu-module = "<PCIE PHY/PLL DSI/CSI PHY>";
			lp-pmu-status-value = <0x08>;
			lp-pmu-status = "ECO_BY_SOFTWARE";
			offset = <0x36>;
			mask = <0x02>;
		};

		pmu_buck2_ldo38 {
			compatible = "lowpm_sr_mntn_pmu";
			lp-pmu-name = "BUCK3_LDO38";
			lp-pmu-module = "<UFS VDDQ>";
			lp-pmu-status-value = <0x08>;
			lp-pmu-status = "ECO_BY_SOFTWARE";
			offset = <0x37>;
			mask = <0x02>;
		};

		pmu_buck9_ldo40 {
			compatible = "lowpm_sr_mntn_pmu";
			lp-pmu-name = "BUCK3_LDO40";
			lp-pmu-module = "<VDDC_MEM_MODEM>";
			lp-pmu-status-value = <0x08>;
			lp-pmu-status = "ECO_BY_SOFTWARE";
			offset = <0x39>;
			mask = <0x02>;
		};

		pmu_buck2_ldo41 {
			compatible = "lowpm_sr_mntn_pmu";
			lp-pmu-name = "BUCK3_LDO41";
			lp-pmu-module = "<codec DVDD>";
			lp-pmu-status-value = <0x08>;
			lp-pmu-status = "ECO_BY_SOFTWARE";
			offset = <0x3a>;
			mask = <0x02>;
		};

		pmu_buck3_pmua {
			compatible = "lowpm_sr_mntn_pmu";
			lp-pmu-name = "BUCK3_PMUA";
			lp-pmu-module = "<PMUA>";
			lp-pmu-status-value = <0x08>;
			lp-pmu-status = "ECO_BY_SOFTWARE";
			offset = <0x3b>;
			mask = <0x02>;
		};

		pmu_buck3_pmud {
			compatible = "lowpm_sr_mntn_pmu";
			lp-pmu-name = "BUCK3_PMUA";
			lp-pmu-module = "<PMUD>";
			lp-pmu-status-value = <0x08>;
			lp-pmu-status = "ECO_BY_SOFTWARE";
			offset = <0x3b>;
			mask = <0x02>;
		};

		lp_clk0 {
			compatible = "lowpm_sr_mntn_clock";
			lp-clk-name = "st_clk_ref_crc", "st_pclk_rtc", "st_pclk_rtc1", "st_pclk_timer0", "reserved_0", "st_pclk_timer1", "reserved_1", "st_pclk_timer2", "reserved_2", "st_pclk_timer3", "reserved_3", "aupll_sscg_idle", "spll_sscg_idle", "st_clk_pcie0_aux", "st_clk_pcie1_aux", "st_pclk_ao_ioc", "st_pclk_blpwm2", "st_clk_out0", "st_clk_jtag_auth", "st_pclk_syscnt", "st_clk_syscnt", "reserved_4", "st_clk_hheps_ree", "st_clk_sci0", "st_clk_sci1", "st_clk_mad", "st_clk_asp_subsys", "st_clk_asp_tcxo", "st_pclk_bbpdrx", "st_clk_qcr_aspbus", "st_pclk_efusec", "st_clk_spll_sscg", "gt_clk_spll_sscg";
			lp-clk-reg-domain = "SYSCTRL";
			offset = <0x16c>;
			bit-num = <0x20>;
		};

		lp_clk1 {
			compatible = "lowpm_sr_mntn_clock";
			lp-clk-name = "st_clk_asp_dw_axi", "st_clk_asp_x2h", "st_clk_asp_h2p", "st_clk_asp_cfg", "st_clk_mad_axi", "st_clk_noc_aobus2sysbusddrc", "st_clk_ao_camera", "reserved_0", "st_clk_mad_32k", "st_clk_fll_src_tp", "st_pclk_timer4", "reserved_1", "st_pclk_timer5", "reserved_2", "st_pclk_timer6", "reserved_3", "st_pclk_timer7", "reserved_4", "st_pclk_timer8", "reserved_5", "st_timerclk_refh", "st_clk_em_sync_top", "swdone_clk_iomcu_fll_src_div", "swdone_clk_aobus_div", "st_clk_noc_aobus2aspbus", "st_clk_noc_aobus2iomcubus", "st_clk_hsdt_subsys", "swdone_clk_asp_subsys_div", "swdone_clk_sci_div", "sw_ack_clk_aobus_sw", "sw_ack_clk_aobus_sw", "sw_ack_clk_aobus_sw";
			lp-clk-reg-domain = "SYSCTRL";
			offset = <0x17c>;
			bit-num = <0x20>;
		};

		lp_clk2 {
			compatible = "lowpm_sr_mntn_clock";
			lp-clk-name = "sw_ack_clk_hheps_ree_sw", "sw_ack_clk_hheps_ree_sw", "swdone_clk_aonoc_pll_div", "swdone_clk_iomcu_pll_div", "sw_ack_clk_aonoc_sw", "sw_ack_clk_aonoc_sw", "sw_ack_clk_aonoc_sw", "sw_ack_clk_aonoc_sw", "swdone_clk_spi3_ulppll", "swdone_clk_spi3", "sw_ack_clk_asp_subsys_ini", "sw_ack_clk_asp_subsys_ini", "sw_ack_clk_asp_subsys_ini", "sw_ack_clk_asp_subsys_ini", "reset_dram_n", "swdone_clk_spi5_ulppll", "swdone_clk_spi5", "swdone_clk_pcie_aux_32kpll_div", "st_clk_hsdt0_pcie_aux", "swdone_clk_dp_audio_pll_ao_div", "st_clk_iomcu_fll_src", "st_pclk_ao_wd", "st_clk_iomcu_pll_div", "swdone_clk_hheps_ree_div", "swdone_clk_mad_fll_div", "st_clk_fll_test_src", "st_pclkdbg_to_iomcu", "st_clk_asp_codec", "swdone_clk_out0_div", "swdone_clk_asp_subsys_fll_div", "swdone_clk_aonoc_fll_div", "swdone_clk_noc_timeout_extref_div";
			lp-clk-reg-domain = "SYSCTRL";
			offset = <0x19c>;
			bit-num = <0x20>;
		};

		lp_clk3 {
			compatible = "lowpm_sr_mntn_clock";
			lp-clk-name = "reserved_0", "st_pclk_ao_gpio1_se", "gt_aobus_noc_ini", "autodiv_aonoc_pll_stat", "autodiv_aonoc_fll_stat", "st_pclk_timer17", "reserved_1", "st_pclk_timer16", "reserved_2", "st_pclk_timer15", "reserved_3", "st_pclk_timer14", "reserved_4", "st_pclk_timer13", "reserved_5", "st_pclk_ao_ipc", "st_clk_dp_audio_pll_tp", "sw_ack_clk_pcie_aux", "sw_ack_clk_pcie_aux", "reserved_6", "reserved_7", "st_atclk_to_iomcu", "st_clk_noc_timeout_extref_peri", "st_timerclk_refh_peri", "st_clkin_sys_peri", "st_clkin_ref_peri", "st_clk_sys_ini_peri", "swdone_clk_em_sync_top_div", "st_clk_ref_peri", "st_clk_sys_peri", "st_clk_aobus_peri", "st_clk_fll_src_peri";
			lp-clk-reg-domain = "SYSCTRL";
			offset = <0x1ac>;
			bit-num = <0x20>;
		};

		lp_clk4 {
			compatible = "lowpm_sr_mntn_clock";
			lp-clk-name = "st_clk_memrepair_ao", "st_clk_spmi_mst", "st_pclk_ao_tzpc", "st_pclk_ao_ipc_ns", "st_pclk_ao_loadmonitor", "st_clk_ao_loadmonitor", "st_ulppll_1_out", "st_clk_dp_audio_pll", "reserved_0", "reserved_1", "st_clk_spi3", "st_clk_spi5", "st_clk_mfcc", "st_clk_autodiv_ufs_subsys", "st_clk_ufs_subsys", "sw_ack_clk_mad_sw", "sw_ack_clk_mad_sw", "st_clk_ao_atb_brg", "st_clk_pll_fsm", "reserved_2", "reserved_3", "st_clk_memrepair_peri", "st_pclk_intr_hub", "reserved_4", "st_clk_aupll_sscg", "st_clk_ufs_ref_test", "reserved_5", "swdone_clk_timer_div", "reserved_6", "reserved_7", "st_clk_spmi1_mst", "swdone_clk_ao_332m_div";
			lp-clk-reg-domain = "SYSCTRL";
			offset = <0x1bc>;
			bit-num = <0x20>;
		};

		lp_clk5 {
			compatible = "lowpm_sr_mntn_clock";
			lp-clk-name = "reserved_0", "reserved_0", "ulppll_1_lock", "ulppll_lock", "swdone_clk_blpwm2_div", "st_clk_ao_tcp_h2x", "st_clk_ao_tcp", "st_clk_ao_tcp_32k", "reserved_1", "sw_ack_clk_spi3_sw", "sw_ack_clk_spi3_sw", "sw_ack_clk_spi5_sw", "sw_ack_clk_spi5_sw", "st_clk_qcr_iomcubus", "st_clk_spll_peri", "swdone_clk_i2c9_div", "reserved_2", "reserved_2", "st_clk_sys_ini", "st_clk_ao_tof", "st_pclk_efusec2", "st_clkin_sys_logic_peri", "st_pclk_ao_wd1", "st_pclk_hickm", "st_clk_i2c9", "sw_ack_clk_i2c9_sw", "sw_ack_clk_i2c9_sw", "sw_ack_clk_i2c9_sw", "sw_ack_clk_i2c9_sw", "reserved_3", "reserved_3", "reserved_3";
			lp-clk-reg-domain = "SYSCTRL";
			offset = <0x1cc>;
			bit-num = <0x20>;
		};

		lp_clk6 {
			compatible = "lowpm_sr_mntn_clock";
			lp-clk-name = "reserved_0", "reserved_0", "reserved_0", "reserved_0", "reserved_0", "reserved_0", "sc_gt_clk_mad_spll", "reserved_1", "reserved_1", "reserved_1", "reserved_1", "reserved_1", "sel_clk_fll_test_src", "sel_clk_fll_test_src", "sel_clk_fll_test_src", "sel_clk_fll_test_src";
			lp-clk-reg-domain = "SYSCTRL";
			offset = <0x254>;
			bit-num = <0x10>;
		};

		lp_clk8 {
			compatible = "lowpm_sr_mntn_clock";
			lp-clk-name = "sc_gt_clk_asp_subsys", "gt_hifidsp_clk_div", "reserved_0", "reserved_1", "gt_asp_hclk_div", "reserved_2", "gt_clk_spmi_mst_vote", "gt_clk_spmi_mst_vote", "gt_clk_spmi_mst_vote", "gt_clk_spmi_mst_vote", "gt_clk_spmi_mst_vote", "gt_clk_spmi_mst_vote", "gt_clk_spmi_mst_vote", "gt_clk_spmi_mst_vote", "gt_clk_spmi_mst_vote", "gt_clk_spmi_mst_vote";
			lp-clk-reg-domain = "SYSCTRL";
			offset = <0x258>;
			bit-num = <0x10>;
		};

		lp_clk9 {
			compatible = "lowpm_sr_mntn_clock";
			lp-clk-name = "div_ao_camera", "div_ao_camera", "div_ao_camera", "div_ao_camera", "div_ao_camera", "div_ao_camera", "reserved", "sc_gt_clk_hheps_ree", "sc_div_asp_hclk", "sc_div_asp_hclk", "div_hheps_ree", "div_hheps_ree", "div_hheps_ree", "div_hheps_ree", "div_hheps_ree", "div_hheps_ree";
			lp-clk-reg-domain = "SYSCTRL";
			offset = <0x260>;
			bit-num = <0x10>;
		};

		lp_clk10 {
			compatible = "lowpm_sr_mntn_clock";
			lp-clk-name = "sc_gt_clk_memrepair", "reserved_0", "div_memrepair", "div_memrepair", "div_memrepair", "div_memrepair", "div_memrepair", "div_memrepair", "reserved_1", "sc_gt_clk_ao_loadmonitor", "div_ao_loadmonitor", "div_ao_loadmonitor", "div_ao_loadmonitor", "div_ao_loadmonitor", "reserved_2", "reserved_2";
			lp-clk-reg-domain = "SYSCTRL";
			offset = <0x26c>;
			bit-num = <0x10>;
		};

		lp_clk11 {
			compatible = "lowpm_sr_mntn_clock";
			lp-clk-name = "div_em_sync_top", "div_em_sync_top", "div_em_sync_top", "div_em_sync_top", "div_em_sync_top", "div_em_sync_top", "sc_gt_clk_em_sync_top", "sel_mad_mux", "sc_gt_clk_spmi_mst", "div_spmi_mst", "div_spmi_mst", "div_spmi_mst", "div_spmi_mst", "div_spmi_mst", "div_spmi_mst", "sel_spmi_mst";
			lp-clk-reg-domain = "SYSCTRL";
			offset = <0x270>;
			bit-num = <0x10>;
		};

		lp_clk12 {
			compatible = "lowpm_sr_mntn_clock";
			lp-clk-name = "div_ufs_subsys_pll", "div_ufs_subsys_pll", "div_ufs_subsys_pll", "div_ufs_subsys_pll", "div_ufs_subsys_pll", "div_ufs_subsys_pll", "div_sys_ufs_subsys", "div_sys_ufs_subsys", "sc_gt_clk_ufs_subsys_pll", "ufsbus_div_auto_reduce_bypass_acpu", "ufsbus_div_auto_reduce_bypass_mcpu", "reserved_0", "reserved_1", "gt_clk_dp_audio_pll_tp", "sc_gt_clk_asp_codec_pll", "sc_gt_clk_asp_subsys_fll";
			lp-clk-reg-domain = "SYSCTRL";
			offset = <0x274>;
			bit-num = <0x10>;
		};

		lp_clk13 {
			compatible = "lowpm_sr_mntn_clock";
			lp-clk-name = "sel_asp_subsys", "sel_asp_subsys", "sel_asp_subsys", "sel_asp_subsys", "div_asp_subsys_fll", "div_asp_subsys_fll", "reserved", "reserved", "reserved", "reserved", "reserved", "div_fll_src_tp", "div_fll_src_tp", "div_fll_src_tp", "div_fll_src_tp", "div_fll_src_tp";
			lp-clk-reg-domain = "SYSCTRL";
			offset = <0x280>;
			bit-num = <0x10>;
		};

		lp_clk14 {
			compatible = "lowpm_sr_mntn_clock";
			lp-clk-name = "div_asp_codec", "div_asp_codec", "div_asp_codec", "div_asp_codec", "div_asp_codec", "div_asp_codec", "sel_clk_out0", "sel_clk_out0", "sc_gt_clk_out0", "reserved_0", "div_clk_out0", "div_clk_out0", "div_clk_out0", "div_clk_out0", "reserved_1", "reserved_2";
			lp-clk-reg-domain = "SYSCTRL";
			offset = <0x284>;
			bit-num = <0x10>;
		};

		lp_clk15 {
			compatible = "lowpm_sr_mntn_clock";
			lp-clk-name = "gt_clk_noc_timeout_extref_peri_bypass", "gt_timerclk_refh_peri_bypass", "gt_clkin_sys_peri_bypass", "gt_clkin_ref_peri_bypass", "gt_clk_sys_ini_peri_bypass", "reserved_0", "gt_clk_ref_peri_bypass", "gt_clk_sys_peri_bypass", "gt_clk_aobus_peri_bypass", "gt_clk_fll_src_peri_bypass", "reserved_1", "reserved_2", "gt_clk_spll_peri_bypass", "gt_clkin_sys_logic_peri_bypass", "sel_clk_pcie_aux", "reserved_3";
			lp-clk-reg-domain = "SYSCTRL";
			offset = <0x288>;
			bit-num = <0x10>;
		};

		lp_clk16 {
			compatible = "lowpm_sr_mntn_clock";
			lp-clk-name = "div_memrepair_fll", "div_memrepair_fll", "div_memrepair_fll", "div_memrepair_fll", "sel_clk_ao_camera", "sel_clk_ao_camera", "sel_memrepair_peri", "sel_memrepair_peri", "reserved", "reserved", "reserved", "reserved", "sel_memrepair", "sel_memrepair", "sc_gt_clk_ao_camera", "sc_gt_clk_memrepair_fll_div";
			lp-clk-reg-domain = "SYSCTRL";
			offset = <0x290>;
			bit-num = <0x10>;
		};

		lp_clk17 {
			compatible = "lowpm_sr_mntn_clock";
			lp-clk-name = "div_dp_audio_pll_ao", "div_dp_audio_pll_ao", "div_dp_audio_pll_ao", "div_dp_audio_pll_ao", "gt_clk_aupll_sscg", "div_blpwm2", "div_blpwm2", "div_spi3", "div_spi3", "div_spi3", "div_spi3", "div_spi3", "div_spi3", "sc_gt_clk_spi3_ulppll", "sc_gt_clk_spi3", "sel_spi3";
			lp-clk-reg-domain = "SYSCTRL";
			offset = <0x2a8>;
			bit-num = <0x10>;
		};

		lp_clk18 {
			compatible = "lowpm_sr_mntn_clock";
			lp-clk-name = "sw_ack_clk_memrepair_sw", "sw_ack_clk_memrepair_sw", "sw_ack_clk_memrepair_sw", "sw_ack_clk_aobus_ini", "sw_ack_clk_aobus_ini", "swdone_clk_asp_codec_pll_div", "reserved_0", "swdone_clk_ufs_subsys_sys_div", "swdone_clk_ufs_subsys_pll_div", "sw_ack_clk_ufs_subsys_sw", "sw_ack_clk_ufs_subsys_sw", "sw_ack_clk_ufs_subsys_sw", "swdone_clk_spmi_mst", "reserved_1", "reserved_1", "swdone_clk_ao_camera_div", "reserved_2", "st_pclk_spmi", "sw_ack_clk_hsdt_subsys_sw", "sw_ack_clk_hsdt_subsys_sw", "sw_ack_clk_hsdt_subsys_sw", "swdone_clk_hsdt_subsys_div", "reserved_3", "reserved_4", "reserved_4", "sw_ack_clk_memrepair_peri_sw", "sw_ack_clk_memrepair_peri_sw", "sw_ack_clk_memrepair_peri_sw", "st_pclk_spmi1", "swdone_clk_spmi1_mst", "reserved_5", "reserved_5";
			lp-clk-reg-domain = "SYSCTRL";
			offset = <0x35c>;
			bit-num = <0x20>;
		};

		lp_clk19 {
			compatible = "lowpm_sr_mntn_clock";
			lp-clk-name = "gt_pclk_hickm", "gt_clk_sci0", "gt_clk_sci1", "gt_pclk_timer2", "reserved_0", "gt_pclk_timer3", "reserved_1", "gt_pclk_timer7", "reserved_2", "gt_clk_ref_crc", "gt_pclk_rtc1", "gt_pclk_ao_wd1", "gt_pclk_ao_wd", "gt_clk_asp_subsys_lpmcu", "gt_clk_asp_codec_lpm3", "gt_clk_mfcc", "gt_clk_mad_lpm3", "gt_clk_qcr_aspbus_lpmcu", "reserved_3", "reserved_4", "reserved_5", "gt_clk_hsdt_subsys", "gt_clk_hsdt_subsys", "gt_clk_hsdt_subsys", "gt_clk_hsdt_subsys", "gt_clk_hsdt_subsys", "gt_clk_hsdt_subsys", "gt_atclk_to_iomcu", "reserved_6", "reserved_7", "reserved_8", "reserved_9";
			lp-clk-reg-domain = "SYSCTRL";
			offset = <0x9c8>;
			bit-num = <0x20>;
		};

		lp_clk20 {
			compatible = "lowpm_sr_mntn_clock";
			lp-clk-name = "st_clk_qic_qcr_mdm_peri", "st_clk_qice_gm_gs", "st_aclk_ddrc", "st_clk_ddrcfg", "st_clk_drx2dbg_ipf", "st_aclk_dmss2dmc_mux", "st_clk_resource_lock", "st_clk_ipf", "st_clk_pasensor_peri", "reserved_0", "reserved_1", "st_clk_ddrcfg_dn", "st_clk_ddrcfg_up", "st_clk_qice_data", "st_clk_qice_cfg", "reserved_2", "reserved_3", "reserved_4", "st_hclk_qice_cfg", "st_aclk_dmss_free", "reserved_5", "st_clk_time_stamp", "reserved_6", "reserved_7", "reserved_8", "reserved_9", "st_clk_ao_asp", "st_clk_npu_tcxo", "st_clk_power_stat", "reserved_10", "st_pclk_power_stat", "reserved_11";
			lp-clk-reg-domain = "CRGPERI";
			offset = <0x0c>;
			bit-num = <0x20>;
		};

		lp_clk21 {
			compatible = "lowpm_sr_mntn_clock";
			lp-clk-name = "reserved_0", "reserved_1", "reserved_2", "reserved_3", "reserved_4", "reserved_5", "reserved_6", "reserved_7", "reserved_8", "reserved_9", "reserved_10", "reserved_11", "reserved_12", "reserved_13", "reserved_14", "reserved_15", "reserved_16", "reserved_17", "reserved_18", "reserved_19", "reserved_20", "reserved_21", "st_pclk_timer9", "st_pclk_timer10", "st_pclk_timer11", "st_pclk_timer12", "st_clk_socp", "st_clk_djtag", "reserved_22", "reserved_23", "st_clk_i2c6", "st_clk_i2c7";
			lp-clk-reg-domain = "CRGPERI";
			offset = <0x1c>;
			bit-num = <0x20>;
		};

		lp_clk22 {
			compatible = "lowpm_sr_mntn_clock";
			lp-clk-name = "st_pclk_blpwm1", "st_clk_i2c2", "st_pclk_ipc0", "st_pclk_ipc1", "reserved_0", "st_clk_loadmonitor", "st_pclk_loadmonitor", "st_clk_i2c3", "reserved_1", "st_clk_spi1", "st_pclk_uart0", "reserved_2", "reserved_3", "reserved_4", "st_pclk_uart4", "st_pclk_uart5", "st_pclk_wd0", "st_pclk_wd1", "st_pclk_tzpc", "st_clk_out1_pre", "st_pclk_ipc_mdm", "st_clk_sd_peri", "reserved_5", "reserved_6", "reserved_7", "st_pclk_ioc", "st_clk_codecssi", "st_clk_i2c4", "st_clk_loadmonitor_1", "st_pclk_loadmonitor_1", "reserved_8", "st_pclk_pctrl";
			lp-clk-reg-domain = "CRGPERI";
			offset = <0x2c>;
			bit-num = <0x20>;
		};

		lp_clk23 {
			compatible = "lowpm_sr_mntn_clock";
			lp-clk-name = "st_clk_dmac0", "st_clk_dmac1", "st_aclk_dmac", "reserved_0", "reserved_1", "reserved_2", "reserved_3", "reserved_4", "reserved_5", "reserved_6", "reserved_7", "st_clk_noc_mdm_cfg", "reserved_8", "st_clk_pll_unlock_detect", "reserved_9", "reserved_10", "reserved_11", "reserved_12", "reserved_13", "reserved_14", "reserved_15", "st_clk_eicc_sys", "st_clk_eicc", "reserved_16", "reserved_17", "reserved_18", "st_clk_isp_i2c_media", "reserved_19", "st_clk_txdphy0_cfg", "st_clk_txdphy0_ref", "reserved_20", "reserved_21";
			lp-clk-reg-domain = "CRGPERI";
			offset = <0x3c>;
			bit-num = <0x20>;
		};

		lp_clk24 {
			compatible = "lowpm_sr_mntn_clock";
			lp-clk-name = "st_clk_npu_monitor_sensor", "st_clk_hsdt1_usbdp", "st_clk_isp_snclk3", "reserved_0", "st_clk_spi4", "reserved_1", "st_clk_media_tcxo", "reserved_2", "st_clk_perf_stat", "st_pclk_perf_stat", "st_aclk_perf_stat", "st_clk_perf_ctrl", "reserved_3", "reserved_4", "reserved_5", "reserved_6", "reserved_7", "reserved_8", "reserved_9", "reserved_10", "reserved_11", "reserved_12", "reserved_13", "reserved_14", "reserved_15", "reserved_16", "reserved_17", "reserved_18", "reserved_19", "reserved_20", "reserved_21", "reserved_22";
			lp-clk-reg-domain = "CRGPERI";
			offset = <0x4c>;
			bit-num = <0x20>;
		};

		lp_clk25 {
			compatible = "lowpm_sr_mntn_clock";
			lp-clk-name = "st_clk_rxdphy_cfg", "st_clk_rxdphy0_cfg", "st_clk_rxdphy1_cfg", "st_clk_rxdphy2_cfg", "st_clk_rxdphy3_cfg", "st_clk_rxdphy4_cfg", "st_clk_rxdphy5_cfg", "reserved_0", "reserved_1", "reserved_2", "reserved_3", "st_clk_aohpm", "st_clk_perihpm", "reserved_4", "reserved_5", "reserved_6", "st_clk_isp_snclk0", "st_clk_isp_snclk1", "st_clk_isp_snclk2", "reserved_7", "reserved_8", "reserved_9", "reserved_10", "reserved_11", "st_pclk_atg_npu", "st_pclk_atgc", "st_pclk_atg_media", "reserved_12", "st_clk_system_cache_peri_cfg", "st_clk_system_cache_peri_cmo", "st_clk_vcodec_tcxo", "st_clk_latency_monitor";
			lp-clk-reg-domain = "CRGPERI";
			offset = <0x5c>;
			bit-num = <0x20>;
		};

		lp_clk26 {
			compatible = "lowpm_sr_mntn_clock";
			lp-clk-name = "reserved_0", "reserved_1", "reserved_2", "reserved_3", "st_clk_autogt_dmc_peri", "reserved_4", "reserved_5", "reserved_6", "reserved_7", "reserved_8", "reserved_9", "reserved_10", "reserved_11", "reserved_12", "st_clk_atgs_mon_ddrc", "st_clk_autogt_ddrc", "reserved_13", "reserved_14", "reserved_15", "reserved_16", "reserved_17", "st_clk_ppll7_sscg", "reserved_18", "reserved_19", "reserved_20", "reserved_21", "reserved_22", "reserved_23", "reserved_24", "reserved_25", "reserved_26", "reserved_27";
			lp-clk-reg-domain = "CRGPERI";
			offset = <0x41c>;
			bit-num = <0x20>;
		};

		lp_clk27 {
			compatible = "lowpm_sr_mntn_clock";
			lp-clk-name = "gt_aclk_ddrphy_dfi_r", "gt_aclk_ddrphy_dfi_l", "gt_clk_autogt_dmc_d", "gt_clk_autogt_dmc_c", "gt_clk_autogt_dmc_b", "gt_clk_autogt_dmc_a", "reserved_0", "reserved_1", "reserved_2", "reserved_3", "reserved_4", "reserved_5", "reserved_6", "reserved_7", "reserved_8", "reserved_9", "reserved_10", "reserved_11", "reserved_12", "gt_aclk_ddrphy_dfi_up", "reserved_13", "reserved_14", "reserved_15", "reserved_16", "reserved_17", "reserved_18", "reserved_19", "reserved_20", "reserved_21", "reserved_22", "reserved_23", "reserved_24";
			lp-clk-reg-domain = "CRGPERI";
			offset = <0x43c>;
			bit-num = <0x20>;
		};

		lp_clk28 {
			compatible = "lowpm_sr_mntn_clock";
			lp-clk-name = "reserved_0", "reserved_1", "reserved_2", "reserved_3", "reserved_4", "reserved_5", "reserved_6", "reserved_7", "reserved_8", "reserved_9", "reserved_10", "reserved_11", "reserved_12", "reserved_13", "reserved_14", "ppll2_b_gt_stat", "ppll1_gt_stat", "ppll2_gt_stat", "ppll3_gt_stat", "ppll1_en_stat", "ppll2_en_stat", "ppll3_en_stat", "ppll2_b_en_stat", "reserved_15", "reserved_16", "reserved_17", "reserved_18", "reserved_19", "reserved_20", "reserved_21", "reserved_22", "reserved_23";
			lp-clk-reg-domain = "CRGPERI";
			offset = <0x46c>;
			bit-num = <0x20>;
		};

		lp_clk29 {
			compatible = "lowpm_sr_mntn_clock";
			lp-clk-name = "st_clk_i3c4", "reserved_0", "reserved_1", "st_pclk_atgs_sys", "st_clk_mdm_spi2apb", "st_clk_mdm_drx2dbg", "reserved_2", "reserved_3", "st_clk_intr_hub", "st_clk_cpu_pctrl", "st_clk_npu_pctrl", "st_clk_media2_pctrl", "st_clk_media1_pctrl", "st_clk_hsdt0_pcmp_xctrl", "st_clk_hsdt1_pcmp_xctrl", "st_clk_spe_ref", "st_hclk_spe", "st_clk_spe", "reserved_4", "st_clk_maa_ref", "st_aclk_maa", "st_clk_dpctrl_16m", "st_clk_dpctrl_pixel", "st_clk_hidif_pixel_pre", "reserved_5", "reserved_5", "reserved_5", "reserved_5", "reserved_5", "reserved_5", "reserved_5", "reserved_5";
			lp-clk-reg-domain = "CRGPERI";
			offset = <0x47c>;
			bit-num = <0x20>;
		};

		lp_clk30 {
			compatible = "lowpm_sr_mntn_clock";
			lp-clk-name = "sc_gt_clk_hhsee_flash", "sc_gt_clk_sysbus_pll", "sc_gt_clk_pll_fsm", "sc_gt_clk_sysbus_sys", "reserved", "sc_gt_clk_cpul_ppll0_div", "sc_gt_clk_l3_ppll0_div", "sc_gt_clk_cpu_ref", "sc_gt_clk_hsdt1bus", "sc_gt_clk_core_crg_apb", "sc_gt_clk_gpu_lp_ctrl", "sc_gt_clk_cpu_lp_ctrl", "sc_gt_clk_periph_cpu", "sc_gt_clk_cpu_gic", "sc_gt_clk_dmabus", "sc_gt_clk_ddrsys_ao";
			lp-clk-reg-domain = "CRGPERI";
			offset = <0xb00>;
			bit-num = <0x10>;
		};

		lp_clk31 {
			compatible = "lowpm_sr_mntn_clock";
			lp-clk-name = "sc_gt_clk_dmc_peri", "sc_gt_clk_sysbus_fll", "sc_gt_clk_dcdrbus_lpmcu", "sc_gt_clk_cssysdbg_div", "sc_gt_clk_tscpu_peri", "sc_gt_clk_dcdrbus_ddrxpu", "reserved_0", "reserved_1", "reserved_2", "reserved_3", "reserved_4", "reserved_5", "sc_gt_clk_lpmcu_fll", "sc_gt_clk_lpmcu_invar_fll", "sc_gt_clk_lpmcu_pll", "sc_gt_clk_ddrsys_noc";
			lp-clk-reg-domain = "CRGPERI";
			offset = <0xb04>;
			bit-num = <0x10>;
		};

		lp_clk32 {
			compatible = "lowpm_sr_mntn_clock";
			lp-clk-name = "div_hhsee_flash", "div_hhsee_flash", "div_hhsee_flash", "div_hhsee_flash", "div_hhsee_flash", "div_hhsee_flash", "sel_clk_hhsee_flash", "div_sysbus_pll", "div_sysbus_pll", "div_sysbus_pll", "div_sysbus_pll", "div_sysbus_pll", "sysbus_clk_sw_req_cfg", "sysbus_clk_sw_req_cfg", "reserved", "reserved";
			lp-clk-reg-domain = "CRGPERI";
			offset = <0xb08>;
			bit-num = <0x10>;
		};

		lp_clk33 {
			compatible = "lowpm_sr_mntn_clock";
			lp-clk-name = "div_clk_qic_npubus", "div_clk_qic_npubus", "div_clk_qic_npubus", "div_clk_qic_npubus", "reserved", "reserved", "reserved", "reserved", "div_clk_pll_fsm", "div_clk_pll_fsm", "div_clk_pll_fsm", "div_clk_pll_fsm", "div_clk_pll_fsm", "div_clk_pll_fsm", "sel_ai_core_sw", "sel_cpu_ref";
			lp-clk-reg-domain = "CRGPERI";
			offset = <0xb0c>;
			bit-num = <0x10>;
		};

		lp_clk34 {
			compatible = "lowpm_sr_mntn_clock";
			lp-clk-name = "div_periph_cpu", "div_periph_cpu", "div_periph_cpu", "div_periph_cpu", "div_periph_cpu", "div_periph_cpu", "div_cpu_gic", "div_cpu_gic", "div_cpu_gic", "div_cpu_gic", "div_cpu_gic", "div_cpu_gic", "div_hsdt1bus", "div_dmabus", "div_clk_sys_sysbus", "div_clk_sys_sysbus";
			lp-clk-reg-domain = "CRGPERI";
			offset = <0xb10>;
			bit-num = <0x10>;
		};

		lp_clk35 {
			compatible = "lowpm_sr_mntn_clock";
			lp-clk-name = "div_gpu_lp_ctrl", "div_gpu_lp_ctrl", "div_cpu_lp_ctrl", "div_cpu_lp_ctrl", "sel_usb_dock", "lpmcu_clk_sw_req_cfg", "lpmcu_clk_sw_req_cfg", "div_core_crg_apb", "div_core_crg_apb", "div_core_crg_apb", "div_core_crg_apb", "div_cssysdbg", "lpmcu_invar_clk_sw_req_cfg", "lpmcu_invar_clk_sw_req_cfg", "div_clk_ddrsys", "div_clk_ddrsys";
			lp-clk-reg-domain = "CRGPERI";
			offset = <0xb14>;
			bit-num = <0x10>;
		};

		lp_clk36 {
			compatible = "lowpm_sr_mntn_clock";
			lp-clk-name = "div_sysbus_fll", "div_sysbus_fll", "div_sysbus_fll", "div_sysbus_fll", "div_cpu_ref", "div_cpu_ref", "div_cpu_ref", "div_cpu_ref", "div_tscpu_peri", "div_tscpu_peri", "div_tscpu_peri", "div_tscpu_peri", "sel_tscpu_peri", "sel_tscpu_peri", "sel_tscpu_peri", "sel_tscpu_peri";
			lp-clk-reg-domain = "CRGPERI";
			offset = <0xb18>;
			bit-num = <0x10>;
		};

		lp_clk37 {
			compatible = "lowpm_sr_mntn_clock";
			lp-clk-name = "div_dmc_peri", "div_dmc_peri", "div_dmc_peri", "div_dmc_peri", "div_dmc_peri", "div_dmc_peri", "div_lpmcu", "div_lpmcu", "div_lpmcu", "div_lpmcu", "div_lpmcu", "reserved", "div_lpmcu_invar_fll", "div_lpmcu_invar_fll", "div_lpmcu_invar_fll", "div_lpmcu_invar_fll";
			lp-clk-reg-domain = "CRGPERI";
			offset = <0xb24>;
			bit-num = <0x10>;
		};

		lp_clk38 {
			compatible = "lowpm_sr_mntn_clock";
			lp-clk-name = "div_lpmcu_fll", "div_lpmcu_fll", "div_lpmcu_fll", "div_lpmcu_fll", "sel_pll_dmc_sw_a", "sel_pll_dmc_sw_b", "sel_pll_dmc_sw_c", "sel_pll_dmc_sw_d", "div_clk_dcdrbus", "div_clk_dcdrbus", "div_clk_qic_npubus_cfg", "div_clk_qic_npubus_cfg", "div_clk_qic_npubus_cfg", "div_clk_qic_npubus_cfg", "div_clk_qic_npubus_cfg", "div_clk_qic_npubus_cfg";
			lp-clk-reg-domain = "CRGPERI";
			offset = <0xb28>;
			bit-num = <0x10>;
		};

		lp_clk39 {
			compatible = "lowpm_sr_mntn_clock";
			lp-clk-name = "pll1_fsm_en", "pll2_fsm_en", "pll2_b_fsm_en", "pll3_fsm_en", "pll7_fsm_en", "pll1_vote_mode_sel", "pll2_vote_mode_sel", "pll2_b_vote_mode_sel", "pll3_vote_mode_sel", "pll7_vote_mode_sel", "pll1_intr_clr", "pll2_intr_clr", "pll2_b_intr_clr", "pll3_intr_clr", "pll7_intr_clr", "reserved";
			lp-clk-reg-domain = "CRGPERI";
			offset = <0xc40>;
			bit-num = <0x10>;
		};

		lp_clk40 {
			compatible = "lowpm_sr_mntn_clock";
			lp-clk-name = "reserved_0", "reserved_0", "sel_uart0", "sel_uartl", "sel_uarth", "reserved_1", "sel_spi4", "sel_codeccssi_sys_src", "sel_spi", "reserved_2", "reserved_2", "reserved_3", "reserved_3", "sel_i2c", "reserved_4", "reserved_4";
			lp-clk-reg-domain = "CRGPERI";
			offset = <0xac>;
			bit-num = <0x10>;
		};
	};

	lowpm_func_gic@FF000000 {
		compatible = "arm,lp_gic";
		#address-cells = <0x02>;
		#size-cells = <0x02>;
		reg = <0x00 0xff000000 0x00 0x300>;
		enable-offset = <0x100>;
		pending-offset = <0x200>;
	};

	lowpm_func_ipc@FF870000 {
		compatible = "lowpm,ipc";
		#address-cells = <0x02>;
		#size-cells = <0x02>;
		reg = <0x00 0xff870000 0x00 0x10000>;
	};

	lowpm_func_ao_ipc@FB219000 {
		compatible = "lowpm,ao_ipc";
		#address-cells = <0x02>;
		#size-cells = <0x02>;
		reg = <0x00 0xfb219000 0x00 0x1000>;
	};

	l3_opp_table {
		compatible = "operating-points-v2";
		opp-shared;
		phandle = <0x181>;

		opp0 {
			opp-supported-hw = <0xff>;
			opp-hz = <0x00 0x13f7b1c0>;
			opp-microvolt = <0x86470>;
			load-map = <0x28>;
		};

		opp1 {
			opp-supported-hw = <0xff>;
			opp-hz = <0x00 0x18ea2c80>;
			opp-microvolt = <0x86470>;
			load-map = <0x3c>;
		};

		opp2 {
			opp-supported-hw = <0xff>;
			opp-hz = <0x00 0x1ad27480>;
			opp-microvolt = <0x86470>;
			load-map = <0x50>;
		};

		opp3 {
			opp-supported-hw = <0xff>;
			opp-hz = <0x00 0x20113a80>;
			opp-microvolt = <0x927c0>;
			load-map = <0x64>;
		};

		opp4 {
			opp-supported-hw = <0xff>;
			opp-hz = <0x00 0x23c34600>;
			opp-microvolt = <0x927c0>;
			load-map = <0x78>;
		};

		opp5 {
			opp-supported-hw = <0xff>;
			opp-hz = <0x00 0x293f1500>;
			opp-microvolt = <0xaae60>;
			load-map = <0x96>;
		};

		opp6 {
			opp-supported-hw = <0xff>;
			opp-hz = <0x00 0x2ca4d540>;
			opp-microvolt = <0xaae60>;
			load-map = <0xb4>;
		};

		opp7 {
			opp-supported-hw = <0xff>;
			opp-hz = <0x00 0x337f9800>;
			opp-microvolt = <0xaae60>;
			load-map = <0xd2>;
		};

		opp8 {
			opp-supported-hw = <0xff>;
			opp-hz = <0x00 0x39757900>;
			opp-microvolt = <0xaae60>;
			load-map = <0xfa>;
		};

		opp9 {
			opp-supported-hw = <0x7f>;
			opp-hz = <0x00 0x3f89de80>;
			opp-microvolt = "", "\f5";
			load-map = <0x320>;
		};

		opp10 {
			opp-supported-hw = <0x7f>;
			opp-hz = <0x00 0x44aa2000>;
			opp-microvolt = "", "\f5";
			load-map = <0x320>;
		};

		opp11 {
			opp-supported-hw = <0x7f>;
			opp-hz = <0x00 0x4a817c80>;
			opp-microvolt = "", "\f5";
			load-map = <0x320>;
		};

		opp12 {
			opp-supported-hw = <0x7f>;
			opp-hz = <0x00 0x4e709100>;
			opp-microvolt = <0xcf850>;
			load-map = <0x320>;
		};

		opp13 {
			opp-supported-hw = <0x7f>;
			opp-hz = <0x00 0x52412100>;
			opp-microvolt = <0xcf850>;
			load-map = <0x320>;
		};
	};

	l3c_devfreq {
		compatible = "hisilicon,l3c_devfreq";
		hv-supported = <0x01>;
		polling = <0x14>;
		init-freq = <0xf8890>;
		operating-points-v2 = <0x181>;
		phandle = <0x195>;
	};

	l3extension {
		compatible = "hisilicon,l3extension";
		work-ms = <0x14>;
		up-interval = <0x02>;
		down-interval = <0x03>;
		base-reg = <0xff210000>;
		offset-reg = <0x50 0x58>;
		status = "ok";
		phandle = <0x6dd>;

		level {

			level-0 {
				miss-bw = <0x00 0x64>;
				l3-hit-rate = <0x14 0x64>;
				lb-hit-rate = <0x1e 0x64>;
			};
		};
	};

	flush_cmo {
		compatible = "hisilicon,flush_cmo";
		#address-cells = <0x02>;
		#size-cells = <0x02>;
		reg = <0x00 0xff210000 0x00 0x1000>;
		offset-reg = <0xa00 0x130>;
		done-bit = <0x05>;
		status = "ok";
		phandle = <0x6de>;
	};

	l3part_ctrl {
		compatible = "hisilicon,l3part_ctrl";
		#address-cells = <0x02>;
		#size-cells = <0x02>;
		reg = <0x00 0xff210048 0x00 0x08>;
		access-method = <0x01>;
		part-num = <0x04>;
		phandle = <0x6df>;
	};

	nonshareable {
		compatible = "hisi,nonshareable";
		interrupts = <0x00 0x139 0x04>;
		interrupt-names = "nonshare-irq";
		status = "ok";
		phandle = <0x6e0>;
	};

	hvgr@E9FC0000 {
		gpc-present-mask = <0x0e>;
		compatible = "hisi,hvgr", "hisi,hvgr-tv200";
		reg = <0x00 0xe9fc0000 0x00 0x40000>;
		interrupts = <0x00 0x226 0x04 0x00 0x227 0x04 0x00 0x228 0x04 0x00 0x229 0x04 0x00 0x273 0x04 0x00 0x274 0x04>;
		interrupt-names = "FCP", "GPU", "JOB", "MMU", "CQ", "CC";
		gpu-supply = <0x182>;
		system-coherency = <0x1f>;
		crg-reset = <0xffb85000 0x1000 0xd18 0x7800000 0xd1c 0x7800000>;
		status = "ok";
		ctrl_reg = <0xe9f61000 0x1000>;
		sc-gids = <0x02 0x03 0x06>;
		prot_enhance = <0x01>;
		pgd_memory_gid = <0x00>;
		streamid-gid-map = <0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00>;
		sc-partial-stream-cfg = <0x00>;
		sc-buffer-mem-size = <0x180000>;
		protect_space = <0x10f40000 0x400000>;
		phandle = <0x6e1>;
	};

	gpufreq {
		compatible = "gpu,gpufreq";
		#cooling-cells = <0x03>;
		clocks = <0x183>;
		operating-points-v2 = <0x184>;
		phandle = <0xf0>;
	};

	ddrlink_governor {
		compatible = "gpufreq,ddrlink_governor";
		ddr-type = <0x00>;
		prop-name = "ddr4-freq-link-mhz", "ddr5-freq-link-mhz";
		profile = <0x184>;
	};

	gpu_opp_table {
		compatible = "operating-points-v2";
		phandle = <0x184>;

		opp0 {
			opp-hz = <0x00 0x10a133c0>;
			opp-microvolt = <0x86470>;
			ddr4-freq-link-mhz = <0x00 0x00 0x00>;
			ddr5-freq-link-mhz = <0x00 0x00 0x00>;
		};

		opp1 {
			opp-hz = <0x00 0x125bb500>;
			opp-microvolt = <0x86470>;
			ddr4-freq-link-mhz = <0x00 0x00 0x00>;
			ddr5-freq-link-mhz = <0x00 0x00 0x00>;
		};

		opp2 {
			opp-hz = <0x00 0x161d02c0>;
			opp-microvolt = <0x927c0>;
			ddr4-freq-link-mhz = <0x00 0x00 0x00>;
			ddr5-freq-link-mhz = <0x00 0x00 0x00>;
		};

		opp3 {
			opp-hz = <0x00 0x19a14780>;
			opp-microvolt = <0x927c0>;
			ddr4-freq-link-mhz = <0x00 0x00 0x00>;
			ddr5-freq-link-mhz = <0x00 0x00 0x00>;
		};

		opp4 {
			opp-hz = <0x00 0x1c40aa80>;
			opp-microvolt = <0xaae60>;
			ddr4-freq-link-mhz = <0x00 0x00 0x00>;
			ddr5-freq-link-mhz = <0x00 0x00 0x00>;
		};

		opp5 {
			opp-hz = <0x00 0x1f972880>;
			opp-microvolt = <0xaae60>;
			ddr4-freq-link-mhz = <0x00 0x00 0x00>;
			ddr5-freq-link-mhz = <0x00 0x00 0x00>;
		};

		opp6 {
			opp-hz = <0x00 0x21f98280>;
			opp-microvolt = <0xaae60>;
			ddr4-freq-link-mhz = <0x00 0x00 0x00>;
			ddr5-freq-link-mhz = <0x00 0x00 0x00>;
		};

		opp7 {
			opp-hz = <0x00 0x23d28840>;
			opp-microvolt = <0xaae60>;
			ddr4-freq-link-mhz = <0x00 0x00 0x00>;
			ddr5-freq-link-mhz = <0x00 0x00 0x00>;
		};

		opp8 {
			opp-hz = <0x00 0x26442480>;
			opp-microvolt = "", "\f5";
			ddr4-freq-link-mhz = <0x00 0x00 0x00>;
			ddr5-freq-link-mhz = <0x00 0x00 0x00>;
		};

		opp9 {
			opp-hz = <0x00 0x28697580>;
			opp-microvolt = "", "\f5";
			ddr4-freq-link-mhz = <0x00 0x00 0x00>;
			ddr5-freq-link-mhz = <0x00 0x00 0x00>;
		};

		opp10 {
			opp-hz = <0x00 0x29e6edc0>;
			opp-microvolt = "", "\f5";
			ddr4-freq-link-mhz = <0x00 0xaba 0x00>;
			ddr5-freq-link-mhz = <0x00 0xaba 0x00>;
		};

		opp11 {
			opp-hz = <0x00 0x2b369f40>;
			opp-microvolt = "", "\f5";
			ddr4-freq-link-mhz = <0x00 0xaba 0x00>;
			ddr5-freq-link-mhz = <0x00 0xaba 0x00>;
		};

		opp12 {
			opp-hz = <0x00 0x2cb41780>;
			opp-microvolt = <0xcf850>;
			ddr4-freq-link-mhz = <0x00 0xc7d 0x00>;
			ddr5-freq-link-mhz = <0x00 0xc7d 0x00>;
		};
	};

	gpu_governor {
		compatible = "gpu-scene-aware";
		cl-boost-freq = <0x19a14780>;
		scene-para = "0:90:430000000:100:5:2,85:430000000:85:601000000:90:725000000:95", "1:85:703000000:100:5:1,80:430000000:85:703000000:80", "2:85:396000000:100:5:2,80:396000000:90:538000000:80", "3:70:703000000:100:5:1,70:703000000:80";
	};

	npu_pm {
		#address-cells = <0x02>;
		#size-cells = <0x02>;
		compatible = "lpm,npu-pm";
		initial_freq = <0x631f0>;
		thermal_zone_name = "npu";
		thermal_zone = <0x05 0x14 0x28 0x3c>;
	};

	vdec@e8dc0000 {
		compatible = "hisilicon,VCodecV700-vdec";
		reg = <0x00 0xe8dc0000 0x00 0x1000 0x00 0xe8dd3000 0x00 0x400 0x00 0xe8dd3400 0x00 0x200 0x00 0xe8ddc000 0x00 0x1000 0x00 0xe8d64000 0x00 0x2000 0x00 0xe8dd8000 0x00 0x4000>;
		interrupts = <0x00 0xaf 0x04 0x00 0xb0 0x04>;
		clocks = <0x185>;
		clock-names = "clk_vdec";
		iommus = <0x111 0x04 0x00>;
		tlb_flush = <0x01>;
		clk_rate = <0xc738fa0 0x13f7b1c0 0x1c9c3800 0x264e50aa>;
		transi_clk_rate = <0xcc4c58f>;
		default_clk_rate = <0x6422c40>;
		ldo_vdec-supply = <0x186>;
		ldo_media-supply = <0x187>;
		ldo_smmu_tcu-supply = <0x114>;
		mmu_tbu_num = <0x01>;
		mmu_tbu_offset = <0x2000>;
		mmu_sid_offset = <0x400>;
		vdec_fpga = <0x00>;
		vdec_es = <0x00>;
		pctrl_peri_state = <0xfec3e0bc>;
		pctrl_peri_vdec_mask = <0x38>;
		pctrl_peri_vdec_value = <0x20>;
		pcie_mmap_host_start_reg = <0xe8000000>;
		status = "ok";
		phandle = <0x6e2>;

		iova_info {
			start-addr = <0x00 0x200000>;
			size = <0x00 0xe0000000>;
			iova-align = <0x00 0x200000>;
		};
	};

	venc@e9280000 {
		compatible = "hisilicon,VCodecV700-venc";
		reg = <0x00 0xe9280000 0x00 0x40000>;
		interrupts = <0x00 0xc5 0x04 0x00 0xc6 0x04 0x00 0xc6 0x04 0x00 0xcc 0x04>;
		interrupts_per_core = <0x04>;
		clocks = <0x11c 0x188>;
		clock-names = "clk_venc", "aclk_venc";
		iommus = <0xf6 0x09 0x01>;
		tlb_flush = <0x01>;
		enc_clk_rate = <0x2aea5400 0x21340000 0x18e70000 0x13ec0000>;
		power_off_clk_rate = <0x6422c40>;
		transit_clk_rate = <0x1c9c3800>;
		aclk_rate = <0x264e50aa 0x264e50aa 0x18e70000 0x13ec0000>;
		power_mode_loads = <0x816afd8 0xfd0f481 0x11712b01 0x27890c24>;
		low_power_mode_profile_len = <0x02>;
		low_power_mode_loads = <0xfd0f481 0x201dd855>;
		low_power_mode_level = <0x00 0x02>;
		power_off_aclk_rate = <0x6422c40>;
		transit_aclk_rate = <0xcd0a3c0>;
		ldo_venc-supply = <0x189>;
		ldo_media-supply = <0x18a>;
		ldo_smmu_tcu-supply = <0xfa>;
		venc_qos_mode = <0x02>;
		core_num = <0x01>;
		disable_cfg_tbu_max_tok_trans = <0x01>;
		support_power_control_per_frame = <0x00>;
		mcore_code_base = <0xe92b0200>;
		mcore_img_mem = <0x18a00000>;
		intr_hub_reg_base = <0xff7c7000>;
		status = "ok";

		iova_info {
			start-addr = <0x00 0x200000>;
			size = <0x00 0xe0000000>;
			iova-align = <0x00 0x200000>;
		};
	};

	codecssi@FF480000 {
		pinctrl-1 = <0x38e 0x2eb>;
		pinctrl-0 = <0x38d 0x2ea>;
		pinctrl-names = "default", "idle";
		compatible = "hisilicon,codecssi";
		reg = <0x00 0xff480000 0x00 0x800>;
		status = "disabled";
		phandle = <0x6e3>;
	};

	battery {
		battery_design_fcc = <0xdac>;
		compatible = "hisilicon,bci_battery";
		battery_is_removable = <0x00>;
		battery_board_type = <0x01>;
		temp_throttling = <0x00>;
		temp_shutdown = <0x44>;
		temp_below_vr_min = <0x00>;
		bci_work_dc_interval = <0xbb8>;
		bci_work_interval_para = "0", "10", "10000", "10", "90", "10000", "90", "100", "30000";
		bci_soc_at_term = <0x64>;
		vth_correct_en = <0x01>;
		vth_correct_para = <0x06 0xe42 0x0a 0xe6a>;
		sc_uisoc_update_speed = <0x2710>;
		cap_one_vth = <0xce4>;
		recla_cap_one_en = <0x00>;
		battery_ov_th = <0x125c>;
		charge_current_overhigh_th = <0x3a98>;
		startup_delta_cap = <0x0a>;
		last_cap_enable = <0x01>;
		status = "disabled";
		phandle = <0x6e4>;
	};

	hisi_batt_info {
		compatible = "hisilicon,batt_info";
		status = "disabled";
		phandle = <0x6e5>;
	};

	touchscreen {
		#address-cells = <0x01>;
		#size-cells = <0x00>;
		compatible = "huawei,touchscreen";
		status = "disabled";
		bus_type = "i2c";
		bus_id = <0x00>;
		product = "kirin990_fpga";
		has_virtualkey = <0x00>;
		roi_supported = <0x00>;
		roi_control_addr_offset = <0x446>;
		roi_data_addr_offset = <0x418>;
		fpga_flag = <0x01>;
		lcd_full = <0x55f>;
		virtual_keys = <0x9e 0x8e 0x53e 0x96 0x64 0xac 0x168 0x53e 0x96 0x64 0x8b 0x242 0x53e 0x96 0x64>;
		support_chip_name = "synaptics";
		phandle = <0x6e6>;

		touchscreen@70 {
			compatible = "synaptics";
			reg = <0x70>;
			ic_type = <0x00>;
			need_wd_check_status = <0x00>;
			x_max = <0x2d0>;
			y_max = <0x500>;
			x_max_mt = <0x2d0>;
			y_max_mt = <0x500>;
			flip_x = <0x00>;
			flip_y = <0x00>;
			unite_cap_test_interface = <0x00>;
			report_rate_test = <0x00>;
			vci_gpio_type = <0x01>;
			vci_regulator_type = <0x00>;
			vddio_gpio_type = <0x01>;
			vddio_regulator_type = <0x00>;
			vci_gpio_en_val = <0x01>;
			vddio_gpio_en_val = <0x00>;
			slave_address = <0x70>;
			pinctrl-names = "default", "idle";
			pinctrl-0;
			pinctrl-1;
			synaptics-vdd-supply;
			synaptics-io-supply;
			irq_config = <0x03>;
			algo_id = <0x02>;
			raw_data_limit = "4200", "1000", "15", "-15", "490", "-490", "490", "-490";
			phandle = <0x6e7>;
		};
	};

	jpu@E8C01000 {
		compatible = "hisilicon,devjpu";
		fpga_flag = <0x00>;
		reg = <0x00 0xe8c01000 0x00 0x1000 0x00 0xe8c04000 0x00 0x1000 0x00 0xe8c06000 0x00 0x2000 0x00 0xe8c60000 0x00 0x3000 0x00 0xe9400000 0x00 0x1000 0x00 0xfff05000 0x00 0x1000 0x00 0xfff01000 0x00 0x1000 0x00 0xfa89b000 0x00 0x1000 0x00 0xe8c63000 0x00 0x1000>;
		interrupts = <0x00 0xa7 0x04>;
		interrupt-names = "JPU_MERGED";
		sid-ssid = <0x08 0x06>;
		jpgd-swid = <0x06 0x07 0x08 0x09 0x0a>;
		platform-names = "dss_v700";
		status = "ok";
		iommus = <0x111 0x08 0x06>;
		phandle = <0x6e8>;

		iova_info {
			start-addr = <0x00 0x800000>;
			size = <0x00 0xbf800000>;
			iova-align = <0x00 0x8000>;
		};
	};

	dfx_sec_qic@10EC {
		#address-cells = <0x01>;
		#size-cells = <0x01>;
		ranges = <0x00 0x00 0x00 0xffffffff>;
		compatible = "dfx,sec_qic";
		interrupts = <0x00 0x19a 0x04>;
		stop_cpu_bus = <0x08>;
		stop_cpu_bus_num = <0x01>;

		qic_bus_info {
			compatible = "dfx,sec_qic_bus_info";
			bus_num = <0x15>;
			bus_name = "qic_peri", "media1_bus", "media1_dss_bus", "media1_ipp_bus", "media1_vdec_bus", "media2_bus", "media2_isp_bus", "media2_ivp_bus", "media2_venc_bus", "npu_bus", "hsdt0_bus", "hsdt1_bus", "gpu_bus", "fcm_bus", "cfg_bus", "sys_bus", "modem_peri", "ao_bus", "ao_asp_bus", "ao_iomcu_bus", "ao_mspc_bus";
			bus_key = <0x00 0x01 0x10001 0x20001 0x30001 0x02 0x10002 0x20002 0x30002 0x03 0x05 0x06 0x07 0x08 0x09 0x0a 0x0b 0x0c 0x1000c 0x2000c 0x3000c>;
			mid_offset = <0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x05 0x05 0x01 0x01 0x01 0x01 0x01 0x01 0x01>;
		};

		qic_mid_info {
			compatible = "dfx,sec_qic_mid_info";
			target_num = <0x89>;
			target_list = <0x00 0x4c504d43 0x55000000 0x1494f 0x4d43555f 0x4d370000 0x250 0x4349655f 0x31000000 0x35045 0x52465f53 0x54415400 0x04 0x49504600 0x05 0x444a5441 0x475f4d2f 0x544f505f 0x43535359 0x53000000 0x6414f 0x5f544350 0x00 0x7554653 0x00 0x8534400 0x09 0x48534454 0x305f315f 0x54524143 0x45000000 0xa5350 0x49335f44 0x4d410000 0xb41 0x54475300 0x0c 0x44504300 0x0d 0x534f4350 0x00 0xe555342 0x33314f54 0x47000000 0xf4153 0x503a444d 0x412f5553 0x422f4844 0x4d490000 0x1044 0x4d414300 0x11 0x4153503a 0x48494649 0x00 0x12504349 0x655f3000 0x13 0x48534454 0x305f5443 0x552f4853 0x4454315f 0x54435500 0x14 0x53504500 0x15 0x4d414100 0x16 0x504f5745 0x525f5354 0x41540000 0x1748 0x49534543 0x3a484153 0x485f4d41 0x53544552 0x00 0x18444452 0x5f4c5043 0x54524c00 0x19 0x45494343 0x00 0x1a494f4d 0x43555f44 0x4d410000 0x1b53 0x44494f00 0x1d 0x48495045 0x533a4849 0x4550535f 0x53434531 0x00 0x1e484950 0x45533a48 0x49455053 0x5f534345 0x32000000 0x1f4849 0x5045533a 0x48494550 0x535f5345 0x435f5245 0x45000000 0x204e50 0x553a4857 0x54535f54 0x494e5900 0x21 0x4e50553a 0x48575453 0x5f4c4954 0x45000000 0x224e50 0x553a5449 0x4e595f43 0x4f524530 0x00 0x234e5055 0x3a4c4954 0x455f434f 0x52453000 0x24 0x4e50553a 0x54494e59 0x5f434f52 0x45310000 0x254e 0x50553a4c 0x4954455f 0x434f5245 0x31000000 0x264e50 0x55000000 0x274e50 0x553a5344 0x4d415f4c 0x4954455f 0x534d4d55 0x00 0x284e5055 0x3a545320 0x43505500 0x29 0x4e50555f 0x5443553a 0x54435500 0x2a 0x47505530 0x3a457863 0x6570745f 0x44524d00 0x2b 0x47505530 0x3a44524d 0x00 0x2c475055 0x5f4c5043 0x54524c3a 0x4750555f 0x4c504354 0x524c0000 0x2e46 0x434d5f50 0x505f5149 0x43453a50 0x65726950 0x6f727400 0x2f 0x4350555f 0x4c504354 0x524c3a43 0x50555f4c 0x50435452 0x4c000000 0x304643 0x4d3a4c69 0x74746c65 0x436f7265 0x30000000 0x314643 0x4d3a4c69 0x74746c65 0x436f7265 0x31000000 0x324643 0x4d3a4c69 0x74746c65 0x436f7265 0x32000000 0x334643 0x4d3a4c69 0x74746c65 0x436f7265 0x33000000 0x344643 0x4d3a4d69 0x64646c65 0x436f7265 0x305f5430 0x00 0x3546434d 0x3a4d6964 0x646c6543 0x6f726530 0x5f543100 0x36 0x46434d3a 0x4d696464 0x6c65436f 0x7265315f 0x54300000 0x3746 0x434d3a4d 0x6964646c 0x65436f72 0x65315f54 0x31000000 0x384643 0x4d3a4d69 0x64646c65 0x436f7265 0x325f5430 0x00 0x3946434d 0x3a4d6964 0x646c6543 0x6f726532 0x5f543100 0x3a 0x46434d3a 0x4c617267 0x65436f72 0x65305f54 0x30000000 0x3b4643 0x4d3a4c61 0x72676543 0x6f726530 0x5f543100 0x3c 0x46434d3a 0x4c617267 0x65436f72 0x65305f50 0x46000000 0x3d4643 0x4d3a4143 0x50285631 0x32302064 0x656c2900 0x3e 0x46434d3a 0x4f746865 0x72730000 0x4049 0x50505f53 0x55425359 0x533a4a50 0x47454e43 0x00 0x41495050 0x5f535542 0x5359533a 0x4a504744 0x45430000 0x4249 0x50505f53 0x55425359 0x533a4644 0x00 0x43495050 0x5f535542 0x5359533a 0x43504500 0x44 0x4950505f 0x53554253 0x59533a53 0x4c414d00 0x47 0x56444543 0x5f303a73 0x65637572 0x65000000 0x485644 0x45435f31 0x3a6e5f73 0x65637572 0x65000000 0x504453 0x533a5748 0x32000000 0x514453 0x533a5748 0x31000000 0x524453 0x533a5748 0x30000000 0x534453 0x533a5344 0x4d413300 0x54 0x4453533a 0x53444d41 0x32000000 0x554453 0x533a5344 0x4d413100 0x56 0x4453533a 0x53444d41 0x30000000 0x574453 0x533a434d 0x444c4953 0x54000000 0x584453 0x53000000 0x594453 0x53000000 0x5c4d45 0x44494131 0x5f544355 0x00 0x5f435055 0x5f52544d 0x00 0x6056454e 0x433a7665 0x64755f63 0x6f726500 0x61 0x56454e43 0x3a4d4355 0x00 0x654d4544 0x4941325f 0x54435500 0x66 0x4953503a 0x4953505f 0x434f5245 0x00 0x67495350 0x3a495350 0x5f434f52 0x45000000 0x684953 0x503a4953 0x505f434f 0x52450000 0x6949 0x53503a49 0x53505f43 0x4f524500 0x6a 0x4953503a 0x4152435f 0x4342552f 0x4953505f 0x444d4100 0x6b 0x49444932 0x41584900 0x6c 0x4953505f 0x4143453a 0x4953505f 0x41434530 0x00 0x6d495350 0x5f414345 0x3a495350 0x5f414345 0x31000000 0x6f4d49 0x4e494953 0x50000000 0x7b5379 0x7374656d 0x43616368 0x65000000 0x7c5379 0x7374656d 0x43616368 0x65000000 0x7d5379 0x7374656d 0x43616368 0x65000000 0x7e5379 0x7374656d 0x43616368 0x65000000 0x7f5379 0x7374656d 0x43616368 0x65000000 0x805453 0x505f434f 0x52455f54 0x48524541 0x44303a41 0x53493100 0x81 0x5453505f 0x434f5245 0x5f544852 0x45414432 0x3a415349 0x31000000 0x825453 0x505f434f 0x52455f54 0x48524541 0x44343a41 0x53493100 0x83 0x5453505f 0x434f5245 0x5f544852 0x45414436 0x3a415349 0x31000000 0x845453 0x505f434f 0x52455f54 0x48524541 0x44383a41 0x53493100 0x85 0x5453505f 0x434f5245 0x5f544852 0x45414431 0x303a4153 0x49310000 0x8654 0x53505f43 0x4f52455f 0x54485245 0x41443132 0x3a415349 0x31000000 0x875453 0x505f434f 0x52455f54 0x48524541 0x4431343a 0x41534931 0x00 0x884d444d 0x5f434943 0x4f4d303a 0x41534931 0x00 0x894d444d 0x5f525254 0x3a415349 0x31000000 0x8a4d44 0x4d5f4544 0x4d41303a 0x41534931 0x00 0x8c4d444d 0x5f454943 0x43313a41 0x53493100 0x8d 0x4242505f 0x46424241 0x32444452 0x3a415349 0x31000000 0x8e4242 0x505f4755 0x435f4444 0x523a4153 0x49310000 0x8f42 0x42505f46 0x44414532 0x54434d3a 0x41534931 0x00 0x90424250 0x5f464444 0x4c32534f 0x433a4153 0x49310000 0x9142 0x42505f55 0x4c5f4349 0x50484552 0x3a415349 0x31000000 0x924242 0x505f4650 0x44465f50 0x44455f43 0x303a4153 0x49310000 0x9342 0x42505f46 0x41535444 0x4d415f43 0x46473a41 0x53493100 0x94 0x5453505f 0x434f5245 0x5f504343 0x3a415349 0x31000000 0x964d44 0x4d5f4349 0x50484552 0x35473a41 0x53493100 0x97 0x4d444d5f 0x4c32444c 0x453a4153 0x49312f41 0x53493300 0x98 0x4d444d5f 0x45494343 0x303a4153 0x49310000 0x994d 0x444d5f45 0x444d4131 0x3a415349 0x31000000 0x9a4242 0x505f4644 0x444c3244 0x44523a41 0x5349312f 0x41534933 0x00 0x9b424250 0x5f444247 0x3a415349 0x312f4153 0x49330000 0x9c42 0x42505f46 0x41535444 0x4d415f52 0x50543a41 0x53493100 0xa0 0x5453505f 0x434f5245 0x5f544852 0x45414431 0x3a415349 0x31000000 0xa15453 0x505f434f 0x52455f54 0x48524541 0x44333a41 0x53493100 0xa2 0x5453505f 0x434f5245 0x5f544852 0x45414435 0x3a415349 0x31000000 0xa35453 0x505f434f 0x52455f54 0x48524541 0x44373a41 0x53493100 0xa4 0x5453505f 0x434f5245 0x5f544852 0x45414439 0x3a415349 0x31000000 0xa55453 0x505f434f 0x52455f54 0x48524541 0x4431313a 0x41534931 0x00 0xa6545350 0x5f434f52 0x455f5448 0x52454144 0x31333a41 0x53493100 0xa7 0x5453505f 0x434f5245 0x5f544852 0x45414431 0x353a4153 0x49310000 0xa84d 0x444d5f55 0x50414343 0x3a415349 0x31000000 0xa94d44 0x4d5f4c41 0x544d4f4e 0x3a415349 0x31000000 0xad4242 0x505f4642 0x42413254 0x434d3a41 0x53493100 0xae 0x4242505f 0x4755435f 0x54434d3a 0x41534931 0x00 0xaf424250 0x5f464441 0x45324444 0x523a4153 0x49312f41 0x53493300>;
		};

		qic_acpu_core_info {
			compatible = "dfx,sec_qic_acpu_core_info";
			target_num = <0x0c>;
			target_list = <0x00 0x636f7265 0x30000000 0x8636f 0x72653100 0x01 0x636f7265 0x32000000 0x9636f 0x72653300 0x02 0x636f7265 0x345f3000 0x0a 0x636f7265 0x345f3100 0x03 0x636f7265 0x355f3000 0x0b 0x636f7265 0x355f3100 0x04 0x636f7265 0x365f3000 0x0c 0x636f7265 0x365f3100 0x05 0x636f7265 0x375f3000 0x0d 0x636f7265 0x375f3100>;
		};

		qic_irq_reg@FF7CD0EC {
			compatible = "dfx,sec_qic_irq_reg";
			reg_num = <0x01>;
			reg = <0xff7cc000 0x2000>;
			masks0 = <0x1fef>;
			offsets0 = <0x10ec>;
			len0 = <0x01>;
		};

		qic_timeout_enable_reg@FF31140C {
			compatible = "dfx,sec_qic_timeout_en_reg";
			reg_num = <0x02>;
			reg = <0xff311000 0x1000 0xffb85000 0x1000>;
			masks0 = <0x40000>;
			offsets0 = <0x40c>;
			len0 = <0x01>;
			masks1 = <0x3e0000>;
			offsets1 = <0x12c>;
			len1 = <0x01>;
		};
	};

	peripherals@0x00000000 {
		ranges = <0x00 0x00 0x00 0xffffffff>;
		compatible = "simple-bus";
		#address-cells = <0x01>;
		#size-cells = <0x01>;
		phandle = <0x6e9>;

		dma@ff481000 {
			compatible = "hisilicon,peri-dma64-1.0";
			reg = <0xff481000 0x1000>;
			#dma-cells = <0x01>;
			dma-channels = <0x10>;
			dma-requests = <0x20>;
			dma-min-chan = <0x02>;
			dma-pipeline-en = <0x00>;
			dma-used-chans = <0xfffc>;
			dma-share;
			interrupts = <0x00 0x160 0x04>;
			clocks = <0x18b 0x26>;
			clock-names = "clk_dmac", "apb_pclk";
			status = "ok";
			phandle = <0x76>;
		};
	};

	trusted_core {
		compatible = "trusted_core";
		interrupts = <0x00 0x142 0x04>;
	};

	a1@0xFF896000 {
		compatible = "hisilicon,perfstat-driver";
		reg = <0x00 0xff896000 0x00 0x1000>;
		interrupts = <0x00 0x16f 0x04>;
		clock-names = "clk_perf_stat", "aclk_perf_stat", "pclk_perf_stat", "clk_perf_ctrl";
		clocks = <0x18c 0x18d 0x18e 0x18f>;
		suggest_clk = <0x6acfc00>;
		suggest_aclk = <0xe2f9780>;
		perf-event-id = <0x80000000>;
		per-data-size = <0x20>;
		vldmsk-of-sprt-h128 = <0xffffffff>;
		vldmsk-of-sprt-h96 = <0xffffffff>;
		vldmsk-of-sprt-h64 = <0xffffffff>;
		vldmsk-of-sprt = <0xffffffff>;
		qos_support = <0x00>;
		pctrl-peri-ctrl-addr = <0xd8>;
		phandle = <0x6ea>;
	};

	npu_dev@0x130000000 {
		compatible = "hisilicon,npu";
		#address-cells = <0x02>;
		#size-cells = <0x02>;
		reg = <0x00 0xe4002000 0x00 0x1000 0x00 0xe4200000 0x00 0x80000 0x00 0x00 0x00 0x00 0x00 0xe5e04000 0x00 0x1000 0x00 0x00 0x00 0x00 0x00 0xffb85000 0x00 0x1000 0x00 0xfb21b47c 0x00 0x04 0x00 0xe4400000 0x00 0x100000 0x00 0xe5000000 0x00 0x100000 0x00 0x00 0x00 0x00 0x00 0xe5e07000 0x00 0x1000 0x00 0xe5f40000 0x00 0x20000 0x00 0xff600000 0x00 0x100000>;
		interrupts-extended = <0x01 0x00 0xe4 0x04 0x01 0x00 0xe3 0x04 0x01 0x00 0xe2 0x04>;
		dump_region;
		status = "ok";
		iommus = <0x190 0x0d 0x00>;
		domain_type = <0x01>;

		npu0 {
			feature = <0x01 0x01 0x01 0x01 0x00 0x00 0x01 0x01 0x00 0x00 0x00 0x00 0x00 0x00 0x00>;
			aicpu_cluster = <0x00>;
			aicpu_core = <0x01>;
			tscpu_cluster = <0x00>;
			tscpu_core = <0x00>;
			gic0_spi_blk = <0x0e>;
		};

		log {
			channel = <0x00 0x0a>;
			buf_idx = <0x03>;
		};

		profile {
			channel = <0x0a 0x0b 0x2b 0x2c>;
			buf_idx = <0x08>;
		};

		blackbox {
			channel = <0x00>;
			buf_idx = <0x04>;
		};
	};

	ipc@e5e01000 {
		#address-cells = <0x02>;
		#size-cells = <0x02>;
		compatible = "hisilicon,HiIPCV230";
		reg = <0x00 0xe5e01000 0x00 0x1000>;
		interrupts = <0x00 0xd8 0x04 0x00 0xd8 0x04>;
		clocks = <0x26>;
		clock-names = "apb_pclk";
		unlock_key = <0x1acce551>;
		capability = <0x08>;
		hardware_board_type = <0x00>;
		rproc_src_id = <0x02 0x02>;
		rproc_num = <0x03>;
		ipc_type = <0x12c>;
		rproc_name = "IVP1", "TSCPU", "ACPU";
		status = "ok";
		mailboxes = <0x06>;
		phandle = <0x6eb>;

		npu-mailbox-0 {
			compatible = "HiIPCV230,tx-mailbox-fast";
			func = <0x01 0x01 0x00>;
			src_bit = <0x00>;
			des_bit = <0x02>;
			index = <0x12c>;
			used = <0x01>;
			timeout = <0x12c>;
			rproc = "IPC_NPU_ACPU_NPU_MBX1";
		};

		npu-mailbox-1 {
			compatible = "HiIPCV230,tx-mailbox-fast";
			func = <0x01 0x01 0x00>;
			src_bit = <0x00>;
			des_bit = <0x02>;
			index = <0x12d>;
			used = <0x01>;
			timeout = <0x12c>;
			rproc = "IPC_NPU_ACPU_NPU_MBX2";
		};

		npu-mailbox-2 {
			compatible = "HiIPCV230,tx-mailbox-fast";
			func = <0x01 0x01 0x00>;
			src_bit = <0x02>;
			des_bit = <0x01>;
			index = <0x12e>;
			used = <0x01>;
			timeout = <0x12c>;
			rproc = "IPC_NPU_ACPU_NPU_MBX3";
		};

		npu-mailbox-3 {
			compatible = "HiIPCV230,tx-mailbox-fast";
			func = <0x01 0x01 0x00>;
			src_bit = <0x02>;
			des_bit = <0x01>;
			index = <0x12f>;
			used = <0x01>;
			timeout = <0x12c>;
			rproc = "IPC_NPU_ACPU_NPU_MBX4";
		};

		npu-mailbox-4 {
			compatible = "HiIPCV230,rx-mailbox-fast";
			func = <0x01 0x00 0x01>;
			interrupts = <0x00 0xda 0x04>;
			src_bit = <0x01>;
			des_bit = <0x02>;
			index = <0x130>;
			used = <0x01>;
			timeout = <0x12c>;
			rproc = "IPC_NPU_NPU_ACPU_MBX1";
		};

		npu-mailbox-5 {
			compatible = "HiIPCV230,rx-mailbox-fast";
			func = <0x01 0x00 0x01>;
			interrupts = <0x00 0xdb 0x04>;
			src_bit = <0x01>;
			des_bit = <0x02>;
			index = <0x131>;
			used = <0x01>;
			timeout = <0x12c>;
			rproc = "IPC_NPU_NPU_ACPU_MBX2";
		};
	};

	hisi_npu_ts_subsys {
		compatible = "hisilicon,npu_iova";
		iommus = <0x190 0x0c 0x01>;

		iova_info {
			start-addr = <0x00 0x100000>;
			size = <0x00 0xbff00000>;
			iova-align = <0x00 0x8000>;
		};
	};

	powerhal {
		compatible = "ithermal,powerhal";
		ithermal,powerhal-spm-cfg = <0xf8890 0x15f900 0x205940 0x26442480>;
		ithermal,powerhal-vr-cfg = <0xf8890 0x15f900 0x205940 0x26442480>;
		ithermal,powerhal-min-cfg = <0x660d0 0x660d0 0x12e7d8 0x10a133c0>;
		phandle = <0x6ec>;
	};

	weights {
		compatible = "ithermal,weights";
		ithermal,weights-default-cfg = <0x100 0x100 0x100 0x100>;
		ithermal,weights-boost-cfg = <0x100 0x100 0x100 0x300>;
		phandle = <0x6ed>;
	};

	tsens {
		compatible = "ithermal,tsens";
		ithermal,sensors = <0x08>;
		ithermal,tsensor_name = "cluster0", "cluster1", "cluster2", "gpu", "modem", "npu", "peri", "ddr";
		ithermal,tsensor_mode = <0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01>;
		ithermal,detect_cluster0_regno = <0x00>;
		ithermal,detect_cluster1_regno = <0x01>;
		ithermal,detect_cluster2_regno = <0x02>;
		ithermal,detect_gpu_regno = <0x03>;
		ithermal,detect_modem_regno = <0x04>;
		ithermal,detect_ddr_regno = <0xff>;
		ithermal,detect_npu_regno = <0x05>;
		ithermal,detect_peri_regno = <0x06>;
		ithermal,tsensor_adc_start_value = <0x1a8>;
		ithermal,tsensor_adc_end_value = <0x2cf>;
		ithermal,tsensor_adc_delta_value = <0x05>;
		phandle = <0x6ee>;

		ithermal_tsens_cluster0 {
			temp_throttling = <0x00>;
			temp_shutdown = <0x7d>;
			temp_below_vr_min = <0x00>;
		};

		ithermal_tsens_cluster1 {
			temp_throttling = <0x00>;
			temp_shutdown = <0x7d>;
			temp_below_vr_min = <0x00>;
		};

		ithermal_tsens_cluster2 {
			temp_throttling = <0x00>;
			temp_shutdown = <0x7d>;
			temp_below_vr_min = <0x00>;
		};

		ithermal_tsens_gpu {
			temp_throttling = <0x00>;
			temp_shutdown = <0x7d>;
			temp_below_vr_min = <0x00>;
		};
	};

	hisi_tm {
		compatible = "ithermal,peripheral-tm";
		ithermal,peripheral_sensors = <0x0f>;
		ithermal,detect_system_h_tm_chanel = <0x07>;
		ithermal,detect_system_h_tm_ntc = "ithermal_hkadc_soc_temp_table";
		ithermal,detect_system_h_tm_state = "enable";
		ithermal,detect_flash_led_tm_chanel = <0x00>;
		ithermal,detect_flash_led_tm_ntc = "ithermal_hkadc_soc_temp_table";
		ithermal,detect_flash_led_tm_state = "disable";
		ithermal,detect_charger_tm_chanel = <0x04>;
		ithermal,detect_charger_tm_ntc = "ithermal_hkadc_soc_temp_table";
		ithermal,detect_charger_tm_state = "enable";
		ithermal,detect_pa_0_tm_chanel = <0x05>;
		ithermal,detect_pa_0_tm_ntc = "ithermal_hkadc_pa_temp_table";
		ithermal,detect_pa_0_tm_state = "enable";
		ithermal,detect_pa_1_tm_chanel = <0x06>;
		ithermal,detect_pa_1_tm_ntc = "ithermal_hkadc_pa_temp_table";
		ithermal,detect_pa_1_tm_state = "enable";
		ithermal,detect_dcxo0_tm_chanel = <0x0f>;
		ithermal,detect_dcxo0_tm_ntc = "ithermal_hkadc_adc_temp_table";
		ithermal,detect_dcxo0_tm_state = "enable";
		ithermal,detect_shell_tm_chanel = <0x00>;
		ithermal,detect_shell_tm_ntc = "ithermal_hkadc_soc_temp_table";
		ithermal,detect_shell_tm_state = "disable";
		ithermal,detect_charger1_tm_chanel = <0x00>;
		ithermal,detect_charger1_tm_ntc = "ithermal_hkadc_soc_temp_table";
		ithermal,detect_charger1_tm_state = "disable";
		ithermal,detect_rfboard_tm_chanel = <0x0d>;
		ithermal,detect_rfboard_tm_ntc = "ithermal_hkadc_soc_temp_table";
		ithermal,detect_rfboard_tm_state = "enable";
		ithermal,detect_usb_tm_chanel = <0x00>;
		ithermal,detect_usb_tm_ntc = "ithermal_hkadc_soc_temp_table";
		ithermal,detect_usb_tm_state = "disable";
		ithermal,detect_wireless_tm_chanel = <0x00>;
		ithermal,detect_wireless_tm_ntc = "ithermal_hkadc_soc_temp_table";
		ithermal,detect_wireless_tm_state = "disable";
		ithermal,detect_ir_tm_chanel = <0x09>;
		ithermal,detect_ir_tm_ntc = "ithermal_hkadc_soc_temp_table";
		ithermal,detect_ir_tm_state = "enable";
		ithermal,detect_dot_tm_chanel = <0x00>;
		ithermal,detect_dot_tm_ntc = "ithermal_hkadc_soc_temp_table";
		ithermal,detect_dot_tm_state = "disable";
		ithermal,detect_pa_2_tm_chanel = <0x08>;
		ithermal,detect_pa_2_tm_ntc = "ithermal_hkadc_pa_temp_table";
		ithermal,detect_pa_2_tm_state = "enable";
		ithermal,detect_pa_s_tm_chanel = <0x00>;
		ithermal,detect_pa_s_tm_ntc = "ithermal_hkadc_pa_temp_table";
		ithermal,detect_pa_s_tm_state = "disable";
		status = "ok";
		phandle = <0x6ef>;
	};

	shell_frame {
		compatible = "ithermal,shell-temp";
		is_framework = <0x01>;
		interval = <0x1388>;
		bias = <0x00>;
		count = <0x08>;
		shell_temp_step = <0xc8>;
		shell_temp_step_range = <0x190>;
		tsensor_para = "4000", "100000", "0";
		ntc_para = "2000", "80000", "-20000";
		status = "ok";
		phandle = <0x6f0>;

		sensors {

			sensor0 {
				type = "Battery";
				coef = "0", "0", "0", "0", "0", "0", "0", "0";
			};

			sensor1 {
				type = "system_h";
				coef = "0", "0", "0", "0", "0", "0", "0", "0";
			};

			sensor2 {
				type = "charger";
				coef = "0", "0", "0", "0", "0", "0", "0", "0";
			};

			sensor3 {
				type = "pa_0";
				coef = "0", "0", "0", "0", "0", "0", "0", "0";
			};
		};
	};

	shell_front {
		compatible = "ithermal,shell-temp";
		is_framework = <0x01>;
		interval = <0x1388>;
		bias = <0x00>;
		count = <0x09>;
		shell_temp_step = <0xc8>;
		shell_temp_step_range = <0x190>;
		tsensor_para = "4000", "100000", "0";
		ntc_para = "2000", "80000", "-20000";
		status = "ok";
		phandle = <0x6f1>;

		sensors {

			sensor0 {
				type = "system_h";
				coef = "0", "0", "0", "0", "0", "0", "0", "0", "0";
			};
		};
	};

	shell_back {
		compatible = "ithermal,shell-temp";
		is_framework = <0x01>;
		interval = <0x1388>;
		bias = <0x00>;
		count = <0x08>;
		shell_temp_step = <0xc8>;
		shell_temp_step_range = <0x190>;
		tsensor_para = "4000", "100000", "0";
		ntc_para = "2000", "80000", "-20000";
		status = "ok";
		phandle = <0x6f2>;

		sensors {

			sensor0 {
				type = "Battery";
				coef = "0", "0", "0", "0", "0", "0", "0", "0";
			};
		};
	};

	shell_level {
		compatible = "ithermal,shell-temp";
		is_framework = <0x01>;
		interval = <0x1388>;
		bias = <0x00>;
		count = <0x08>;
		shell_temp_step = <0x02>;
		shell_temp_step_range = <0x0a>;
		tsensor_para = "1", "10", "0";
		ntc_para = "1", "10", "0";
		status = "ok";
		phandle = <0x6f3>;

		sensors {

			sensor0 {
				type = "system_h";
				coef = "0", "0", "0", "0", "0", "0", "0", "0";
			};
		};
	};

	hisi_ambient {
		compatible = "ithermal,ambient-temp";
		interval = <0x384>;
		bias = <0x01>;
		status = "ok";
		phandle = <0x6f4>;

		sensors {

			sensor0 {
				type = "system_h";
			};

			sensor1 {
				type = "charger";
			};

			sensor2 {
				type = "pa_0";
			};

			sensor3 {
				type = "dcxo0";
			};
		};
	};

	cpu_temp_threshold {
		ithermal,down_threshold = <0x19a28>;
		ithermal,up_threshold = <0x17318>;
		ithermal,cpu_hotplug_mask = <0x80>;
		ithermal,cpu_smt_hotplug_mask = <0xc00>;
		ithermal,critical_down_threshold = <0x1c138>;
		ithermal,critical_up_threshold = <0x19a28>;
		ithermal,critical_cpu_hotplug_mask = <0xf0>;
		ithermal,critical_cpu_smt_hotplug_mask = <0xff0>;
		ithermal,gpu_down_threshold = <0x19a28>;
		ithermal,gpu_up_threshold = <0x17318>;
		ithermal,gpu_limit_cores = <0x01>;
		ithermal,gpu_total_cores = <0x04>;
		ithermal,polling_delay = <0xc8>;
		ithermal,polling_delay_passive = <0x32>;
	};

	ipa_sensors_info {
		ithermal,cluster_num = <0x03>;
		ithermal,ipa_cpufreq_table_index = <0x00 0x04 0x0a>;
		ithermal,ipa_sensor_num = <0x04>;
		ithermal,ipa_actor_name = "cluster0", "cluster1", "cluster2", "gpu";
		ithermal,ipa_actor_index = <0x00 0x01 0x02 0x03>;
	};

	capacitances {
		ithermal,cluster_dyn_capacitance = <0x41 0x169 0x1c2>;
		ithermal,cluster_static_capacitance = <0x07 0x0b 0x1c>;
		ithermal,cache_capacitance = <0x43 0x04 0x04>;
		ithermal,temperature_scale_capacitance = "46850", "1880", "-20", "1", "648";
		ithermal,gpu_dyn_capacitance = <0x1745>;
		ithermal,gpu_temp_scale_capacitance = "-49650", "4688", "-92", "1", "100";
		ithermal,higpu_dyn_capacitance = <0x1745>;
		ithermal,higpu_temp_scale_capacitance = "-49650", "4688", "-92", "1", "100";
	};

	ipa-sensor@1 {
		type = "system_h";
		compatible = "arm,ipa-thermal1";
		#thermal-sensor-cells = <0x01>;
		status = "ok";
		phandle = <0xf1>;
	};

	npu_thermal {
		compatible = "ithermal,npu_thermal";
		governor_name = "step_wise";
		polling-delay = <0xc8>;
		polling-delay-passive = <0x32>;
		num-trips = <0x05>;
		trip0-temp = <0x124f8>;
		trip0-type = "passive";
		trip0-cdev-num = <0x01>;
		trip0-cdev-name0 = "npu_pm";
		trip1-temp = <0x12cc8>;
		trip1-type = "passive";
		trip1-cdev-num = <0x01>;
		trip1-cdev-name0 = "npu_pm";
		trip2-temp = <0x13c68>;
		trip2-type = "passive";
		trip2-cdev-num = <0x01>;
		trip2-cdev-name0 = "npu_pm";
		trip3-temp = <0x14438>;
		trip3-type = "passive";
		trip3-cdev-num = <0x01>;
		trip3-cdev-name0 = "npu_pm";
		trip4-temp = <0x14c08>;
		trip4-type = "passive";
		trip4-cdev-num = <0x01>;
		trip4-cdev-name0 = "npu_pm";
	};

	lowpm_powerstate {
		compatible = "ipowerstate,master";
		channel_max = <0x18>;
		sample_interval = <0x4b00>;

		cpu_power {
			compatible = "ipowerstate,CPU";
			power_start = <0x00>;
			power_end = <0x08>;
		};

		gpu_power {
			compatible = "ipowerstate,GPU";
			power_start = <0x09>;
			power_end = <0x15>;
		};

		npu_power {
			compatible = "ipowerstate,NPU";
			power_start = <0x16>;
			power_end = <0x17>;
		};
	};

	maxim_ioctl {
		compatible = "huawei,maxim_ioctl";
		rcv_switch_support = <0x00>;
		status = "disabled";
	};

	tfa98xx_ioctl {
		compatible = "huawei,tfa98xx_ioctl";
		rcv_switch_support = <0x00>;
		status = "disabled";
	};

	hw_connectivity {
		chip_type = "hisi";
		compatible = "huawei,hw_connectivity";
		phandle = <0x6f5>;
	};

	rtl_wifi {
		compatible = "hisilicon,rtl_wifi";
		phandle = <0x6f6>;
	};

	bcm_wifi {
		status = "disabled";
		compatible = "hisilicon,bcm_wifi";
		phandle = <0x6f7>;
	};

	bcm_bt {
		compatible = "hisilicon,bcm_bt";
		phandle = <0x6f8>;
	};

	bluetooth_sleep {
		status = "disabled";
		compatible = "huawei,bluetooth_sleep";
		phandle = <0x6f9>;
	};

	bluetooth_power {
		status = "disabled";
		compatible = "huawei,bluetooth_power";
		phandle = <0x6fa>;
	};

	gps_power {
		status = "disabled";
		compatible = "huawei,gps_power";
		phandle = <0x6fb>;
	};

	hi110x {
		hi110x,asic_version;
		hi110x,gpio_ssi_data = <0x2f 0x1d 0x00>;
		hi110x,gpio_ssi_clk = <0x2f 0x1e 0x00>;
		hi110x,gpio_power_on = <0x4f 0x0b 0x00>;
		hi110x,subchip_type = "hi1105";
		status = "ok";
		huawei,pmu_clk32b = "clk_pmu32kb";
		hi110x,gpio_wlan_power_on = <0xf5 0x0e 0x00>;
		hi110x,gpio_bfgx_power_on = <0x166 0x05 0x00>;
		compatible = "hisilicon,hi110x", "hisilicon,hi1102";
		phandle = <0x6fc>;
	};

	hisi_wifi {
		hi110x,gpio_wlan_wakeup_host = <0x43 0x0f 0x00>;
		hi110x,gpio_host_wakeup_wlan = <0xf5 0x0d 0x00>;
		status = "ok";
		compatible = "hisilicon,hisi_wifi";
		phandle = <0x6fd>;

		hisi_wifi_firmware {
			firmware_type_num = "1";
			status = "ok";
			compatible = "hisi,wifi_firmware";
		};

		hisi_wifi_supp {
			supp_config_template = "/vendor/etc/wifi/wpa_supplicant_hisi.conf";
			status = "ok";
			compatible = "hisi,wifi_supp";
		};

		hisi_wifi_p2p {
			p2p_config_template = "/vendor/etc/wifi/p2p_supplicant_hisi.conf";
			status = "ok";
			compatible = "hisi,wifi_p2p";
		};

		hisi_wifi_apd {
			hostapd_bin_file = "/vendor/bin/hostapd_hisi";
			status = "ok";
			compatible = "hisi,wifi_hostapd";
		};
	};

	hisi_bfgx {
		hi110x,uart_port = "/dev/ttyHW4";
		hi110x,gpio_bfgx_wakeup_host = <0x4f 0x0c 0x00>;
		status = "ok";
		compatible = "hisilicon,hisi_bfgx";
		phandle = <0x6fe>;
	};

	hisi_me {
		compatible = "hisilicon,hisi_me";
		status = "disabled";
		phandle = <0x6ff>;
	};

	hisi_gt {
		compatible = "hisilicon,hisi_gt";
		status = "disabled";
		phandle = <0x700>;
	};

	hisi_gle {
		compatible = "hisilicon,hisi_gle";
		status = "disabled";
		phandle = <0x701>;
	};

	hisi_sle_info {
		compatible = "huawei,hw_sle_info";
		phandle = <0x702>;
	};

	hisi_cust_cfg {
		ini_file_name = "/vendor/etc/cfg_pgv.ini";
		status = "ok";
		compatible = "hi110x,customize", "hi1102,customize";
		phandle = <0x703>;
	};

	hisi_gps {
		clock-names = "ref_clk", "mux_clk", "mdm_clk0", "mdm_clk1", "mdm_clk2";
		clocks = <0x4ee 0x4ef 0x4f0 0x4f1 0x4f2>;
		status = "ok";
		compatible = "hisilicon,hisi_gps";
		phandle = <0x704>;
	};

	hisi_gps_sync {
		en_addr_offset = <0x954>;
		addr_offset = <0x950>;
		addr_base = <0xf0100000>;
		version = <0x03>;
		status = "ok";
		compatible = "hisilicon,hisi_gps_sync";
		phandle = <0x705>;
	};

	coul_polar {
		compatible = "hisi,coul_polar";
		fifo_interval = <0xfa>;
		fifo_depth = <0x08>;
		status = "disabled";
		phandle = <0x706>;
	};

	bat_thermal {
		compatible = "hisilicon,bat_thermal";
		status = "ok";
		phandle = <0x707>;
	};

	coul_merge {
		compatible = "hisilicon,coul_merge";
		cap_ratio_0 = <0x3e8>;
		cap_ratio_1 = <0x00>;
		cap_ratio_2 = <0x00>;
		switch_on_voltage = <0xce4>;
		is_series_bat = <0x00>;
		status = "ok";
		phandle = <0x708>;
	};

	hisi_coul_test {
		compatible = "hisilicon,coul_drv_test";
		status = "ok";
		phandle = <0x709>;
	};

	fastboot_battery {
		compatible = "fastboot,battery";
		iin_limit_ac = <0x4b0>;
		iin_limit_usb = <0x1f4>;
		ichrg_limit_ac = <0x2bc>;
		switch_on_voltage = <0xd7a>;
		poweron_charger_enable = <0x01>;
		temp_abnormal_loop = <0x01>;
		status = "ok";
		phandle = <0x70a>;
	};

	fastboot_charger {
		compatible = "fastboot,charger";
		ichrg_pre_limit = <0xc8>;
		hw_charger_type = <0x09>;
		chip_i2c_num = <0x06>;
		status = "ok";
		phandle = <0x70b>;
	};

	fastboot_charge_vibrate {
		compatible = "hisilicon,charge_vibrate";
		vibrator_delay = <0x00>;
		phandle = <0x70c>;
	};

	huawei_charger {
		compatible = "huawei,charger";
		pd_support = <0x01>;
		fcp_vindpm = <0x1fa4>;
		wd_by_audio_dp_dn = <0x00>;
		pd_cur_trans_ratio = <0x58>;
		check_ibias_sleep_time = <0xfa>;
		hota_iin_limit = <0x384>;
		startup_iin_limit = <0x514>;
		sw_recharge_flag = <0x00>;
		ndc_vterm_step = <0x10>;
		leak_current_check = <0x01>;
		need_filter_pd_event = <0x01>;
		charge_full_check_type = <0x00>;
		status = "disabled";
		phandle = <0x70d>;
	};

	charger_detection {
		compatible = "huawei,charger_detection";
		status = "disabled";
		phandle = <0x70e>;
	};

	buck_charge_ic {
		compatible = "huawei,buck_charge_ic";
		ic_type = <0x01>;
		status = "ok";
		phandle = <0x70f>;
	};

	usb_short_circuit_protect {
		compatible = "huawei,usb_short_circuit_protect";
		uscp_threshold_tusb = <0x28>;
		open_mosfet_temp = <0x0a>;
		close_mosfet_temp = <0x09>;
		interval_switch_temp = <0x07>;
		status = "disabled";
		phandle = <0x710>;
	};

	huawei_pogopin_sw {
		compatible = "huawei,pogopin_sw";
		status = "disabled";
		phandle = <0x711>;
	};

	huawei_pogo_acc {
		compatible = "huawei,pogopinaccessory";
		status = "disabled";
		phandle = <0x712>;
	};

	batt_acr_detect {
		compatible = "huawei,batt_acr_detect";
		acr_rt_support = <0x00>;
		acr_rt_threshold = <0x64>;
		acr_rt_fmd_min = <0x28>;
		acr_rt_fmd_max = <0x5a>;
		status = "disable";
		phandle = <0x713>;
	};

	vbus_monitor {
		compatible = "huawei,vbus_monitor";
		absent_monitor_enabled = <0x01>;
		status = "ok";
		phandle = <0x714>;
	};

	vbus_channel_charger {
		compatible = "huawei,vbus_channel_charger";
		status = "ok";
		phandle = <0x715>;
	};

	vbus_channel_boost_gpio {
		compatible = "huawei,vbus_channel_boost_gpio";
		status = "disabled";
		phandle = <0x716>;
	};

	soc_decimal {
		compatible = "huawei,soc_decimal";
		para = <0x00 0x4e20 0x9c40 0x64 0x55 0x8c 0x00 0x9c40 0x249f0 0x64 0x78 0x64 0x01 0x4e20 0x6978 0x64 0x55 0x8c 0x01 0x6978 0x186a0 0x64 0x55 0x8c>;
		status = "ok";
		phandle = <0x717>;
	};

	power_thermalzone {
		compatible = "huawei,power_thermalzone";
		status = "disabled";
		phandle = <0x718>;

		sensors {

			sensor0 {
				sensor_name = "usb_port";
				ops_name = "platform";
				adc_channel = <0x03>;
				ntc_index = <0x02>;
			};
		};
	};

	hw_batt_vol {
		compatible = "huawei,battery_voltage";
		status = "disabled";
		batt_series_num = <0x01>;
		phandle = <0x719>;

		batt_vol {

			batt_vol0 {
				batt_id = <0x00>;
				ops_name = "hisi_coul";
			};
		};
	};

	huawei_battery_temp {
		compatible = "huawei,battery_temp";
		status = "disabled";
		phandle = <0x71a>;
	};

	multi_btb_temp {
		compatible = "huawei,multi_btb_temp";
		status = "disabled";
		phandle = <0x71b>;
	};

	temp_control {
		compatible = "huawei,temp_control";
		status = "disabled";
		phandle = <0x71c>;
	};

	bat_heating {
		compatible = "huawei,bat_heating";
		status = "disabled";
		phandle = <0x71d>;
	};

	power_extra_event {
		compatible = "huawei,power_extra_event";
		status = "disabled";
		phandle = <0x71e>;
	};

	btb_check {
		compatible = "huawei,btb_check";
		status = "disabled";
		phandle = <0x71f>;
	};

	battery_temp_fitting {
		compatible = "huawei,battery_temp_fitting";
		status = "disabled";
		btf_tz_type_para = "board_thermal", "usb_port", "rfboard", "wireless", "constant";
		btf_ichg_para = "0";
		btf_fitting_para = "0", "0", "0", "0", "0";
		phandle = <0x720>;
	};

	charge_pump {
		compatible = "huawei,charge_pump";
		gpio_cfg_flag = <0x00>;
		status = "disabled";
		phandle = <0x721>;
	};

	wireless_sc {
		compatible = "huawei,wireless_sc";
		need_wired_sw_on = <0x00>;
		cp_iout_err_th = <0x96>;
		volt_ratio = <0x02>;
		ctrl_interval = <0x12c>;
		calc_interval = <0x64>;
		vstep = <0x32>;
		init_para = "0x2", "SC_2", "0", "1", "3550", "4350", "9000", "100", "600", "100", "200", "0";
		volt_para00 = "4360", "1250", "600";
		bat_para = "default", "10", "45", "0x02", "volt_para00";
		status = "disabled";
		phandle = <0x722>;
	};

	wireless_ps {
		compatible = "huawei,wireless_ps";
		tx_ps_ctrl_src = <0x00>;
		status = "disabled";
		phandle = <0x723>;
	};

	wireless_tx {
		ss_low_th = <0x50>;
		compatible = "huawei,wireless_tx";
		pwr_type = <0x02>;
		tx_iin_limit = <0x00 0x1f4 0x12c 0x3e8 0x3e8 0x00 0x00 0x00 0x00 0x3e8 0x00 0x00>;
		tx_vset_para = <0x1130 0x170c 0x1388 0x1194 0x16a8 0x00 0x00 0x00>;
		vbus_5vbst_exclusive = <0x01>;
		status = "disabled";
		phandle = <0x724>;
	};

	wireless_aux_tx {
		compatible = "huawei, wireless_aux_tx";
		pwr_type = <0x02>;
		tx_iin_limit = <0x00 0x1f4 0x12c 0x3e8 0x3e8 0x00 0x00 0x00 0x00 0x3e8 0x00 0x00>;
		status = "disabled";
		phandle = <0x725>;
	};

	wireless_tx_pen_kb {
		compatible = "huawei, pen_kb";
		status = "disabled";
		phandle = <0x726>;
	};

	wireless_ps_aux {
		compatible = "huawei,wireless_ps_aux";
		proc_otp_pwr = <0x01>;
		recover_otp_pwr = <0x01>;
		status = "disabled";
		phandle = <0x727>;
	};

	wltx_pwm {
		compatible = "huawei,wltx_pwm";
		status = "disabled";
		phandle = <0x728>;
	};

	lightstrap {
		compatible = "huawei,lightstrap";
		status = "disabled";
		phandle = <0x729>;
	};

	wireless_fw {
		compatible = "huawei,wireless_fw";
		ic_nums = <0x01>;
		status = "disabled";
		phandle = <0x72a>;
	};

	wireless_charger {
		compatible = "huawei,wireless_charger";
		standard_tx_adaptor = <0x05>;
		antifake_key_index = <0x01>;
		support_prev_fodchk = <0x01>;
		discon_delay_time = <0xbb8>;
		interference_para = "0x01", "0xfe", "131", "5000", "5500", "475", "0x02", "0xfd", "-1", "-1", "-1", "900";
		segment_para = <0x63 0x64 0x1388 0x157c 0x1db>;
		rx_vout_err_ratio = <0x51>;
		rx_iout_min = <0x82>;
		rx_iout_step = <0x15e>;
		rx_iout_ctrl_para = <0x00 0x50 0x82 0x50 0x96 0x12c 0x96 0xfa 0x190 0xfa 0x145 0x1db 0x145 0x1c2 0x258 0x1c2 0x226 0x2bc 0x226 0x2a3 0x339 0x2a3 0x352 0x3e8 0x352 0x270f 0x4b0>;
		plim_para = "0", "otg", "no", "18000", "18000", "5100", "2", "fan", "yes", "12000", "9900", "1250";
		rx_mode_para = "5W", "5000", "500", "5000", "5500", "1000", "5000", "-1", "-1", "-1", "0", "-1", "-1";
		product_para = <0x3a98 0x4650 0x640>;
		tx_prop = "0x01", "SDP", "0", "0", "5000", "475", "0x02", "CDP", "0", "0", "5000", "1000", "0x03", "NON_STD", "0", "0", "5000", "1000", "0x04", "DCP", "0", "0", "5000", "1000", "0x05", "FCP", "0", "1", "9000", "2000", "0x06", "SCP", "0", "1", "5000", "1000", "0x07", "PD", "0", "1", "5000", "1000", "0x08", "QC", "0", "1", "5000", "1000", "0x09", "OTG_A", "0", "0", "5000", "475", "0x0A", "OTG_B", "0", "0", "5000", "475", "0xff", "ERR", "0", "0", "5000", "1000";
		volt_mode = <0x00 0x1388 0x01 0x2328 0x02 0x2ee0 0x03 0x3a98>;
		status = "disabled";
		phandle = <0x72b>;
	};

	boost_5v {
		fastboot_boost5v_gpio = <0xfd>;
		gpio_5v_boost = <0x43 0x1d 0x00>;
		compatible = "huawei,boost_5v";
		status = "ok";
		phandle = <0x72c>;
	};

	wired_channel_manager {
		compatible = "huawei,wired_channel_manager";
		status = "disabled";
		phandle = <0x72d>;
	};

	wired_channel_switch {
		compatible = "huawei,wired_channel_switch";
		use_ovp_cutoff_wired_channel = <0x01>;
		use_super_switch_cutoff_wired_channel = <0x00>;
		use_wireless_switch_cutoff_wired_channel = <0x00>;
		status = "disabled";
		phandle = <0x72e>;
	};

	ovp_channel_switch {
		compatible = "huawei,ovp_channel_switch";
		gpio_low_by_set_input = <0x00>;
		status = "disabled";
		phandle = <0x72f>;
	};

	ncp3902_channel_switch {
		compatible = "huawei,ncp3902_channel_switch";
		status = "disabled";
		phandle = <0x730>;
	};

	mixed_ovp_channel_switch {
		compatible = "huawei,mixed_ovp_chsw";
		status = "disabled";
		phandle = <0x731>;
	};

	power_switch {
		compatible = "huawei,power_sw";
		status = "disabled";
		phandle = <0x732>;
	};

	vbat_ovp {
		compatible = "vbat,ovp";
		status = "disabled";
		phandle = <0x733>;
	};

	dischg_boost {
		compatible = "huawei,dischg_boost";
		status = "disabled";
		phandle = <0x734>;
	};

	direct_charge_turbo {
		compatible = "huawei,direct_charge_turbo";
		status = "disabled";
		phandle = <0x735>;
	};

	direct_charge_ps {
		compatible = "huawei,direct_charge_ps";
		boost_5v_support_scp_power = <0x00>;
		huawei_charger_support_scp_power = <0x00>;
		status = "disabled";
		phandle = <0x736>;
	};

	direct_charge_ic {
		compatible = "huawei,direct_charge_ic";
		status = "disabled";
		phandle = <0x737>;
	};

	direct_charge_rechg {
		compatible = "huawei,direct_charge_rechg";
		max_ibus = <0x640>;
		enforce_ibat = <0x3e8>;
		abnomal_ibat_lth = <0x32>;
		status = "disabled";
		phandle = <0x738>;
	};

	direct_charge_comp {
		compatible = "direct_charge_comp";
		vbat_comp_ic_para = "bq25970", "4", "1", "3", "rt9759", "10", "4", "3", "nu2105", "7", "1", "3", "sc8551", "4", "1", "3", "hl7130", "5", "2", "3", "hi6526", "22", "19", "3", "syh69637", "4", "1", "3", "sm5450", "0", "0", "1", "sc8545", "0", "0", "1", "sc8546", "0", "0", "1", "hl7139", "0", "0", "1", "syh69636", "0", "0", "1", "aw32280", "26", "12", "3", "sgm41600", "0", "0", "1", "sc8562", "3", "1", "3", "sy6513", "3", "1", "3";
		status = "disabled";
		phandle = <0x739>;
	};

	direct_charger {
		need_wired_sw_off = <0x00>;
		compensate_r = <0x00>;
		dc_volt_ratio = <0x01>;
		use_5A = <0x00>;
		scp_cable_detect_enable = <0x00>;
		max_adaptor_vset = <0x157c>;
		max_tadapt = <0x73>;
		max_tls = <0x73>;
		ibat_abnormal_th = <0xc8>;
		first_cc_stage_timer_in_min = <0x00>;
		max_dc_bat_vol = <0x10fe>;
		min_dc_bat_vol = <0xdde>;
		charge_control_interval = <0x05>;
		threshold_caculation_interval = <0x05>;
		safety_monitor_interval = <0x05>;
		scp_work_on_charger = <0x00>;
		init_adapter_vset = <0x1130>;
		init_delt_vset = <0x12c>;
		vstep = <0x0a>;
		delta_err = <0xc8>;
		vol_err_th = <0x96>;
		full_path_res_max = <0x78>;
		standard_cable_full_path_res_max = <0xa0>;
		ctc_cable_full_path_res_max = <0x140>;
		max_current_for_ctc_cable = <0xcb2>;
		max_current_for_none_standard_cable = <0xbb8>;
		super_ico_current = <0xfa0>;
		is_show_ico_first = <0x00>;
		adaptor_leakage_current_th = <0x12c>;
		adaptor_detect_by_voltage = <0x00>;
		stage_need_to_jump = "-1";
		startup_iin_limit = <0x5dc>;
		temp_para = "-32767", "10", "0", "10", "45", "4750", "45", "32767", "0";
		compatible = "direct_charger";
		status = "disabled";
		phandle = <0x73a>;
	};

	direct_charger_sc {
		compatible = "direct_charger_sc";
		need_wired_sw_off = <0x00>;
		dc_volt_ratio = <0x02>;
		compensate_r = <0x00>;
		max_adaptor_vset = <0x2af8>;
		max_tadapt = <0x73>;
		max_tls = <0x73>;
		ibat_abnormal_th = <0xc8>;
		first_cc_stage_timer_in_min = <0x00>;
		max_dc_bat_vol = <0x111c>;
		min_dc_bat_vol = <0xdde>;
		charge_control_interval = <0x05>;
		threshold_caculation_interval = <0x05>;
		safety_monitor_interval = <0x05>;
		scp_work_on_charger = <0x00>;
		init_adapter_vset = <0x2260>;
		init_delt_vset = <0x258>;
		vstep = <0x14>;
		delta_err = <0x12c>;
		vol_err_th = <0x96>;
		full_path_res_max = <0x78>;
		standard_cable_full_path_res_max = <0xa0>;
		ctc_cable_full_path_res_max = <0x140>;
		max_current_for_ctc_cable = <0x1964>;
		max_current_for_none_standard_cable = <0x1770>;
		super_ico_current = <0xfa0>;
		is_show_ico_first = <0x00>;
		adaptor_leakage_current_th = <0x12c>;
		adaptor_detect_by_voltage = <0x00>;
		gain_curr_10v2a = <0x12c>;
		stage_need_to_jump = "-1";
		startup_iin_limit = <0x5dc>;
		product_max_pwr = <0x9c40>;
		adaptor_antifake_execute_enable = <0x01>;
		temp_para = "-32767", "10", "0", "10", "45", "4750", "45", "32767", "0";
		status = "disabled";
		phandle = <0x73b>;
	};

	direct_charger_sc4 {
		compatible = "direct_charger_sc4";
		need_wired_sw_off = <0x00>;
		dc_volt_ratio = <0x04>;
		compensate_r = <0x00>;
		max_adaptor_vset = <0x4e20>;
		max_tadapt = <0x73>;
		max_tls = <0x73>;
		ibat_abnormal_th = <0xc8>;
		first_cc_stage_timer_in_min = <0x00>;
		max_dc_bat_vol = <0x111c>;
		min_dc_bat_vol = <0xdde>;
		charge_control_interval = <0x05>;
		threshold_caculation_interval = <0x05>;
		safety_monitor_interval = <0x05>;
		scp_work_on_charger = <0x00>;
		init_adapter_vset = <0x3a98>;
		init_delt_vset = <0x320>;
		vstep = <0x28>;
		delta_err = <0x190>;
		vol_err_th = <0x96>;
		full_path_res_max = <0x78>;
		standard_cable_full_path_res_max = <0xa0>;
		ctc_cable_full_path_res_max = <0x140>;
		max_current_for_ctc_cable = <0x32c8>;
		max_current_for_none_standard_cable = <0x2ee0>;
		super_ico_current = <0xfa0>;
		is_show_ico_first = <0x00>;
		adaptor_leakage_current_th = <0x12c>;
		adaptor_detect_by_voltage = <0x00>;
		gain_curr_10v2a = <0x12c>;
		stage_need_to_jump = "-1";
		startup_iin_limit = <0x5dc>;
		product_max_pwr = <0x9c40>;
		adaptor_antifake_execute_enable = <0x01>;
		temp_para = "-32767", "10", "0", "10", "45", "4750", "45", "32767", "0";
		status = "disabled";
		phandle = <0x73c>;
	};

	dual_loadswitch {
		compatible = "dual_loadswitch";
		status = "disabled";
		phandle = <0x73d>;
	};

	retail_demo_capacity_limit_control {
		max_cap_limit = "75";
		min_cap_limit = "55";
		phandle = <0x73e>;
	};

	charging_core {
		compatible = "huawei,charging_core";
		iin_weaksource = <0x1d6>;
		iin_usb = <0x1d6>;
		ichg_usb = <0x1f4>;
		iin_bc_usb = <0x5dc>;
		ichg_bc_usb = <0x578>;
		iin_nonstd = <0x4b0>;
		ichg_nonstd = <0x3e8>;
		iin_ac = <0x7d0>;
		ichg_ac = <0x834>;
		iin_vr = <0x3e8>;
		ichg_vr = <0x3e8>;
		iin_fcp = <0x640>;
		ichg_fcp = <0x9c4>;
		iin_wireless = <0x514>;
		ichg_wireless = <0xbb8>;
		otg_curr = <0x5dc>;
		typec_support = <0x00>;
		high_temp_limit = <0x01>;
		iterm = <0x88>;
		segment_type = <0x02>;
		vdpm_control_type = <0x01>;
		vdpm_buf_limit = <0x64>;
		vdpm_para = "-32767", "4100", "4500", "50", "4150", "32767", "4625", "50";
		inductance_para = "-32767", "15", "1900", "0", "15", "32767", "1900", "0";
		status = "disabled";
		phandle = <0x73f>;
	};

	water_check {
		compatible = "huawei,water_check";
		status = "disabled";
		phandle = <0x740>;
	};

	huawei_batt_soh {
		compatible = "huawei,battery-soh";
		status = "ok";
		basp = <0x01>;
		asw = <0x00>;
		iscd = <0x00>;
		cfsd = <0x00>;
		icm = <0x00>;
		phandle = <0x741>;
	};

	wireless_tx_auth {
		compatible = "huawei, wireless_tx_auth";
		status = "disabled";
		phandle = <0x742>;
	};

	ffc_control {
		compatible = "huawei,ffc_control";
		status = "disabled";
		phandle = <0x743>;
	};

	battery_1s2p {
		compatible = "huawei,battery_1s2p";
		volt_th_dischg = <0xdac 0xed8 0x1004>;
		volt_th_chg = <0xd48 0xe74 0x1068>;
		cap_ratio_0 = <0x1f4>;
		weight_factor_dischg_0 = <0x3e8 0x3e8 0x3e8 0x3e8>;
		weight_factor_chg_0 = <0x3e8 0x3e8 0x3e8 0x3e8>;
		cap_ratio_1 = <0x1f4>;
		weight_factor_dischg_1 = <0x3e8 0x3e8 0x3e8 0x3e8>;
		weight_factor_chg_1 = <0x3e8 0x3e8 0x3e8 0x3e8>;
		status = "disabled";
		phandle = <0x744>;
	};

	battery_charge_balance {
		compatible = "huawei,battery_charge_balance";
		status = "disabled";
		phandle = <0x745>;
	};

	multi_bat_check {
		compatible = "huawei,multi_bat_check";
		status = "disable";
		phandle = <0x746>;
	};

	battery_fault {
		compatible = "huawei,battery_fault";
		status = "disabled";
		phandle = <0x747>;
	};

	battery_fault_notify {
		compatible = "huawei,battery_fault_notify";
		status = "disabled";
		phandle = <0x748>;
	};

	ship_mode {
		compatible = "huawei,ship_mode";
		status = "disabled";
		phandle = <0x749>;
	};

	charge_mode_test {
		compatible = "huawei,charge_mode_test";
		status = "disabled";
		phandle = <0x74a>;
	};

	power_gpio_misc {
		compatible = "huawei,power_gpio_misc";
		status = "disabled";
		phandle = <0x74b>;
	};

	buck_boost {
		compatible = "huawei, buck_boost";
		status = "disabled";
		phandle = <0x74c>;
	};

	low_power {
		compatible = "huawei,low_power";
		status = "disabled";
		phandle = <0x74d>;
	};

	battery_ocv {
		compatible = "huawei,battery_ocv";
		status = "disabled";
		phandle = <0x74e>;
	};

	huawei_accessory {
		compatible = "huawei,accessory";
		status = "disabled";
		phandle = <0x74f>;
	};

	battery_cccv {
		compatible = "huawei,battery_cccv";
		status = "disabled";
		phandle = <0x750>;
	};

	xpmic_regulators {
		compatible = "huawei,xpmic-regulator";
		phandle = <0x751>;

		xpmic_ldo1 {
			regulator-name = "xpmic_ldo1";
			regulator-min-microvolt = <0x113640>;
			regulator-max-microvolt = <0x113640>;
			phandle = <0x752>;
		};

		xpmic_ldo2 {
			regulator-name = "xpmic_ldo2";
			regulator-min-microvolt = <0x120160>;
			regulator-max-microvolt = <0x149970>;
			phandle = <0x753>;
		};

		xpmic_ldo3 {
			regulator-name = "xpmic_ldo3";
			regulator-min-microvolt = <0x2b7cd0>;
			regulator-max-microvolt = <0x2b7cd0>;
			phandle = <0x754>;
		};

		xpmic_ldo4 {
			regulator-name = "xpmic_ldo4";
			regulator-min-microvolt = <0x2b7cd0>;
			regulator-max-microvolt = <0x2b7cd0>;
			phandle = <0x755>;
		};

		xpmic_ldo5 {
			regulator-name = "xpmic_ldo5";
			regulator-min-microvolt = <0x30d400>;
			regulator-max-microvolt = <0x30d400>;
			phandle = <0x756>;
		};

		xpmic_ldo6 {
			regulator-name = "xpmic_ldo6";
			regulator-min-microvolt = <0x30d400>;
			regulator-max-microvolt = <0x30d400>;
			phandle = <0x757>;
		};

		xpmic_ldo7 {
			regulator-name = "xpmic_ldo7";
			regulator-min-microvolt = <0x30d400>;
			regulator-max-microvolt = <0x30d400>;
			phandle = <0x758>;
		};
	};

	huawei_smpl {
		compatible = "huawei,smpl";
		status = "disable";
		phandle = <0x759>;
	};

	huawei_batt_info {
		#address-cells = <0x01>;
		#size-cells = <0x00>;
		compatible = "huawei,battery-information";
		sn-version = <0x01>;
		sn-check-type = <0x01>;
		shield_ct_sign = <0x00>;
		status = "disabled";
		can_check_in_running = <0x00>;
		phandle = <0x75a>;

		battery_checker@0 {
			compatible = "huawei,battery-authentication";
			matchable = <0x191>;
			id-in-grp = [01];
			chks-in-grp = [01];
			id-of-grp = [01];
			free-cycles = <0x0a>;
			sn-check-type = <0x00>;
			status = "ok";
			phandle = <0x75b>;
		};

		battery_checker@1 {
			compatible = "huawei,battery-authentication";
			id-in-grp = [02];
			chks-in-grp = [02];
			id-of-grp = [01];
			free-cycles = <0x0a>;
			sn-check-type = <0x00>;
			status = "disabled";
			phandle = <0x75c>;
		};

		battery_checker@2 {
			compatible = "huawei,battery-authentication";
			id-in-grp = [03];
			chks-in-grp = [03];
			id-of-grp = [01];
			free-cycles = <0x0a>;
			sn-check-type = <0x00>;
			status = "disabled";
			phandle = <0x75d>;
		};
	};

	battery_ct_debug {
		compatible = "huawei,battery_ct_debug";
		status = "ok";
		phandle = <0x75e>;
	};

	ds28el15 {
		compatible = "maxim,onewire-sha";
		phy-ctrl = <0x192>;
		rom-id-length = <0x08>;
		block-number = <0x04>;
		block-size = <0x10>;
		personality-length = <0x04>;
		sram-length = <0x20>;
		page-number = <0x02>;
		page-size = <0x20>;
		mac-length = <0x20>;
		reset-time-request = <0xfa00 0x2328 0xbb80>;
		write-time-request = <0x5dc 0x2904 0x1770>;
		read-time-request = <0x5dc 0x30d4>;
		program-time = <0x0a>;
		secret-program-time = <0xc8>;
		compute-mac-time = <0x03>;
		sn-page = <0x01>;
		sn-offset-bits = <0x08>;
		status = "disabled";
		phandle = <0x191>;
	};

	ds28el16 {
		compatible = "maxim,onewire-sha3";
		phy-ctrl = <0x192>;
		rom-id-length = <0x08>;
		block-number = <0x04>;
		block-size = <0x10>;
		page-number = <0x04>;
		page-size = <0x10>;
		mac-length = <0x20>;
		reset-time-request = <0xfa00 0x2328 0xbb80>;
		write-time-request = <0x5dc 0x2904 0x1770>;
		read-time-request = <0x5dc 0x30d4>;
		read-page-time = <0x05>;
		programe-time = <0x3c>;
		write-status-time = <0x0f>;
		compute-mac-time = <0x0f>;
		sn-page = <0x01>;
		sn-offset-bits = <0x08>;
		check-key-page-stauts = <0x01>;
		status = "disabled";
		phandle = <0x75f>;
	};

	richtek {
		compatible = "richtek,onewire-sha3";
		phy-ctrl = <0x192>;
		device-id-length = <0x04>;
		rom-id-length = <0x08>;
		sn-length = <0x10>;
		batt-type-length = <0x02>;
		status-length = <0x02>;
		work-challenge-length = <0x20>;
		work-secret-length = <0x20>;
		root-challenge-length = <0x18>;
		mac-length = <0x20>;
		mac-datum-length = <0x60>;
		reset-time-request = <0x88b8 0x00 0x445c>;
		write-time-request = <0x1b58 0x36b0 0xfa0>;
		read-time-request = <0xfa0 0x32c8 0x3a98>;
		transport_bit_order = <0x01>;
		status = "disabled";
		phandle = <0x760>;
	};

	a1007_1 {
		compatible = "NXP,A1007,ECC";
		phy-ctrl = <0x193>;
		sn-len = [12];
		addr = [a0];
		status = "disabled";
		phandle = <0x761>;
	};

	a1007_2 {
		compatible = "NXP,A1007,ECC";
		phy-ctrl = <0x194>;
		sn-len = [12];
		addr = [a0];
		status = "disabled";
		phandle = <0x762>;
	};

	gpio_pl061_ctrl {
		compatible = "onewire-phy,pl061,gpio";
		status = "disabled";
		phandle = <0x192>;
	};

	gpio_pl061_ctrl_v2_1 {
		compatible = "onewire-phy-v2,pl061,gpio";
		status = "disabled";
		phandle = <0x193>;
	};

	gpio_pl061_ctrl_v2_2 {
		compatible = "onewire-phy-v2,pl061,gpio";
		status = "disabled";
		phandle = <0x194>;
	};

	sle95250 {
		compatible = "infineon,sle95250";
		status = "disabled";
		phandle = <0x763>;
	};

	ns3300 {
		compatible = "nationstech,ns3300";
		status = "disabled";
		phandle = <0x764>;
	};

	fm1230 {
		compatible = "fdw,fm1230";
		ow_reset_start_delay = <0x12c>;
		ow_reset_sample_delay = <0x0a>;
		ow_reset_end_delay = <0x3c>;
		ow_write_start_delay = <0x02>;
		ow_write_low_delay = <0x35>;
		ow_write_high_delay = <0x06>;
		ow_write_end_delay = <0x32>;
		ow_read_start_delay = <0x04>;
		ow_read_sample_delay = <0x09>;
		ow_read_end_delay = <0x64>;
		ic_index = <0x00>;
		status = "disabled";
		phandle = <0x765>;
	};

	fm1230_1 {
		compatible = "fdw,fm1230";
		ow_reset_start_delay = <0x12c>;
		ow_reset_sample_delay = <0x0a>;
		ow_reset_end_delay = <0x3c>;
		ow_write_start_delay = <0x02>;
		ow_write_low_delay = <0x35>;
		ow_write_high_delay = <0x06>;
		ow_write_end_delay = <0x32>;
		ow_read_start_delay = <0x04>;
		ow_read_sample_delay = <0x09>;
		ow_read_end_delay = <0x64>;
		ic_index = <0x01>;
		status = "disabled";
		phandle = <0x766>;
	};

	fm1230_2 {
		compatible = "fdw,fm1230";
		ow_reset_start_delay = <0x12c>;
		ow_reset_sample_delay = <0x0a>;
		ow_reset_end_delay = <0x3c>;
		ow_write_start_delay = <0x02>;
		ow_write_low_delay = <0x35>;
		ow_write_high_delay = <0x06>;
		ow_write_end_delay = <0x32>;
		ow_read_start_delay = <0x04>;
		ow_read_sample_delay = <0x09>;
		ow_read_end_delay = <0x64>;
		ic_index = <0x02>;
		status = "disabled";
		phandle = <0x767>;
	};

	fm1230_swi {
		compatible = "fdw,fm1230_swi";
		status = "disabled";
		phandle = <0x768>;
	};

	t91407 {
		compatible = "tmc,t91407";
		ow_tau_delay = <0x32>;
		status = "disabled";
		phandle = <0x769>;
	};

	t91407_1 {
		compatible = "tmc,t91407";
		ow_tau_delay = <0x32>;
		status = "disabled";
		phandle = <0x76a>;
	};

	huawei_ptst {
		compatible = "huawei,power_test";
		dc_mmi = <0x01>;
		wlc_wp_para = <0xbb8 0x1388 0x01>;
		status = "ok";
		phandle = <0x76b>;
	};

	BCYCAE_10000_snCA_4500_65 {
		phandle = <0x76c>;
	};

	BCYCAE_2135_snCA_4485_15 {
		phandle = <0x76d>;
	};

	BCYCAE_2270_snCA_4485_15 {
		phandle = <0x76e>;
	};

	BCYCAE_2565_snCA_4485_15 {
		phandle = <0x76f>;
	};

	BCYCAE_2690_snCA_4485_15 {
		phandle = <0x770>;
	};

	BCYCAE_4500_39k_4500_10 {
		phandle = <0x771>;
	};

	BCYCAE_4500_snCA_4500_10 {
		phandle = <0x772>;
	};

	BCYCAE_4900_snCA_4500_10 {
		phandle = <0x773>;
	};

	BCYCAE_4950_snCA_4500_10 {
		phandle = <0x774>;
	};

	BCYCDE_4800_snCW_4500_35 {
		phandle = <0x775>;
	};

	BCYCGL_4950_snCG_4500_10 {
		phandle = <0x776>;
	};

	BITCAE_2135_snIA_4485_15 {
		phandle = <0x777>;
	};

	BITCAE_2270_snIA_4485_15 {
		phandle = <0x778>;
	};

	BITCAE_2565_snIA_4485_15 {
		phandle = <0x779>;
	};

	BITCAE_2690_snIA_4485_15 {
		phandle = <0x77a>;
	};

	BITCAE_4900_snIA_4500_10 {
		phandle = <0x77b>;
	};

	BITCAE_8700_snIA_4480_50 {
		phandle = <0x77c>;
	};

	BITCDE_10000_snIW_4500_65 {
		phandle = <0x77d>;
	};

	BITCDE_4650_snIW_4490_30 {
		phandle = <0x77e>;
	};

	BITCGL_8200_10k_4480_25 {
		phandle = <0x77f>;
	};

	BITCGL_8200_snIG_4480_25 {
		phandle = <0x780>;
	};

	BNTCAE_1250_snNA_4496_35 {
		phandle = <0x781>;
	};

	BNTCAE_1710_snNA_4515_15_ZV3000 {
		phandle = <0x782>;
	};

	BNTCAE_3790_snNA_4515_15_ZV3000 {
		phandle = <0x783>;
	};

	BNTCAE_4650_snNA_4490_35 {
		phandle = <0x784>;
	};

	BNTCAE_4800_snNA_4500_35 {
		phandle = <0x785>;
	};

	BCYCAE_4800_snCA_4500_35 {
		phandle = <0x786>;
	};

	BNTCAE_4950_snNA_4500_10 {
		phandle = <0x787>;
	};

	BNTCAE_5150_snNA_4500_10 {
		phandle = <0x788>;
	};

	BNTCAE_8200_22k_4480_10 {
		phandle = <0x789>;
	};

	BNTCAE_8200_snNA_4480_10 {
		phandle = <0x78a>;
	};

	BNTCGL_4500_22k_4500_10 {
		phandle = <0x78b>;
	};

	BNTCGL_4500_snNG_4500_10 {
		phandle = <0x78c>;
	};

	BNTCWL_8700_snNW_4480_50 {
		phandle = <0x78d>;
	};

	BYTCAE_1250_snYA_4496_35 {
		phandle = <0x78e>;
	};

	default_3000_68k_4352 {
		pc_temp_ocv_ocv = <0x10e6 0x10e5 0x10e2 0x10dd 0x10d7 0x10d1 0x1080 0x108f 0x1096 0x109e 0x1099 0x1095 0x103c 0x1052 0x105a 0x1064 0x1061 0x105d 0xffa 0x1019 0x1024 0x102e 0x102a 0x1026 0xfc9 0xfe9 0xff2 0xffa 0xff6 0xff3 0xf7f 0xfab 0xfc2 0xfca 0xfc6 0xfc3 0xf4d 0xf6f 0xf88 0xf9d 0xf9a 0xf97 0xf26 0xf43 0xf59 0xf75 0xf73 0xf70 0xf03 0xf1c 0xf2d 0xf4a 0xf4b 0xf4a 0xee7 0xef9 0xf09 0xf19 0xf19 0xf17 0xed9 0xee0 0xeed 0xefb 0xefb 0xefa 0xecc 0xed4 0xed5 0xee5 0xee4 0xee4 0xebe 0xeca 0xec9 0xed2 0xed2 0xed1 0xeb0 0xec0 0xec1 0xec3 0xec4 0xec2 0xea2 0xeb1 0xeb8 0xeb7 0xeb5 0xeb2 0xe94 0xe9c 0xea9 0xeaa 0xea3 0xe99 0xe84 0xe88 0xe92 0xe96 0xe8e 0xe84 0xe73 0xe76 0xe74 0xe79 0xe73 0xe68 0xe57 0xe64 0xe5d 0xe60 0xe5a 0xe50 0xe4e 0xe5d 0xe59 0xe5f 0xe58 0xe4e 0xe45 0xe57 0xe55 0xe5d 0xe57 0xe4c 0xe38 0xe50 0xe50 0xe59 0xe54 0xe49 0xe2a 0xe46 0xe4a 0xe53 0xe4f 0xe44 0xe16 0xe35 0xe3d 0xe42 0xe42 0xe36 0xdfa 0xe19 0xe22 0xe1b 0xe1e 0xe14 0xdd4 0xdee 0xdf3 0xde2 0xde8 0xde1 0xd9a 0xdac 0xdae 0xd96 0xda2 0xd9e 0xd3d 0xd47 0xd4b 0xd23 0xd3b 0xd3b 0xc80 0xc80 0xc80 0xc80 0xc80 0xc80>;
		pc_temp_ocv_percent = <0x64 0x5f 0x5a 0x55 0x50 0x4b 0x46 0x41 0x3c 0x37 0x32 0x2d 0x28 0x23 0x1e 0x19 0x14 0x0f 0x0a 0x09 0x08 0x07 0x06 0x05 0x04 0x03 0x02 0x01>;
		pc_temp_ocv_cols = <0x06>;
		pc_temp_ocv_rows = <0x1d>;
		rbatt_sf_sf = <0x7b3 0x378 0x1cb 0x96 0x79 0x70 0x7b2 0x378 0x1cb 0x96 0x79 0x70 0x72f 0x391 0x1d8 0x98 0x7b 0x71 0x6b1 0x398 0x1ea 0x9c 0x7d 0x73 0x68c 0x3af 0x1f8 0xa1 0x80 0x74 0x607 0x37f 0x214 0xaa 0x84 0x76 0x5ed 0x345 0x1e9 0xb5 0x89 0x79 0x5eb 0x33f 0x1d6 0xc7 0x94 0x7f 0x5ec 0x338 0x1c0 0xc8 0xa0 0x89 0x5fb 0x337 0x1b5 0x9b 0x81 0x74 0x64b 0x34f 0x1b2 0x96 0x7b 0x72 0x6b2 0x399 0x1a6 0x97 0x7c 0x73 0x726 0x3ff 0x1c0 0x9b 0x80 0x75 0x7a2 0x47c 0x1f3 0x9e 0x86 0x78 0x823 0x504 0x240 0x9f 0x84 0x7a 0x8b6 0x58e 0x298 0x9d 0x7d 0x72 0x96a 0x635 0x2fe 0x9a 0x7a 0x71 0xa61 0x700 0x373 0x9f 0x7b 0x71 0xe4a 0x7cc 0x3d7 0xa1 0x80 0x75 0x1181 0x85d 0x39c 0xa1 0x81 0x77 0x1366 0x958 0x3df 0x9f 0x7f 0x74 0x153a 0xa64 0x447 0xa6 0x7f 0x74 0x1752 0xb75 0x4cd 0xa8 0x82 0x76 0x198d 0xcb4 0x566 0xac 0x81 0x76 0x1c15 0xe0a 0x5e5 0xaf 0x81 0x75 0x1f2c 0xf9a 0x685 0xb7 0x84 0x77 0x22d3 0x119f 0x79a 0xca 0x88 0x78 0x27d6 0x1484 0x93d 0x117 0x8f 0x7a>;
		rbatt_sf_percent = <0x64 0x5f 0x5a 0x55 0x50 0x4b 0x46 0x41 0x3c 0x37 0x32 0x2d 0x28 0x23 0x1e 0x19 0x14 0x0f 0x0a 0x09 0x08 0x07 0x06 0x05 0x04 0x03 0x02 0x01>;
		rbatt_sf_cols = <0x06>;
		rbatt_sf_rows = <0x1c>;
		pc_sf_sf = <0x64>;
		pc_sf_percent = <0x64>;
		pc_sf_row_entries = <0x00>;
		pc_sf_cols = <0x01>;
		pc_sf_rows = <0x01>;
		fcc_sf_cols = <0x0b>;
		fcc_sf_y = <0x64 0x60 0x5e 0x5c 0x5a 0x58 0x57 0x54 0x51 0x4b 0x32>;
		fcc_sf_x = <0x00 0x64 0xc8 0x12c 0x190 0x1f4 0x258 0x2bc 0x320 0x3e8 0x5dc>;
		fcc_temp = <0xbbf 0xbc2 0xbbd 0xbce 0xbca 0xbb4>;
		batt_brand = "default";
		segment_para = "-32767", "4150", "3000", "4208", "50", "4150", "4450", "2100", "4352", "0";
		vbat_para = "-32767", "3400", "-1", "820", "0", "3400", "32767", "-1", "-1", "0";
		temp_para = "-32767", "0", "-1", "0", "4100", "0", "0", "5", "-1", "300", "4352", "0", "5", "10", "-1", "900", "4352", "3", "10", "45", "-1", "-1", "4352", "3", "45", "50", "-1", "1050", "4100", "3", "50", "32767", "-1", "0", "4100", "0";
		vbat_max = <0x1100>;
		id_voltage_max = <0x857>;
		id_voltage_min = <0x7a4>;
		id_identify_max = <0x8e9>;
		id_identify_min = <0x6df>;
		identify_type = "id_volt";
		default_rbatt_mohm = <0x64>;
		fcc = <0xbb8>;
		phandle = <0x78f>;
	};

	huawei_lga_check {
		compatible = "huawei,lga_check";
		status = "disabled";
		phandle = <0x790>;
	};

	drg {
		compatible = "dual-rail-gov";
		phandle = <0x791>;

		drg0 {
			divider-cells = <0x01>;
			drg-master = <0xee 0x20ce70 0xef 0x25f2d8>;
			drg-slave = <0xed 0xa3160 0x195 0x83590>;
			down_limit_enable;
			thermal_enable;
		};

		drg1 {
			divider-cells = <0x01>;
			drg-master = <0xef 0x25f2d8>;
			drg-slave = <0xed 0x13a358 0xee 0x1ed2a0>;
			up_limit_enable;
			thermal_enable;
		};

		drg2 {
			divider-cells = <0x01>;
			drg-master = <0xef 0x27fa60>;
			drg-slave = <0x195 0x1312d0>;
			down_limit_enable;
			thermal_enable;
			user_mode_enable;
		};

		drg3 {
			divider-cells = <0x03>;
			drg-master = <0xee 0x10d881 0x1437c9 0x17f4d1>;
			drg-slave = <0xed 0xd2f01 0xf8891 0x13a359>;
			up_limit_enable;
			thermal_enable;
		};

		drg4 {
			divider-cells = <0x01>;
			drg-master = <0xee 0xa8f21>;
			drg-slave = <0xed 0xa3161>;
			up_limit_enable;
			thermal_enable;
		};
	};

	hisi,lb@E8F00000 {
		compatible = "hisilicon,hisi-lb";
		reg = <0x00 0xe8f00000 0x00 0x10000>;
		interrupts = <0x00 0x179 0x04 0x00 0x177 0x04>;
		interrupt-names = "cmd-intr", "dfx-intr";
		max-quota = <0x2000>;
		max-size = <0x400000>;
		support-bypass = <0x01>;
		plc-num = <0x0f>;
		slc-idx = <0x04>;
		way-en = <0xffff>;

		bypass {
			lb-name = "bypass";
			lb-pid = <0x00>;
			lb-prio = <0x70>;
			lb-gid = <0x00>;
			lb-stat = <0x25>;
			lb-quota = " ", " ";
			lb-alloc = <0x00>;
			lb-plc = <0x905>;
			lb-flow = <0x01>;
		};

		opencl_policy {
			lb-name = "opencl";
			lb-pid = <0x01>;
			lb-prio = <0x30>;
			lb-gid = <0x01>;
			lb-stat = <0x55>;
			lb-quota = " ", " ";
			lb-alloc = <0x00>;
			lb-plc = <0x905>;
			lb-flow = <0x00>;
		};

		gpufbo_policy {
			lb-name = "gpu-fbo";
			lb-pid = <0x02>;
			lb-prio = <0x60>;
			lb-gid = <0x02>;
			lb-stat = <0x75>;
			lb-quota = " ", " ";
			lb-alloc = <0x00>;
			lb-plc = <0x2905>;
			lb-flow = <0x00>;
		};

		gputxt_policy {
			lb-name = "gpu-texture";
			lb-pid = <0x03>;
			lb-prio = <0x60>;
			lb-gid = <0x03>;
			lb-stat = <0x75>;
			lb-quota = " ", " ";
			lb-alloc = <0x00>;
			lb-plc = <0x2905>;
			lb-flow = <0x00>;
		};

		idisplay_policy {
			lb-name = "idle-display";
			lb-pid = <0x04>;
			lb-prio = <0x40>;
			lb-gid = <0x04>;
			lb-stat = <0x55>;
			lb-quota = " ", " ";
			lb-alloc = <0x00>;
			lb-plc = <0xc01>;
			lb-flow = <0x00>;
		};

		npu_policy {
			lb-name = "npu";
			lb-pid = <0x05>;
			lb-prio = <0x50>;
			lb-gid = <0x01>;
			lb-stat = <0x75>;
			lb-quota = " ", " ";
			lb-alloc = <0x00>;
			lb-plc = <0xb05>;
			lb-flow = <0x00>;
		};

		gpupool_policy {
			lb-name = "gpu-pool";
			lb-pid = <0x06>;
			lb-prio = <0x60>;
			lb-gid = <0x06>;
			lb-stat = <0x75>;
			lb-quota = " ", " ";
			lb-alloc = <0x00>;
			lb-plc = <0x904>;
			lb-flow = <0x00>;
		};

		imap_policy {
			lb-name = "cam-imap";
			lb-pid = <0x07>;
			lb-prio = <0x25>;
			lb-gid = <0x07>;
			lb-stat = <0x55>;
			lb-quota = " ", " ";
			lb-alloc = <0x00>;
			lb-plc = <0xc05>;
			lb-flow = <0x00>;
		};

		tiny_policy {
			lb-name = "tiny";
			lb-pid = <0x08>;
			lb-prio = <0x10>;
			lb-gid = <0x0e>;
			lb-stat = <0x29>;
			lb-quota = " ", " ";
			lb-alloc = <0x00>;
			lb-plc = <0xc05>;
			lb-flow = <0x00>;
		};

		audio_policy {
			lb-name = "audio";
			lb-pid = <0x09>;
			lb-prio = <0x10>;
			lb-gid = <0x0f>;
			lb-stat = <0x89>;
			lb-quota = " ", " ";
			lb-alloc = <0x00>;
			lb-plc = <0xc05>;
			lb-flow = <0x00>;
		};

		voice_policy {
			lb-name = "voice";
			lb-pid = <0x0a>;
			lb-prio = <0x10>;
			lb-gid = <0x0d>;
			lb-stat = <0x89>;
			lb-quota = " ", " ";
			lb-alloc = <0x00>;
			lb-plc = <0x905>;
			lb-flow = <0x00>;
		};

		ispnn_policy {
			lb-name = "ispnn";
			lb-pid = <0x0b>;
			lb-prio = <0x99>;
			lb-gid = <0x04>;
			lb-stat = <0x55>;
			lb-quota = " ", " ";
			lb-alloc = <0x00>;
			lb-plc = <0xc05>;
			lb-flow = <0x00>;
		};

		hifi_policy {
			lb-name = "hifi";
			lb-pid = <0x0c>;
			lb-prio = <0x65>;
			lb-gid = <0x0c>;
			lb-stat = <0x29>;
			lb-quota = <0x10001000>;
			lb-alloc = <0x00>;
			lb-plc = <0x905>;
			lb-flow = <0x00>;
		};

		isppipe_policy {
			lb-name = "isppipe";
			lb-pid = <0x0d>;
			lb-prio = <0x20>;
			lb-gid = <0x08>;
			lb-stat = <0x55>;
			lb-quota = <0x2000200>;
			lb-alloc = <0x00>;
			lb-plc = <0xc05>;
			lb-flow = <0x00>;
		};

		video_policy {
			lb-name = "venc";
			lb-pid = <0x0e>;
			lb-prio = <0x50>;
			lb-gid = <0x05>;
			lb-stat = <0x55>;
			lb-quota = " ", " ";
			lb-alloc = <0x00>;
			lb-plc = <0x905>;
			lb-flow = <0x00>;
		};
	};

	hifi_virtual_voice_proxy {
		compatible = "hisilicon,virtual_voice_proxy";
		status = "ok";
		phandle = <0x792>;

		virtual_voice_proxy_extdev {
			compatible = "hisilicon,virtual_voice_proxy_extdev";
			status = "ok";
		};
	};

	target-cpu {
		efuse_cpu = "OneMoreThing5";
		compatible = "hisilicon,targetcpu";
		target_cpu = "kirin9000s";
		phandle = <0x793>;
	};

	cpufreq-bL {
		compatible = "arm,generic-bL-cpufreq";
		status = "ok";
		phandle = <0x794>;
	};

	idle-sleep {
		compatible = "hisilicon,idle-sleep";
		vote-addr = <0xfb21b410>;
		status = "ok";
	};

	psci {
		compatible = "arm,psci";
		method = "smc";
		cpu_suspend = <0xc4000001>;
		cpu_off = <0x84000002>;
		cpu_on = <0xc4000003>;
		system_off = <0x84000008>;
		system_reset = <0x84000009>;
		phandle = <0x795>;
	};

	menu-switch {
		compatible = "menu-switch";
		cpu-mask = <0xff0>;
		switch-profile = <0x51c98>;
	};

	fcm-idle {
		compatible = "fcm-idle";
		residency-us = <0x8fc>;
	};

	support-target {
		compatible = "hisilicon,supportedtarget";
		support_name = "kirin9000s", "OneMoreThing1", "OneMoreThing2", "OneMoreThing3", "OneMoreThing4", "OneMoreThing5", "OneMoreThing6", "OneMoreThing7";
		support_efuse = "true";
		phandle = <0x796>;
	};

	cpu_hwp_ctrl {
		compatible = "hisilicon,cpu-hwp-ctrl";
		status = "ok";
		nr-clusters = <0x03>;
		phandle = <0x797>;

		cpu-hwp-c2 {
			nr-reg = <0x07>;
			phandle = <0x17>;

			game-id0 {
				thread-data = <0x3000 0x41c000 0xe67d9550 0x5aa16e 0x854e5cc2 0x805cc280 0xb0426807 0x55000fff 0x11e00098 0xf524d2f6 0x00 0x6f4e4a00 0x4100 0x9c000000>;
			};

			game-id1 {
				thread-data = <0xb000 0x41df48 0xe67d9550 0x5aa16e 0x854e5cc2 0x805cc280 0xb0426807 0x55000fff 0x11e00098 0xf524d2f6 0x00 0x4f4e4a00 0x4100 0x9c000000>;
			};
		};
	};

	pmu {
		compatible = "arm,armv8-pmuv3";
		status = "ok";
		interrupts = <0x01 0x07 0x08>;
	};

	namtso_pmu@FF211000 {
		compatible = "hisi,namtso_pmu";
		#address-cells = <0x02>;
		#size-cells = <0x02>;
		reg = <0x00 0xff211000 0x00 0x1000>;
		interrupts = <0x00 0x118 0x04>;
		cpus = <0x18 0x19 0x1a 0x1b 0x1c 0x1d 0x1e 0x1f 0x20 0x21 0x22 0x23>;
		status = "ok";
		phandle = <0x798>;
	};

	ce-panic {
		compatible = "hisilicon,ce-panic";
		ce-panic = <0x01>;
	};

	ras_debug {
		compatible = "hisilicon,ras-debug";
		status = "ok";
	};

	cpu-little {
		compatible = "hisilicon,cpu-edac-ecc";
		status = "ok";
		mode-id = <0xd46>;
		nr-blocks = <0x01>;
		idx-blocks = <0x01>;
		misc-data-init = <0x7f7f 0x00>;
		poll-msec = <0x3e8>;
		access-type = <0x00>;

		little-irq-0 {
			interrupts = <0x00 0x10a 0x04 0x00 0xfb 0x04>;
			interrupt-names = "core0-fault-ecc", "core0-err-ecc";
			interrupt-affinity = <0x18>;
			cpu-id = <0x00>;
			dmd-id = <0x37257331 0x37257341>;
		};

		little-irq-1 {
			interrupts = <0x00 0x10b 0x04 0x00 0xfc 0x04>;
			interrupt-names = "core1-fault-ecc", "core1-err-ecc";
			interrupt-affinity = <0x19>;
			cpu-id = <0x01>;
			dmd-id = <0x37257332 0x37257342>;
		};

		little-irq-2 {
			interrupts = <0x00 0x10c 0x04 0x00 0xfd 0x04>;
			interrupt-names = "core2-fault-ecc", "core2-err-ecc";
			interrupt-affinity = <0x1a>;
			cpu-id = <0x02>;
			dmd-id = <0x37257333 0x37257343>;
		};

		little-irq-3 {
			interrupts = <0x00 0x10d 0x04 0x00 0xfe 0x04>;
			interrupt-names = "core3-fault-ecc", "core3-err-ecc";
			interrupt-affinity = <0x1b>;
			cpu-id = <0x03>;
			dmd-id = <0x37257334 0x37257344>;
		};
	};

	share_smt {
		compatible = "hisilicon,cpu-edac-ecc";
		status = "ok";
		mode-id = <0xd44>;
		nr-blocks = <0x04>;
		idx-blocks = <0x00 0x01 0x02 0x03>;
		misc-data-init = <0x7fff 0x00 0x7fff 0x00 0x7f 0x00 0x7fff 0x00>;
		poll-msec = <0x3e8>;
		access-type = <0x00>;

		middle-irq-0 {
			interrupts = <0x00 0x10e 0x04 0x00 0xff 0x04>;
			interrupt-names = "smt0-fault-ecc", "smt0-err-ecc";
			interrupt-affinity = <0x1c 0x1d>;
			cpu-id = <0x04>;
			dmd-id = <0x37257335 0x37257335 0x37257335 0x3725733d 0x37257345 0x37257345 0x37257345 0x3725734d>;
		};

		middle-irq-1 {
			interrupts = <0x00 0x110 0x04 0x00 0x101 0x04>;
			interrupt-names = "smt1-fault-ecc", "smt1-err-ecc";
			interrupt-affinity = <0x1e 0x1f>;
			cpu-id = <0x05>;
			dmd-id = <0x37257336 0x37257336 0x37257336 0x3725733e 0x37257346 0x37257346 0x37257346 0x3725734e>;
		};

		middle-irq-2 {
			interrupts = <0x00 0x112 0x04 0x00 0x103 0x04>;
			interrupt-names = "smt2-fault-ecc", "smt2-err-ecc";
			interrupt-affinity = <0x20 0x21>;
			cpu-id = <0x06>;
			dmd-id = <0x37257337 0x37257337 0x37257337 0x3725733f 0x37257347 0x37257347 0x37257347 0x3725734f>;
		};

		big-irq-0 {
			interrupts = <0x00 0x114 0x04 0x00 0x105 0x04>;
			interrupt-names = "smt3-fault-ecc", "smt3-err-ecc";
			interrupt-affinity = <0x22 0x23>;
			cpu-id = <0x07>;
			dmd-id = <0x37257338 0x37257338 0x37257338 0x37257340 0x37257348 0x37257348 0x37257348 0x37257350>;
		};
	};

	share_l2 {
		compatible = "hisilicon,cpu-edac-ecc";
		status = "ok";
		mode-id = <0x200>;
		nr-blocks = <0x01>;
		idx-blocks = <0x02>;
		misc-data-init = <0x7f7f 0x00>;
		poll-msec = <0x3e8>;
		access-type = <0x00>;

		l2-irq-0 {
			interrupts = <0x00 0x116 0x04 0x00 0x107 0x04>;
			interrupt-names = "cluster1-fault-ecc", "cluster1-err-ecc";
			interrupt-affinity = <0x18 0x19>;
			cpu-id = <0x00>;
			dmd-id = <0x37257339 0x37257349>;
		};

		l2-irq-1 {
			interrupts = <0x00 0x117 0x04 0x00 0x108 0x04>;
			interrupt-names = "cluster2-fault-ecc", "cluster2-err-ecc";
			interrupt-affinity = <0x1a 0x1b>;
			cpu-id = <0x01>;
			dmd-id = <0x3725733b 0x3725734b>;
		};
	};

	share_l3@FF212000 {
		compatible = "hisilicon,cpu-edac-ecc";
		status = "ok";
		mode-id = <0x300>;
		nr-blocks = <0x01>;
		idx-blocks = <0x00>;
		misc-data-init = <0x7f7f 0x00>;
		poll-msec = <0x3e8>;
		access-type = <0x01>;
		reg = <0x00 0xff212000 0x00 0x30>;
		phandle = <0x799>;

		l3-irq {
			interrupts = <0x00 0x109 0x04>;
			interrupt-names = "l3-fault-ecc";
			dmd-id = <0x37256e80 0x37257330>;
		};
	};

	hisi_battery {
		batt_name = <0x78f>;
		compatible = "hisilicon,battery";
		status = "ok";
		phandle = <0x79a>;
	};

	soh_core {
		compatible = "hisi,soh_core";
		acr_support = <0x01>;
		dcr_support = <0x01>;
		pd_ocv_support = <0x01>;
		soh_ovp_support = <0x00>;
		soh_ovh_thd = <0x1068 0x3c 0x10cc 0x37 0x10fe 0x32>;
		soh_ovl_thd = <0x1004 0x3c 0x1068 0x37 0x10cc 0x32>;
		soh_ovl_safe_thd = <0x1004 0x32>;
		soh_ovp_start_min_thd = <0x1e>;
		soh_pd_leak_standby_leakage_current = <0x00>;
		status = "disabled";
		phandle = <0x79b>;
	};

	eis_core_batt0 {
		compatible = "hisi,eis_core";
		batt_index = <0x00>;
		freq_support = <0x01>;
		time_support = <0x00>;
		wavelet_support = <0x00>;
		sample_mod = <0x00>;
		avg_freq_check = <0x00>;
		eacr_support = <0x00>;
		status = "disabled";
		phandle = <0x79c>;
	};

	eis_core_batt1 {
		compatible = "hisi,eis_core";
		batt_index = <0x01>;
		freq_support = <0x01>;
		time_support = <0x00>;
		wavelet_support = <0x00>;
		sample_mod = <0x00>;
		avg_freq_check = <0x00>;
		eacr_support = <0x00>;
		status = "disabled";
		phandle = <0x79d>;
	};

	eis_core_batt2 {
		compatible = "hisi,eis_core";
		batt_index = <0x02>;
		freq_support = <0x01>;
		time_support = <0x00>;
		wavelet_support = <0x00>;
		sample_mod = <0x00>;
		avg_freq_check = <0x00>;
		eacr_support = <0x00>;
		status = "disabled";
		phandle = <0x79e>;
	};

	hisi_soh_charger@1 {
		compatible = "hisi_soh_charger";
		scharger_acr_support = <0x01>;
		status = "disabled";
		phandle = <0x79f>;
	};

	huawei_batt_identify {
		compatible = "huawei,battery-identify";
		status = "disabled";
		phandle = <0x7a0>;
	};

	pd_dpm {
		compatible = "huawei,pd_dpm";
		tcp_name = "type_c_port0";
		switch_manual_enable = <0x01>;
		support_dp = <0x01>;
		abnormal_cc_detection = <0x00>;
		need_not_config_extra_pmic = <0x01>;
		status = "ok";
		phandle = <0x7a1>;
	};

	huawei_usb {
		compatible = "huawei,huawei_usb";
		maximum-speed = "unknown-speed";
		status = "disabled";
		phandle = <0x7a2>;
	};

	rt_pd_manager {
		compatible = "richtek,rt_pd_manager";
		status = "disabled";
		phandle = <0x7a3>;
	};

	huawei_usbvbus {
		pmic_vbus_attach_enable = <0x00>;
		compatible = "huawei,usbvbus";
		support_pd = <0x00>;
		support_dp = <0x01>;
		status = "ok";
		phandle = <0x7a4>;
	};

	devcheck {
		gps = <0x01>;
		bt = <0x01>;
		wifi = <0x01>;
		compatible = "huawei,dev_detect";
		touch_panel = <0x02>;
		compass = <0x01>;
		g_sensor = <0x01>;
		camera_main = <0x00>;
		camera_slave = <0x00>;
		keypad = <0x00>;
		aps = <0x00>;
		gyroscope = <0x01>;
		nfc = <0x01>;
		dc_dc = <0x01>;
		speaker = <0x00>;
		ofn = <0x00>;
		tps = <0x01>;
		l_sensor = <0x02>;
		charge = <0x01>;
		battery = <0x00>;
		nct = <0x00>;
		mhl = <0x00>;
		audience = <0x00>;
		irda = <0x00>;
		hand_sensor = <0x00>;
		usb_switch = <0x01>;
		pmu_dcdc = <0x00>;
		antenna_ctl = <0x00>;
		cpu_chip = <0x00>;
		airpress = <0x01>;
		handpress = <0x00>;
		fflash = <0x00>;
		vibrator_lra = <0x01>;
		typec = <0x00>;
		anc_max14744 = <0x00>;
		laser = <0x00>;
		camera_pmic = <0x00>;
		charge_loadswitch = <0x00>;
		buck_boost = <0x00>;
		coul = <0x00>;
		dtv = <0x00>;
		ap_color = <0x00>;
		charge_switchcap = <0x00>;
		step_hall = <0x00>;
		buck = <0x00>;
		antennaboard = <0x00>;
		battery_state = <0x00>;
		pmic = <0x00>;
		hc32l10_mcu = <0x00>;
		ext_gpio = <0x00>;
		g_sensor1 = <0x00>;
		gyroscope1 = <0x00>;
		g_sensor2 = <0x00>;
		gyroscope2 = <0x00>;
		status = "ok";
		phandle = <0x7a5>;
	};

	hwsim {
		compatible = "hw-sim-hardware";
		phandle = <0x7a6>;

		sim0 {
			compatible = "hw-sim-hardware0";
			status = "ok";
			sim_power_type = <0x01>;
			transfer_type = <0x01>;
			lv_shift_ctrl = <0x00 0x670 0x00>;
			sim_sd_reg_base_addr = <0xfb214000>;
			sim_sd_reg_base_offset = <0x400>;
			sim_reg_bit = <0x0f 0x01 0x00>;
		};

		sim1 {
			compatible = "hw-sim-hardware1";
			status = "ok";
			sim_power_type = <0x07>;
			transfer_type = <0x00>;
			lv_shift_ctrl = <0x00 0x670 0x00>;
			sim_sd_reg_base_addr = <0xfb214000>;
			sim_sd_reg_base_offset = <0x400>;
			sim_reg_bit = <0x0e 0x01 0x00>;
			sd_reg_bit = <0x0b 0x01 0x00>;
			sd_cmd_gpio = <0x196 0x01 0x00>;
			iocfg_base_adrr = <0xefb03000>;
			iomg_usim_offset = <0x24 0x28 0x2c>;
			iocg_usim_offset = <0x24 0x28 0x2c>;
			pad_iomg_base_addr = <0xefb04000>;
			pad_iomg_usim_offset = <0x24 0x28 0x2c>;
			pad_iocfg_base_addr = <0xefb04800>;
			pad_iocfg_usim_offset = <0x24 0x28 0x2c>;
			iocfg_sdbase_adrr = <0xefb03000>;
			iomg_sd_offset = <0x00 0x08 0x0c>;
			iocg_sd_offset = <0x00 0x08 0x0c>;
			pad_iomg_sdbase_addr = <0xefb04000>;
			pad_iomg_sd_offset = <0x00 0x08 0x0c>;
			pad_iocg_sdbase_addr = <0xefb04800>;
			pad_iocg_sd_offset = <0x00 0x08 0x0c>;
		};
	};

	charger_time_remaining {
		compatible = "hisilicon,charger_time";
		adjust_by_current = <0x00>;
		adjust_by_fcc = <0x00>;
		adjust_by_volt = <0x00>;
		adjust_by_temp = <0x00>;
		status = "ok";
		phandle = <0x7a7>;
	};

	sharevpu_sec_irq {
		compatible = "sharevpu-sec-irq";
		interrupts = <0x01 0x01 0x08>;
	};

	weaver_info {
		compatible = "none";
		weaver_keep_power_on_timeout = <0x0a>;
		weaver_limit = <0x1e>;
		weaver_flags = <0x04>;
		phandle = <0x7a8>;
	};

	rootparam {
		hisi,platformid = "111";
		hisi,chiptype = "baltimore";
		model = "HUAWEI Kirin 9000C";
		hisi,product_id = <0x2df5fc00>;
		hisi,modem_id = <0x2df5fc00>;
		dtbo_idx = <0x00>;
		compatible = "hisilicon,vendor";
		hisi,boardid = <0x01 0x03 0x03 0x00 0x01>;
		hisi,boardname = "ARMPC_PANGUX";
		phandle = <0x7a9>;
	};

	chosen {
		linux,uefi-mmap-desc-ver = <0x01>;
		linux,uefi-mmap-desc-size = <0x30>;
		linux,uefi-mmap-size = <0x1ad0>;
		linux,uefi-mmap-start = <0x00 0x40e90018>;
		linux,uefi-system-table = <0x00 0x5fff0018>;
		linux,initrd-end = <0x00 0x37377fdd>;
		linux,initrd-start = <0x00 0x36ae0000>;
		kaslr-seed = <0x00 0x00>;
		bootargs = " arm64.nobf16 androidboot.slot_suffix=_a mntn_switch=11110111111111101011111110100110001001001000001001 last_bootup_keypoint=97 reboot_reason=COLDBOOT exception_subtype=no tz_uefi_enable=1 dma_zone_only=true swiotlb=2 allow_file_spec_access=true spec_info=6 normal_reset_type=COLDBOOT initrd=initramfs-gentoo-5.10.97-arm64-desktop.img root=/dev/sdd3";
		phandle = <0x7aa>;
	};

	hm-overlay {
		phandle = <0x7ab>;
	};

	soc_spec {
		compatible = "hisilicon, soc_spec";
		soc_spec_set = "pc";
		soc_spec_priority = "efuse";
		phandle = <0x7ac>;
	};

	hisi_vibrator@FB210000 {
		phandle = <0x7ad>;
	};

	coul_core {
		status = "ok";
		phandle = <0x7ae>;
	};

	series_batt_charger {
		compatible = "huawei,series_batt_charger";
		status = "disabled";
		phandle = <0x7af>;
	};

	bq40z50_battery {
		phandle = <0x7b0>;
	};

	fastboot {
		motor-vib_type = <0xff>;
		jtagtosd-board-type = <0x02>;
		lpm3-board-type = <0x02>;
		uart-board-type = <0x01>;
		i2c3-pin = <0x00>;
		compatible = "hisilicon,fastboot";
		keypad-type = <0x02>;
		powerkey-type = <0x00>;
		phandle = <0x7b1>;
	};

	pmu@FFF34000 {
		status = "disabled";
		reg = <0x00 0xfff34000 0x00 0x1000>;
		compatible = "hisilicon,pmu";
		phandle = <0x7b2>;
	};

	sysctrl@0xFB21B000 {
		status = "ok";
		compatible = "hisilicon,sysctrl";
		reg = <0x00 0xfb21b000 0x00 0x1000>;
		phandle = <0x7b3>;
	};

	actrl@0xFB214000 {
		compatible = "hisilicon,actrl";
		reg = <0x00 0xfb214000 0x00 0x1000>;
		phandle = <0x7b4>;
	};

	pctrl@0xFF7CC000 {
		status = "ok";
		compatible = "hisilicon,pctrl";
		reg = <0x00 0xff7cc000 0x00 0x1000>;
		phandle = <0x7b5>;
	};

	resource_lock@0xFF7CB000 {
		compatible = "hisilicon,peri_resource_lock";
		reg = <0x00 0xff7cb000 0x00 0x1000>;
		phandle = <0x7b6>;
	};

	crgctrl@0xFFB85000 {
		status = "ok";
		compatible = "hisilicon,crgctrl";
		reg = <0x00 0xffb85000 0x00 0x1000>;
		phandle = <0x7b7>;
	};

	pmctrl@0xFFB81000 {
		status = "ok";
		compatible = "hisilicon,pmctrl";
		reg = <0x00 0xffb81000 0x00 0x1000>;
		phandle = <0x7b8>;
	};

	hsdt_crg@EE262000 {
		status = "ok";
		reg = <0x00 0xee262000 0x00 0x1000>;
		compatible = "hisilicon,hsdt_crg";
		phandle = <0x7b9>;
	};

	hsdt1_crg@EFB02000 {
		status = "ok";
		reg = <0x00 0xefb02000 0x00 0x1000>;
		compatible = "hisilicon,hsdt1_crg";
		phandle = <0x7ba>;
	};

	hsdt_sysctrl@EE264000 {
		status = "ok";
		reg = <0x00 0xee264000 0x00 0x1000>;
		compatible = "hisilicon,hsdt_sysctrl";
		phandle = <0x7bb>;
	};

	hsdt1_sysctrl@EFB00000 {
		status = "ok";
		reg = <0x00 0xefb00000 0x00 0x1000>;
		compatible = "hisilicon,hsdt1_sysctrl";
		phandle = <0x7bc>;
	};

	mmc0_crg@f8581000 {
		status = "ok";
		reg = <0x00 0xf8581000 0x00 0x1000>;
		compatible = "hisilicon,mmc0crg";
		phandle = <0x7bd>;
	};

	hsdt0_intr_hub@FF7CF000 {
		compatible = "hisilicon,hsdt0_intr_hub";
		reg = <0x00 0xff7cf000 0x00 0x1000>;
		status = "ok";
		phandle = <0x7be>;
	};

	media1ctrl@E8D01000 {
		status = "ok";
		reg = <0x00 0xe8d01000 0x00 0x1000>;
		compatible = "hisilicon,media1ctrl";
		phandle = <0x7bf>;
	};

	media2ctrl@E93F0000 {
		status = "ok";
		reg = <0x00 0xe93f0000 0x00 0x1000>;
		compatible = "hisilicon,media2ctrl";
		phandle = <0x7c0>;
	};

	hisi_axierr {
		status = "ok";
		interrupts = <0x00 0x17 0x04 0x00 0x01 0x04>;
		compatible = "hisi,hi3xxx-axi";
		phandle = <0x7c1>;
	};

	hisi_reset {
		status = "ok";
		compatible = "hisilicon,hi3xxx-reset";
		phandle = <0x7c2>;
	};

	uartctl {
		uartctl = "0001000F0F0F0F0F0F0F0F0F0F0F0F0F0F0F";
		compatible = "hisilicon,uartctl";
		phandle = <0x7c3>;
	};

	hisi_io_die {
		compatible = "hisilicon,io-die";
		status = "disabled";
		phandle = <0x7c4>;
	};

	hisi_gpio_key {
		status = "disabled";
		phandle = <0x7c5>;
	};

	hisi_pmic_gpio_key {
		status = "ok";
		compatible = "hisilicon,pmic-gpio-key";
		interrupt-parent = <0x120>;
		interrupts = <0x18 0x00 0x19 0x00 0x1a 0x00 0x1b 0x00>;
		interrupt-names = "vol-up-up", "vol-up-down", "vol-down-up", "vol-down-down";
		phandle = <0x7c6>;
	};

	panel_blpwm {
		status = "ok";
		fpga_flag = <0x00>;
		pinctrl-1 = <0x2cf 0x2d1 0x372 0x374>;
		pinctrl-0 = <0x2ce 0x2d0 0x371 0x373>;
		pinctrl-names = "default", "idle";
		clock-names = "clk_blpwm";
		clocks = <0x4ec>;
		reg = <0x00 0xfae75000 0x00 0x1000>;
		compatible = "hisilicon,dpublpwm";
		#size-cells = <0x02>;
		#address-cells = <0x02>;
		phandle = <0x7c7>;
	};

	huawei,lcd_panel {
		sec_lcd_panel_type = "310_c07_6p39";
		lcd_panel_type = "190_c07_7p847";
		product_type = <0x01>;
		product_id = <0xbb8>;
		lcd_id_match_tab = <0x09 0x02>;
		support_lcd_type = "BOE_NT37700P_AMOLED", "SHARP_NT36870_LCD";
		gpio_cfg_addr = <0xff811f18 0xefb04890>;
		gpio_id = <0x4a 0x167>;
		detect_type = <0x02>;
		compatible = "huawei,lcd_panel_type";
		phandle = <0x7c8>;
	};

	huawei,lcd_config {
		compatible = "simple-bus";
		phandle = <0x7c9>;

		lcd_kit_alta_190_c07_6p39 {
			phandle = <0x88e>;
			status = "ok";
			lcd-kit,backlight-cmds-state = "dsi_hs_mode";
			lcd-kit,backlight-cmds = <0x39 0x01 0x00 0x00 0x00 0x00 0x03 0x51 0x00 0x00>;
			lcd-kit,panel-off-cmds-state = "dsi_lp_mode";
			lcd-kit,panel-off-cmds = <0x15 0x01 0x00 0x00 0x00 0x00 0x02 0xfe 0x00 0x05 0x01 0x00 0x00 0x00 0x00 0x01 0x28 0x05 0x01 0x00 0x00 0x64 0x01 0x01 0x10>;
			lcd-kit,panel-on-cmds-state = "dsi_lp_mode";
			lcd-kit,panel-on-cmds = <0x15 0x01 0x00 0x40 0x00 0x00 0x02 0xfe 0x40 0x15 0x01 0x00 0x40 0x00 0x00 0x02 0x7d 0x40 0x15 0x01 0x00 0x40 0x00 0x00 0x02 0xfe 0x44 0x15 0x01 0x00 0x40 0x00 0x00 0x02 0xed 0x00 0x15 0x01 0x00 0x40 0x00 0x00 0x02 0xfe 0xb6 0x15 0x01 0x00 0x40 0x00 0x00 0x02 0x01 0xc1 0x15 0x01 0x00 0x40 0x00 0x00 0x02 0x02 0x10 0x15 0x01 0x00 0x40 0x00 0x00 0x02 0x03 0x10 0x15 0x01 0x00 0x40 0x00 0x00 0x02 0x04 0x10 0x15 0x01 0x00 0x40 0x00 0x00 0x02 0x05 0x1c 0x15 0x01 0x00 0x40 0x00 0x00 0x02 0x06 0x1c 0x15 0x01 0x00 0x40 0x00 0x00 0x02 0x07 0x1c 0x15 0x01 0x00 0x40 0x00 0x00 0x02 0xfe 0xd2 0x15 0x01 0x00 0x40 0x00 0x00 0x02 0x35 0x0f 0x15 0x01 0x00 0x40 0x00 0x00 0x02 0xfe 0x00 0x15 0x01 0x00 0x40 0x00 0x00 0x02 0x8a 0x13 0x39 0x01 0x00 0x40 0x00 0x00 0x03 0x44 0x08 0xc0 0x15 0x01 0x00 0x40 0x00 0x00 0x02 0xfa 0x01 0x15 0x01 0x00 0x40 0x00 0x00 0x02 0xc2 0x08 0x15 0x01 0x00 0x40 0x00 0x00 0x02 0x35 0x00 0x39 0x01 0x00 0x00 0x00 0x00 0x03 0x51 0x0f 0x0f 0x05 0x01 0x00 0x00 0x78 0x00 0x01 0x11 0x05 0x01 0x00 0x00 0x00 0x00 0x01 0x29>;
			lcd-kit,power-off-stage = <0x05 0x00 0x0a 0x0d 0x00 0x0a 0x01 0x00 0x02 0x09 0x00 0x03 0x02 0x00 0x05>;
			lcd-kit,lp-off-stage = <0x00 0x00 0x00>;
			lcd-kit,hs-off-stage = <0x06 0x00 0x78>;
			lcd-kit,hs-on-stage = <0x00 0x00 0x00>;
			lcd-kit,lp-on-stage = <0x05 0x01 0x05 0x05 0x00 0x05 0x05 0x01 0x23 0x06 0x01 0x00>;
			lcd-kit,power-on-stage = <0x0d 0x01 0x0a 0x02 0x01 0x05 0x09 0x01 0x05 0x01 0x01 0x14>;
			lcd-kit,lcd-mipi-switch = <0x02 0x14f 0x00>;
			lcd-kit,lcd-te0 = <0x02 0x41 0x00>;
			lcd-kit,lcd-reset = <0x02 0x48 0x00>;
			lcd-kit,lcd-vci = <0x02 0x150 0x00>;
			lcd-kit,lcd-vdd = <0x02 0x14e 0x00>;
			lcd-kit,lcd-iovcc = <0x02 0x1a 0x00>;
			lcd-kit,mipi-non-continue-enable = <0x01>;
			lcd-kit,mipi-burst-mode = <0x02>;
			lcd-kit,mipi-max-tx-esc-clk = <0x0a>;
			lcd-kit,mipi-vc = <0x00>;
			lcd-kit,mipi-phy-mode = <0x01>;
			lcd-kit,mipi-dsi-version = <0x00>;
			lcd-kit,mipi-color-mode = <0x05>;
			lcd-kit,mipi-lane-nums = <0x02>;
			lcd-kit,mipi-clk-post-adjust = <0xd7>;
			lcd-kit,mipi-dsi-upt-support = <0x00>;
			lcd-kit,panel-ifbc-type = <0x05>;
			lcd-kit,vesa-dsc-gen-rc-params = <0x01>;
			lcd-kit,vesa-dsc-line-buff-depth = <0x0b>;
			lcd-kit,vesa-dsc-pred-en = <0x01>;
			lcd-kit,vesa-slice-width = <0x21c>;
			lcd-kit,vesa-slice-height = <0x08>;
			lcd-kit,vesa-dsc-bpp = <0x08>;
			lcd-kit,vesa-dsc-bpc = <0x0a>;
			lcd-kit,vesa-dsc-format = <0x00>;
			lcd-kit,vesa-dsc-version = <0x00>;
			lcd-kit,panel-pxl-clk-div = <0x01>;
			lcd-kit,mipi-dsi-bit-clk = <0x288>;
			lcd-kit,panel-pxl-clk = <0xc0>;
			lcd-kit,mipi-v-front-porch = <0x10>;
			lcd-kit,mipi-v-back-porch = <0x10>;
			lcd-kit,mipi-v-sync-area = <0x04>;
			lcd-kit,mipi-dpi-h-size = <0xec>;
			lcd-kit,mipi-h-line-time = <0x112>;
			lcd-kit,mipi-h-back-porch = <0x0c>;
			lcd-kit,mipi-h-sync-area = <0x0a>;
			lcd-kit,te-index = <0x00>;
			lcd-kit,connector-num = <0x01>;
			lcd-kit,connector-id0 = <0x00>;
			lcd-kit,panel-vsyn-ctr-type = <0x00>;
			lcd-kit,panel-orientation = <0x01>;
			lcd-kit,panel-bgr-fmt = <0x00>;
			lcd-kit,panel-bpp = <0x00>;
			lcd-kit,panel-cmd-type = <0x1010>;
			lcd-kit,panel-height = <0x99>;
			lcd-kit,panel-width = <0x42>;
			lcd-kit,panel-yres = <0x9c8>;
			lcd-kit,panel-xres = <0x438>;
			lcd-kit,panel-type = <0x02>;
			lcd-kit,panel-name = "ALTA 190 C07 6.39' 1080 * 2504";
			compatible = "190_c07_6p39";
		};

		lcd_kit_alta_190_c07_7p847 {
			phandle = <0x88d>;
			status = "ok";
			lcd-kit,backlight-cmds-state = "dsi_hs_mode";
			lcd-kit,backlight-cmds = <0x39 0x01 0x00 0x00 0x00 0x00 0x03 0x51 0x00 0x00>;
			lcd-kit,panel-off-cmds-state = "dsi_lp_mode";
			lcd-kit,panel-off-cmds = <0x15 0x01 0x00 0x00 0x00 0x00 0x02 0xfe 0x00 0x05 0x01 0x00 0x00 0x00 0x00 0x01 0x28 0x05 0x01 0x00 0x00 0x64 0x01 0x01 0x10>;
			lcd-kit,panel-on-cmds-state = "dsi_lp_mode";
			lcd-kit,panel-on-cmds = <0x15 0x01 0x00 0x00 0x00 0x00 0x02 0xfe 0xd2 0x15 0x01 0x00 0x00 0x00 0x00 0x02 0x4f 0x08 0x15 0x01 0x00 0x00 0x00 0x00 0x02 0x50 0x11 0x15 0x01 0x00 0x00 0x00 0x00 0x02 0x51 0xab 0x15 0x01 0x00 0x00 0x00 0x00 0x02 0x52 0x30 0x15 0x01 0x00 0x00 0x00 0x00 0x02 0x53 0x08 0x15 0x01 0x00 0x00 0x00 0x00 0x02 0x54 0xb0 0x15 0x01 0x00 0x00 0x00 0x00 0x02 0x55 0x04 0x15 0x01 0x00 0x00 0x00 0x00 0x02 0x56 0xe0 0x15 0x01 0x00 0x00 0x00 0x00 0x02 0x58 0x00 0x15 0x01 0x00 0x00 0x00 0x00 0x02 0x59 0x10 0x15 0x01 0x00 0x00 0x00 0x00 0x02 0x5a 0x04 0x15 0x01 0x00 0x00 0x00 0x00 0x02 0x5b 0xe0 0x15 0x01 0x00 0x00 0x00 0x00 0x02 0x5c 0x02 0x15 0x01 0x00 0x00 0x00 0x00 0x02 0x5d 0x00 0x15 0x01 0x00 0x00 0x00 0x00 0x02 0x5e 0x20 0x15 0x01 0x00 0x00 0x00 0x00 0x02 0x5f 0x02 0x15 0x01 0x00 0x00 0x00 0x00 0x02 0x60 0x1d 0x15 0x01 0x00 0x00 0x00 0x00 0x02 0x61 0x00 0x15 0x01 0x00 0x00 0x00 0x00 0x02 0x62 0x11 0x15 0x01 0x00 0x00 0x00 0x00 0x02 0x63 0x0c 0x15 0x01 0x00 0x00 0x00 0x00 0x02 0x64 0x06 0x15 0x01 0x00 0x00 0x00 0x00 0x02 0x65 0x67 0x15 0x01 0x00 0x00 0x00 0x00 0x02 0x66 0x02 0x15 0x01 0x00 0x00 0x00 0x00 0x02 0x67 0xc0 0x15 0x01 0x00 0x00 0x00 0x00 0x02 0x68 0x18 0x15 0x01 0x00 0x00 0x00 0x00 0x02 0x69 0x00 0x15 0x01 0x00 0x00 0x00 0x00 0x02 0x6a 0x10 0x15 0x01 0x00 0x00 0x00 0x00 0x02 0x6b 0xf0 0x15 0x01 0x00 0x00 0x00 0x00 0x02 0x6c 0x07 0x15 0x01 0x00 0x00 0x00 0x00 0x02 0x6d 0x10 0x15 0x01 0x00 0x00 0x00 0x00 0x02 0x6e 0x20 0x15 0x01 0x00 0x00 0x00 0x00 0x02 0x6f 0x00 0x15 0x01 0x00 0x00 0x00 0x00 0x02 0x70 0x06 0x15 0x01 0x00 0x00 0x00 0x00 0x02 0x71 0x0f 0x15 0x01 0x00 0x00 0x00 0x00 0x02 0x72 0x0f 0x15 0x01 0x00 0x00 0x00 0x00 0x02 0x73 0x33 0x15 0x01 0x00 0x00 0x00 0x00 0x02 0x74 0x0e 0x15 0x01 0x00 0x00 0x00 0x00 0x02 0x75 0x1c 0x15 0x01 0x00 0x00 0x00 0x00 0x02 0x76 0x2a 0x15 0x01 0x00 0x00 0x00 0x00 0x02 0x77 0x38 0x15 0x01 0x00 0x00 0x00 0x00 0x02 0x78 0x46 0x15 0x01 0x00 0x00 0x00 0x00 0x02 0x79 0x54 0x15 0x01 0x00 0x00 0x00 0x00 0x02 0x7a 0x62 0x15 0x01 0x00 0x00 0x00 0x00 0x02 0x7b 0x69 0x15 0x01 0x00 0x00 0x00 0x00 0x02 0x7c 0x70 0x15 0x01 0x00 0x00 0x00 0x00 0x02 0x7d 0x77 0x15 0x01 0x00 0x00 0x00 0x00 0x02 0x7e 0x79 0x15 0x01 0x00 0x00 0x00 0x00 0x02 0x7f 0x7b 0x15 0x01 0x00 0x00 0x00 0x00 0x02 0x80 0x7d 0x15 0x01 0x00 0x00 0x00 0x00 0x02 0x81 0x7e 0x15 0x01 0x00 0x00 0x00 0x00 0x02 0x82 0x02 0x15 0x01 0x00 0x00 0x00 0x00 0x02 0x83 0x02 0x15 0x01 0x00 0x00 0x00 0x00 0x02 0x84 0x22 0x15 0x01 0x00 0x00 0x00 0x00 0x02 0x85 0x00 0x15 0x01 0x00 0x00 0x00 0x00 0x02 0x86 0x2a 0x15 0x01 0x00 0x00 0x00 0x00 0x02 0x87 0x40 0x15 0x01 0x00 0x00 0x00 0x00 0x02 0x88 0x2a 0x15 0x01 0x00 0x00 0x00 0x00 0x02 0x89 0xbe 0x15 0x01 0x00 0x00 0x00 0x00 0x02 0x8a 0x3a 0x15 0x01 0x00 0x00 0x00 0x00 0x02 0x8b 0xfc 0x15 0x01 0x00 0x00 0x00 0x00 0x02 0x8c 0x3a 0x15 0x01 0x00 0x00 0x00 0x00 0x02 0x8d 0xfa 0x15 0x01 0x00 0x00 0x00 0x00 0x02 0x8e 0x3a 0x15 0x01 0x00 0x00 0x00 0x00 0x02 0x8f 0xf8 0x15 0x01 0x00 0x00 0x00 0x00 0x02 0x90 0x3b 0x15 0x01 0x00 0x00 0x00 0x00 0x02 0x91 0x38 0x15 0x01 0x00 0x00 0x00 0x00 0x02 0x92 0x3b 0x15 0x01 0x00 0x00 0x00 0x00 0x02 0x93 0x78 0x15 0x01 0x00 0x00 0x00 0x00 0x02 0x94 0x3b 0x15 0x01 0x00 0x00 0x00 0x00 0x02 0x95 0xb6 0x15 0x01 0x00 0x00 0x00 0x00 0x02 0x96 0x4b 0x15 0x01 0x00 0x00 0x00 0x00 0x02 0x97 0xf6 0x15 0x01 0x00 0x00 0x00 0x00 0x02 0x98 0x4c 0x15 0x01 0x00 0x00 0x00 0x00 0x02 0x99 0x34 0x15 0x01 0x00 0x00 0x00 0x00 0x02 0x9a 0x4c 0x15 0x01 0x00 0x00 0x00 0x00 0x02 0x9b 0x74 0x15 0x01 0x00 0x00 0x00 0x00 0x02 0x9c 0x5c 0x15 0x01 0x00 0x00 0x00 0x00 0x02 0x9d 0x74 0x15 0x01 0x00 0x00 0x00 0x00 0x02 0x9e 0x8c 0x15 0x01 0x00 0x00 0x00 0x00 0x02 0x9f 0xf4 0x15 0x01 0x00 0x00 0x00 0x00 0x02 0xa2 0x04 0x15 0x01 0x00 0x00 0x00 0x00 0x02 0xa3 0xe0 0x15 0x01 0x00 0x00 0x00 0x00 0x02 0xa4 0x00 0x15 0x01 0x00 0x00 0x00 0x00 0x02 0xa5 0x00 0x15 0x01 0x00 0x00 0x00 0x00 0x02 0xa6 0x00 0x15 0x01 0x00 0x00 0x00 0x00 0x02 0xa7 0x00 0x15 0x01 0x00 0x00 0x00 0x00 0x02 0xa9 0x00 0x15 0x01 0x00 0x00 0x00 0x00 0x02 0xaa 0x00 0x15 0x01 0x00 0x00 0x00 0x00 0x02 0xa0 0x80 0x15 0x01 0x00 0x00 0x00 0x00 0x02 0xfe 0x98 0x15 0x01 0x00 0x00 0x00 0x00 0x02 0x14 0x01 0x15 0x01 0x00 0x00 0x00 0x00 0x02 0xfe 0x57 0x15 0x01 0x00 0x00 0x00 0x00 0x02 0xc2 0x00 0x15 0x01 0x00 0x00 0x00 0x00 0x02 0xfe 0x84 0x15 0x01 0x00 0x00 0x00 0x00 0x02 0xc3 0x80 0x15 0x01 0x00 0x00 0x00 0x00 0x02 0xfe 0x83 0x15 0x01 0x00 0x00 0x00 0x00 0x02 0x0c 0x4e 0x15 0x01 0x00 0x00 0x00 0x00 0x02 0x0d 0xfe 0x15 0x01 0x00 0x00 0x00 0x00 0x02 0x0e 0xee 0x15 0x01 0x00 0x00 0x00 0x00 0x02 0x0f 0xfe 0x15 0x01 0x00 0x00 0x00 0x00 0x02 0x10 0xfe 0x15 0x01 0x00 0x00 0x00 0x00 0x02 0x11 0xee 0x15 0x01 0x00 0x00 0x00 0x00 0x02 0x12 0xfe 0x15 0x01 0x00 0x00 0x00 0x00 0x02 0x13 0xfe 0x15 0x01 0x00 0x00 0x00 0x00 0x02 0x14 0xee 0x15 0x01 0x00 0x00 0x00 0x00 0x02 0x15 0xfe 0x15 0x01 0x00 0x00 0x00 0x00 0x02 0x16 0xfe 0x15 0x01 0x00 0x00 0x00 0x00 0x02 0x17 0xee 0x15 0x01 0x00 0x00 0x00 0x00 0x02 0x18 0xfe 0x15 0x01 0x00 0x00 0x00 0x00 0x02 0x19 0xfe 0x15 0x01 0x00 0x00 0x00 0x00 0x02 0x1a 0xee 0x15 0x01 0x00 0x00 0x00 0x00 0x02 0x1b 0xfe 0x15 0x01 0x00 0x00 0x00 0x00 0x02 0x1c 0xfe 0x15 0x01 0x00 0x00 0x00 0x00 0x02 0xfe 0x7e 0x15 0x01 0x00 0x00 0x00 0x00 0x02 0x50 0xee 0x15 0x01 0x00 0x00 0x00 0x00 0x02 0x51 0xfe 0x15 0x01 0x00 0x00 0x00 0x00 0x02 0x52 0xfe 0x15 0x01 0x00 0x00 0x00 0x00 0x02 0xfe 0xa1 0x15 0x01 0x00 0x00 0x00 0x00 0x02 0xcd 0x00 0x15 0x01 0x00 0x00 0x00 0x00 0x02 0xca 0x80 0x15 0x01 0x00 0x00 0x00 0x00 0x02 0xfe 0xd4 0x15 0x01 0x00 0x00 0x00 0x00 0x02 0x0d 0x00 0x15 0x01 0x00 0x00 0x00 0x00 0x02 0xfe 0xb6 0x15 0x01 0x00 0x00 0x00 0x00 0x02 0x01 0xc1 0x15 0x01 0x00 0x00 0x00 0x00 0x02 0x02 0x10 0x15 0x01 0x00 0x00 0x00 0x00 0x02 0x03 0x10 0x15 0x01 0x00 0x00 0x00 0x00 0x02 0x04 0x10 0x15 0x01 0x00 0x00 0x00 0x00 0x02 0x05 0x10 0x15 0x01 0x00 0x00 0x00 0x00 0x02 0x06 0x10 0x15 0x01 0x00 0x00 0x00 0x00 0x02 0x07 0x10 0x15 0x01 0x00 0x00 0x00 0x00 0x02 0xfe 0x40 0x15 0x01 0x00 0x00 0x00 0x00 0x02 0xbd 0x00 0x15 0x01 0x00 0x00 0x00 0x00 0x02 0xfe 0xd2 0x15 0x01 0x00 0x00 0x00 0x00 0x02 0x35 0x0f 0x15 0x01 0x00 0x40 0x00 0x00 0x02 0xfe 0x40 0x15 0x01 0x00 0x40 0x00 0x00 0x02 0xb2 0x37 0x15 0x01 0x00 0x40 0x00 0x00 0x02 0xb4 0x41 0x15 0x01 0x00 0x00 0x00 0x00 0x02 0xfe 0x00 0x15 0x01 0x00 0x00 0x00 0x00 0x02 0xfa 0x01 0x15 0x01 0x00 0x00 0x00 0x00 0x02 0xc2 0x08 0x15 0x01 0x00 0x00 0x00 0x00 0x02 0x35 0x00 0x39 0x01 0x00 0x00 0x00 0x00 0x03 0x51 0x0f 0x0f 0x05 0x01 0x00 0x00 0x78 0x01 0x01 0x11 0x05 0x01 0x00 0x00 0x00 0x00 0x01 0x29>;
			lcd-kit,power-off-stage = <0x05 0x00 0x0a 0x01 0x00 0x02 0x09 0x00 0x03 0x02 0x00 0x05>;
			lcd-kit,lp-off-stage = <0x00 0x00 0x00>;
			lcd-kit,hs-off-stage = <0x06 0x00 0x78>;
			lcd-kit,hs-on-stage = <0x00 0x00 0x00>;
			lcd-kit,lp-on-stage = <0x05 0x01 0x05 0x05 0x00 0x05 0x05 0x01 0x23 0x06 0x01 0x00>;
			lcd-kit,power-on-stage = <0x0d 0x00 0x0a 0x02 0x01 0x05 0x09 0x01 0x05 0x01 0x01 0x14>;
			lcd-kit,lcd-mipi-switch = <0x02 0x14f 0x00>;
			lcd-kit,lcd-te0 = <0x02 0x41 0x00>;
			lcd-kit,lcd-reset = <0x02 0x159 0x00>;
			lcd-kit,lcd-vci = <0x02 0x155 0x00>;
			lcd-kit,lcd-vdd = <0x02 0x22 0x00>;
			lcd-kit,lcd-iovcc = <0x02 0x154 0x00>;
			lcd-kit,mipi-non-continue-enable = <0x01>;
			lcd-kit,mipi-burst-mode = <0x02>;
			lcd-kit,mipi-max-tx-esc-clk = <0x0a>;
			lcd-kit,mipi-vc = <0x00>;
			lcd-kit,mipi-phy-mode = <0x01>;
			lcd-kit,panel-ifbc-type = <0x05>;
			lcd-kit,vesa-dsc-gen-rc-params = <0x01>;
			lcd-kit,vesa-dsc-line-buff-depth = <0x0b>;
			lcd-kit,vesa-dsc-pred-en = <0x01>;
			lcd-kit,vesa-slice-width = <0x4e0>;
			lcd-kit,vesa-slice-height = <0x10>;
			lcd-kit,vesa-dsc-bpp = <0x08>;
			lcd-kit,vesa-dsc-bpc = <0x0a>;
			lcd-kit,vesa-dsc-format = <0x00>;
			lcd-kit,vesa-dsc-version = <0x00>;
			lcd-kit,mipi-dsi-version = <0x00>;
			lcd-kit,mipi-color-mode = <0x05>;
			lcd-kit,mipi-lane-nums = <0x02>;
			lcd-kit,mipi-clk-post-adjust = <0xd7>;
			lcd-kit,mipi-dsi-upt-support = <0x00>;
			lcd-kit,panel-pxl-clk-div = <0x01>;
			lcd-kit,mipi-dsi-bit-clk = <0x101>;
			lcd-kit,panel-pxl-clk = <0xc0>;
			lcd-kit,mipi-v-front-porch = <0x1c>;
			lcd-kit,mipi-v-back-porch = <0x46>;
			lcd-kit,mipi-v-sync-area = <0x12>;
			lcd-kit,mipi-dpi-h-size = <0xb9>;
			lcd-kit,mipi-h-line-time = <0xff>;
			lcd-kit,mipi-h-back-porch = <0x0f>;
			lcd-kit,mipi-h-sync-area = <0x0f>;
			lcd-kit,te-index = <0x01>;
			lcd-kit,connector-num = <0x02>;
			lcd-kit,connector-id1 = <0x02>;
			lcd-kit,connector-id0 = <0x00>;
			lcd-kit,panel-vsyn-ctr-type = <0x00>;
			lcd-kit,panel-orientation = <0x01>;
			lcd-kit,panel-bgr-fmt = <0x00>;
			lcd-kit,panel-bpp = <0x00>;
			lcd-kit,panel-cmd-type = <0x40>;
			lcd-kit,panel-height = <0x8d>;
			lcd-kit,panel-width = <0x9e>;
			lcd-kit,panel-yres = <0x8b0>;
			lcd-kit,panel-xres = <0x9c0>;
			lcd-kit,panel-type = <0x02>;
			lcd-kit,panel-name = "ALTA 190 C07 7.847' 2496 * 2224";
			compatible = "190_c07_7p847";
		};
	};

	aod {
		phandle = <0x7ca>;
	};

	smartpakit {
		status = "disabled";
		dsp_img_name = "hifi_6405_imedia150_devkit.img";
		out_device = <0x00 0x01>;
		algo_in = <0x01>;
		soc_platform = <0x00>;
		compatible = "huawei,smartpakit";
		phandle = <0x7cb>;
	};

	bastet {
		compatible = "huawei,bastet";
		status = "ok";
		phandle = <0x7cc>;
	};

	sound_DA_combine_v3 {
		status = "disabled";
		compatible = "hisilicon,da_combine_v3-machine";
		phandle = <0x7cd>;
	};

	sound_DA_combine_v5 {
		status = "disabled";
		extern_codec_type = "codecless";
		compatible = "hisilicon,da_combine_v5-machine";
		phandle = <0x7ce>;
	};

	codec {
		status = "disabled";
		udp_io_config = <0x01>;
		fpga_clk_power = "true";
		need_judge_logic = "false";
		reg_count = <0x04>;
		max_offset = <0x28c 0x2bc 0xf00 0x1000>;
		reg = <0x00 0xfab52000 0x00 0x1000 0x00 0xfab4e000 0x00 0x400 0x00 0xfb21b000 0x00 0x1000 0x00 0xfabda000 0x00 0x1000>;
		compatible = "hisilicon,asp-codec-stub";
		phandle = <0x7cf>;
	};

	hwcxext_sound {
		phandle = <0x7d0>;
	};

	extern_dac_vir_dai {
		status = "ok";
		compatible = "huawei,hifi-vir-dai";
		phandle = <0x7d1>;
	};

	asp_codec_codecless@FAB52000 {
		status = "ok";
		pinctrl-1 = <0x2d5 0x2d7 0x2d9 0x2db 0x305 0x307 0x309 0x30b 0x32b 0x32d 0x32f 0x331 0x335 0x337 0x339 0x33b 0x378 0x37a 0x37c 0x37e 0x3a8 0x3aa 0x3ac 0x3ae 0x3d0 0x3d2 0x3d4 0x3d6 0x3da 0x3dc 0x3de 0x3e0>;
		pinctrl-0 = <0x2d4 0x2d6 0x2d8 0x2da 0x304 0x306 0x308 0x30a 0x32a 0x32c 0x32e 0x330 0x334 0x336 0x338 0x33a 0x377 0x379 0x37b 0x37d 0x3a7 0x3a9 0x3ab 0x3ad 0x3cf 0x3d1 0x3d3 0x3d5 0x3d9 0x3db 0x3dd 0x3df>;
		hdmi_jack_enable;
		codecless_codec_info = "Name: OnBoard Audio\nVendor: HUAWEI\nModel: OnBoard Audio\n";
		codec_pm_switches = "AUDIO_INTF2_SWITCH Switch", "AUDIO_INTF3_SWITCH Switch";
		support_save_switch;
		pm_runtime_support;
		pinctrl-names = "default", "idle";
		reg = <0x00 0xfab52000 0x00 0x1000 0x00 0xfab4e000 0x00 0x400 0x00 0xfb228000 0x00 0x1000 0x00 0xff800000 0x00 0x1000 0x00 0xfabda000 0x00 0xd0 0x00 0xfaf00000 0x00 0x1000>;
		ultra_pll_xfs_i2s_id = <0x01>;
		udp_io_config = <0x01>;
		compatible = "hisilicon,asp-codec-codecless";
		phandle = <0x7d2>;
	};

	soc_mad {
		status = "disabled";
		pinctrl-1 = <0x2e3 0x2e5 0x2e7 0x2e9 0x386 0x388 0x38a 0x38c>;
		pinctrl-0 = <0x2e2 0x2e4 0x2e6 0x2e8 0x385 0x387 0x389 0x38b>;
		pinctrl-names = "default", "idle";
		mad_mode = <0x01>;
		reg = <0x00 0xfaf00000 0x00 0x1000>;
		compatible = "hisilicon,soc-mad";
		phandle = <0x7d3>;
	};

	analog_less_machine {
		status = "ok";
		huawei,extern_codec_type = "hwcxext_codec";
		codec-handle = <0x7d2>;
		compatible = "hisilicon,analog-less-machine";
		phandle = <0x7d4>;
	};

	asp_pcm_hifi {
		low_power_support;
		status = "disabled";
		compatible = "asp-pcm-hifi";
		phandle = <0x7d5>;
	};

	asp_pcm_soc_dsp_config {
		compatible = "soc-dsp-phone-pcm-config";
		status = "ok";
		phandle = <0x7d6>;
	};

	asp_dmac {
		status = "ok";
		io_type = <0x07>;
		asp-supply = <0x02>;
		asp-dmac-supply = <0x02>;
		reg = <0x00 0xfab4b000 0x00 0x1000>;
		compatible = "hisilicon,pcm-codec";
		phandle = <0x7d7>;
	};

	pcm_armpc_custom {
		status = "ok";
		compatible = "hisilicon,armpc-custom";
		phandle = <0x7d8>;
	};

	audio_dp_machine {
		status = "disable";
		compatible = "hisilicon,audio-dp-machine";
		phandle = <0x7d9>;
	};

	soundwire_test@FAB54000 {
		status = "disabled";
		slave-num = <0x01>;
		soundwire-clk = <0x03>;
		platform-type = <0x00>;
		soundwire-reg-supply = <0x02>;
		interrupt-names = "asp_irq_soundwire";
		interrupts = <0x00 0x01 0x04>;
		reg = <0x00 0xfab54000 0x00 0xe00 0x00 0xfab56000 0x00 0x1000 0x00 0xfab57000 0x00 0x1000>;
		compatible = "hisilicon,soundwire_test";
		phandle = <0x7da>;
	};

	sio@FAB4F000 {
		status = "disabled";
		reg = <0x00 0xfa54f000 0x00 0x400>;
		compatible = "hisilicon,hi3630-sio";
		phandle = <0x7db>;
	};

	sio@FAB4F400 {
		status = "disabled";
		sio-voice-supply = <0x02>;
		reg = <0x00 0xfa54f400 0x00 0x400>;
		compatible = "hisilicon,hi3630-sio";
		phandle = <0x7dc>;
	};

	sio@FAB4F800 {
		status = "disabled";
		reg = <0x00 0xfa54f800 0x00 0x400>;
		compatible = "hisilicon,hi3630-sio";
		phandle = <0x7dd>;
	};

	sio@FAB4FC00 {
		status = "disabled";
		reg = <0x00 0xfa54fc00 0x00 0x400>;
		compatible = "hisilicon,hi3630-sio";
		phandle = <0x7de>;
	};

	soundtrigger@faB54000 {
		status = "disabled";
		asp-dmac-supply = <0x02>;
		reg = <0x00 0xfab54000 0x00 0x1000>;
		compatible = "hisilicon,soundtrigger_pcm_drv";
		phandle = <0x7df>;
	};

	pcm_drv_da_combine {
		status = "disabled";
		compatible = "hisilicon,pcm_drv_da_combine";
		phandle = <0x7e0>;
	};

	hw_soundtrigger_event {
		status = "disabled";
		compatible = "hisilicon,hw_soundtrigger_event";
		phandle = <0x7e1>;
	};

	codec_asp_dmac@faB4B000 {
		status = "ok";
		oneshot_irq;
		interrupt-names = "asp_dma_irq";
		interrupts = <0x00 0x04 0x04>;
		asp-dmac-supply = <0x02>;
		reg = <0x00 0xfab4b000 0x00 0x1000>;
		compatible = "hisilicon,da_combine-asp-dma";
		phandle = <0x7e2>;
	};

	asp_hdmi_dmac@faB4E400 {
		status = "ok";
		reg = <0x00 0xfab4e400 0x00 0x1000>;
		compatible = "hisilicon,asp-hdmi-dma";
		phandle = <0x7e3>;
	};

	asp_cfg@faB4e000 {
		status = "ok";
		asp-supply = <0x02>;
		reg = <0x00 0xfab4e000 0x00 0xa000>;
		compatible = "hisilicon,asp-cfg";
		phandle = <0x7e4>;
	};

	dp_i2s {
		status = "ok";
		compatible = "hisilicon,audio-dp-i2s";
		phandle = <0x7e5>;
	};

	dp_audio {
		status = "disable";
		compatible = "hisilicon,dp-audio";
		phandle = <0x7e6>;
	};

	dp_aux_switch {
		status = "ok";
		cs-gpios = <0x196 0x1a 0x00>;
		compatible = "huawei,dp_aux_switch";
		phandle = <0x7e7>;
	};

	audio-pcm-dp {
		status = "disable";
		dp-pcm-supply = <0x02>;
		interrupt-names = "asp_hdmi_dma";
		interrupts = <0x00 0x01 0x04>;
		compatible = "hisilicon,audio-pcm-dp";
		asp_interface_type = <0x01>;
		phandle = <0x7e8>;
	};

	hifidsp {
		platform-type = "ASIC";
		status = "disabled";
		compatible = "hisilicon,hifidsp";
		phandle = <0x7e9>;
	};

	hifidspextend {
		phandle = <0x7ea>;
	};

	sochifi_watchdog {
		status = "disabled";
		interrupts = <0x00 0x4e 0x04>;
		compatible = "hisilicon,sochifi-watchdog";
		phandle = <0x7eb>;
	};

	usbaudio_dsp {
		status = "disabled";
		compatible = "hisilicon,usbaudiodsp";
		phandle = <0x7ec>;
	};

	codec_check {
		status = "disabled";
		compatible = "huawei,codec_check";
		phandle = <0x7ed>;
	};

	deviceboxID@0 {
		phandle = <0x7ee>;
	};

	audio_hw_config {
		adev_statics_support = "true";
		karaoke_mic_conf_support = "true";
		direct_44k1_enable = "true";
		combine_voice_enable = "false";
		combine_record_enable = "false";
		record_algo_version = "record5_0";
		audio_sar_support = "true";
		status = "ok";
		platform_exlatency = "80";
		pa_alg_bypass = "false";
		speaker_test_content = "main_right_speaker,main_left_speaker";
		analog_earpiece_enable = "false";
		ear_pa_name = "smartpakit";
		asr_enable = "true";
		modem_sio_master = "false";
		codec_dsp_algo = "mad";
		mic_calib_support = "true";
		codec_name = "DA_separate";
		soc_name = "hi363x";
		cust_name = "audio_custom";
		spk_pa_name = "smartpakit";
		vqm_enable = "true";
		multi_mic_enable = "true";
		product_name = "charlotte";
		module-num = "2";
		module0 = "audio.extension.so";
		module1 = "audio.custom.so";
		codec_reset_uevent = "codechifi_watchdog";
		phandle = <0x7ef>;

		audio_capability {
			audio_sed_enable = "true";
			voip_ap_algo_enable = "true";
			voip_scene_support = "true";
			backmic_record_enable = "true";
			asr_enhance_mic_choose = "1";
			wakeup_internal_engine = "true";
			voice_region_enable = "true";
			music_region_enable = "false";
			usb_compatibility_report = "true";
			wakeup_hisiengine = "true";
			max_stream_volume = "15";
			soundtrigger_kws1_feature = "2";
			soundtrigger_mad_switch_support = "true";
			soundtrigger_soc_lp_enable = "true";
			soundtrigger_mic_info = "3";
			soundtrigger_enhance_enable = "true";
			soundtrigger_version = "2.0";
			sws_force_channel_swap_in_portrait_mode = "true";
			sws_version = "sws_7_0";
			visualizer_frame = "Medium";
			visualizer_support = "true";
			usb_analog_hs_report = "true";
			irda_support = "false";
			mmi_capture_enable = "false";
			accessibility_support = "true";
			asr_vibrate_support = "true";
			vdr_ui_support = "false";
			earphone_multi_eq_support = "true";
			mul_spk_set_angle = "true";
			always_use_dual_spk = "false";
			dual_smartpa_version = "2.0";
			spk_rcv_stereo_support = "real";
			stereo_for_notification = "true";
			stereo_for_alarm = "true";
			stereo_handfree_support = "true";
			dual_smartpa_support = "false";
			voice_anc_support = "false";
			dhf_support = "false";
			lvm_support = "true";
			nv_evs_support = "true";
			wnr_support = "false";
			swb_support = "true";
			bwe_support = "true";
			bwe_ui_support = "true";
		};

		hardware_info {
			status = "ok";
			mic_type = "0007";
			mic_num = "3";
		};

		hifi_info {
			dsp_voice_vol_control = "1";
		};
	};

	dig_hs {
		phandle = <0x7f0>;
	};

	audio_gpio_ctl {
		phandle = <0x7f1>;
	};

	ana_hs {
		phandle = <0x7f2>;
	};

	audio_vqm {
		compatible = "huawei,audio_vqm";
		status = "ok";
		phandle = <0x7f3>;
	};

	audio_misc {
		phandle = <0x7f4>;
	};

	hsdt1crg_usb20_phy@efab0000 {
		compatible = "syscon";
		reg = <0x00 0xefab0000 0x00 0x1000>;
		#chip-usb-reg-cells = <0x04>;
		phandle = <0x14b>;
	};

	pddevice {
		update_combophy_firmware = <0x00>;
		phandle = <0x7f5>;
	};

	sensorhub_status {
		status = "disabled";
		compatible = "huawei,sensorhub_status";
		phandle = <0x7f6>;
	};

	ipc@FA899000 {
		phandle = <0x7f7>;

		ao-mailbox-0 {
			timeout = <0x7d0>;
		};
	};

	sensorhub_nmi {
		nmi_reg = <0x588>;
		compatible = "huawei,sensorhub_nmi";
		phandle = <0x7f8>;
	};

	hall {
		status = "disabled";
		compatible = "huawei,hall_sensor,ak8789";
		phandle = <0x7f9>;

		huawei,hall_0 {
			huawei,default-state = "on";
			huawei,type = <0x01>;
			huawei,single-n-pole = <0xf5 0x03 0x00>;
		};
	};

	gpio_check {
		phandle = <0x7fa>;
	};

	hisi,hisi_isp {
		phandle = <0x7fb>;
	};

	huawei,hisi_fd {
		phandle = <0x7fc>;
	};

	huawei,imx386hybird {
		phandle = <0x7fd>;
	};

	huawei,imx319 {
		phandle = <0x7fe>;
	};

	huawei,imx600hybird {
		phandle = <0x7ff>;
	};

	huawei,imx600 {
		phandle = <0x800>;
	};

	huawei,imx616 {
		status = "ok";
		vendor,cam-power-seq-delay = <0x00 0x00 0x00 0x00 0x01 0x01>;
		vendor,cam-power-seq-cfg-val = <0x6422c40 0x00 0x00 0x1b7740 0x124f800 0x00>;
		vendor,cam-power-seq-type = "clock-rxphy", "sensor_avdd1_en", "sensor_dvdd0_en", "sensor_iovdd", "sensor_mclk", "sensor_rst";
		huawei,gpio-ctrl-types = "reset", "avdd1_en", "dvdd0-en";
		gpios = <0x196 0x0c 0x00 0x4e 0x07 0x00 0x43 0x16 0x00>;
		iovdd-supply = <0x65b>;
		vendor,vcmpd_valid = <0x00>;
		clock-names = "rxphy", "mclk";
		clocks = <0x521 0x512>;
		vendor,phy_work_mode = <0x00>;
		vendor,phy_freq = <0x6422c40>;
		vendor,phy_freq_mode = <0x00>;
		vendor,phy_mode = <0x00>;
		vendor,phy_id = <0x02>;
		vendor,is_master_sensor = <0x01>;
		vendor,phyinfo_valid = <0x01>;
		vendor,reset_valid = <0x01>;
		vendor,i2c_index = <0x01>;
		vendor,csi_index = <0x02>;
		huawei,sensor_index = <0x01>;
		vendor,pd_valid = <0x01>;
		vendor,is_fpga = <0x00>;
		huawei,sensor_name = "IMX616";
		compatible = "huawei,sensor";
		phandle = <0x801>;
	};

	huawei,imx516 {
		status = "disabled";
		vendor,cam-power-seq-delay = <0x00 0x00 0x00 0x00 0x01 0x01 0x00 0x00>;
		vendor,cam-power-seq-cfg-val = <0x6422c40 0x1b7740 0x2b7cd0 0x124f80 0x16c3a30 0x00 0x325aa0 0x3d0900>;
		vendor,cam-power-seq-type = "clock-rxphy", "sensor_iovdd", "ldo-hi6563_ldo3", "ldo-hi6563_buck1", "sensor_mclk", "sensor_rst", "ldo-hi6563_ldo7", "ldo-hi6563_buckboost";
		huawei,gpio-ctrl-types = "reset";
		gpios = <0x196 0x0d 0x00>;
		hi6563_buckboost-supply = <0x3f2>;
		hi6563_buck1-supply = <0x3e8>;
		hi6563_ldo7-supply = <0x3ef>;
		hi6563_ldo1-supply = <0x3e9>;
		hi6563_ldo3-supply = <0x3eb>;
		iovdd-supply = <0x65b>;
		tof-gpio-num = <0x55>;
		tof-swing-num = <0x01>;
		clock-names = "rxphy", "mclk";
		clocks = <0x523 0x512>;
		vendor,phy_work_mode = <0x02>;
		vendor,phy_freq = <0x6422c40>;
		vendor,phy_freq_mode = <0x00>;
		vendor,phy_mode = <0x00>;
		vendor,phy_id = <0x04>;
		vendor,is_master_sensor = <0x01>;
		vendor,phyinfo_valid = <0x01>;
		vendor,ao_i2c_index = <0x08>;
		vendor,bus_type = "I2C";
		vendor,i2c_index = <0x08>;
		vendor,csi_index = <0x03>;
		vendor,vcmpd_valid = <0x00>;
		vendor,reset_valid = <0x01>;
		vendor,pd_valid = <0x01>;
		vendor,is_fpga = <0x00>;
		huawei,sensor_index = <0x15>;
		huawei,sensor_name = "CWRJFS";
		compatible = "huawei,sensor";
		phandle = <0x802>;
	};

	huawei,imx588 {
		status = "disabled";
		vendor,cam-power-seq-delay = <0x00 0x00 0x01 0x01>;
		vendor,cam-power-seq-cfg-val = <0x6422c40 0x2b7cd0 0x100590 0x00>;
		vendor,cam-power-seq-type = "clock-rxphy", "ldo-hi6563_ldo8", "ldo-hi6563_ldo9", "sensor_rst";
		module_type = <0x00>;
		huawei,gpio-ctrl-types = "reset";
		gpios = <0x166 0x07 0x00>;
		hi6563_ldo9-supply = <0x3f1>;
		hi6563_ldo8-supply = <0x3f0>;
		iovdd-supply = <0x65a>;
		clocks = <0x523>;
		clock-names = "rxphy";
		vendor,phy_work_mode = <0x00>;
		vendor,phy_freq = <0x6422c40>;
		vendor,phy_freq_mode = <0x00>;
		vendor,phy_mode = <0x00>;
		vendor,phy_id = <0x04>;
		vendor,is_master_sensor = <0x01>;
		vendor,phyinfo_valid = <0x01>;
		vendor,ao_i2c_index = <0x05>;
		vendor,i2c_index = <0x05>;
		vendor,bus_type = "I2C";
		vendor,csi_index = <0x04>;
		vendor,vcmpd_valid = <0x00>;
		vendor,reset_valid = <0x01>;
		vendor,pd_valid = <0x01>;
		vendor,is_fpga = <0x00>;
		huawei,sensor_index = <0x14>;
		huawei,sensor_name = "IMX588";
		compatible = "huawei,sensor";
		phandle = <0x803>;
	};

	huawei,imx688 {
		status = "ok";
		vendor,cam-power-seq-delay = <0x00 0x01 0x01 0x01 0x05 0x03>;
		vendor,cam-power-seq-cfg-val = <0x6422c40 0x00 0x00 0x01 0x192d500 0x00>;
		vendor,cam-power-seq-type = "clock-rxphy", "sensor_avdd1_en", "sensor_dvdd0_en", "sensor_dvdd1_en", "sensor_mclk", "sensor_rst";
		huawei,gpio-ctrl-types = "reset", "avdd1_en", "dvdd0-en", "dvdd1-en";
		gpios = <0x196 0x0c 0x00 0x4e 0x07 0x00 0x43 0x16 0x00 0x2f 0x02 0x00>;
		vendor,i2c_pad_type = <0x01>;
		phy-clock-num = <0x01>;
		vendor,phyclk = <0x6422c40>;
		vendor,mclk = <0x192d500>;
		clock-names = "rxphy", "mclk";
		clocks = <0x521 0x5c6>;
		vendor,igs_cam_clk = <0x01>;
		vendor,phy_work_mode = <0x00>;
		vendor,phy_freq = <0x6422c40>;
		vendor,phy_freq_mode = <0x00>;
		vendor,phy_mode = <0x01>;
		vendor,phy_id = <0x02>;
		vendor,is_master_sensor = <0x01>;
		vendor,phyinfo_valid = <0x01>;
		vendor,bus_type = "I2C";
		vendor,ao_i2c_index = <0x05>;
		vendor,i2c_index = <0x05>;
		vendor,csi_index = <0x04>;
		vendor,vcmpd_valid = <0x00>;
		vendor,reset_valid = <0x01>;
		vendor,pd_valid = <0x01>;
		vendor,is_fpga = <0x00>;
		huawei,sensor_index = <0x14>;
		huawei,sensor_name = "IMX688";
		compatible = "huawei,sensor";
		phandle = <0x804>;
	};

	huawei,imx688_rear {
		status = "ok";
		vendor,cam-power-seq-delay = <0x00 0x00 0x00 0x00 0x00 0x01 0x00 0x05 0x02>;
		vendor,cam-power-seq-cfg-val-off = <0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x192d500 0x00>;
		vendor,cam-power-seq-cfg-val = <0x6422c40 0x1b7740 0x1b7740 0x2c4020 0x00 0x01 0x30d400 0x192d500 0x00>;
		vendor,cam-power-seq-type = "clock-rxphy", "sensor_iovdd", "ldo-hi6563_ldo6", "ldo-hi6563_ldo2", "sensor_dvdd0_en", "sensor_dvdd1_en", "ldo-hi6563_ldo7", "sensor_mclk", "sensor_rst";
		huawei,gpio-ctrl-types = "dvdd0-en", "dvdd1-en", "reset";
		gpios = <0x43 0x16 0x00 0xf5 0x02 0x00 0x2f 0x1a 0x00>;
		hi6563_ldo7-supply = <0x3ef>;
		hi6563_ldo6-supply = <0x3ee>;
		hi6563_ldo2-supply = <0x3ea>;
		iovdd-supply = <0x65b>;
		clock-names = "rxphy", "mclk";
		clocks = <0x51f 0x5c5>;
		vendor,igs_cam_clk = <0x02>;
		vendor,phy_work_mode = <0x00>;
		vendor,phy_freq = <0x6422c40>;
		vendor,phy_freq_mode = <0x00>;
		vendor,phy_mode = <0x01>;
		vendor,phy_id = <0x00>;
		vendor,is_master_sensor = <0x01>;
		vendor,phyinfo_valid = <0x01>;
		vendor,ao_i2c_index = <0x08>;
		vendor,bus_type = "I2C";
		vendor,i2c_index = <0x08>;
		vendor,csi_index = <0x03>;
		vendor,vcmpd_valid = <0x00>;
		vendor,reset_valid = <0x01>;
		vendor,pd_valid = <0x01>;
		vendor,is_fpga = <0x00>;
		huawei,sensor_index = <0x16>;
		huawei,sensor_name = "IMX688_REAR";
		compatible = "huawei,sensor";
		phandle = <0x805>;
	};

	huawei,ov4689 {
		phandle = <0x806>;
	};

	huawei,c014utf {
		status = "ok";
		vendor,cam-power-seq-delay = <0x00 0x01 0x01 0x01 0x01 0x03>;
		vendor,cam-power-seq-cfg-val = <0x6422c40 0x00 0x00 0x00 0x18cba80 0x00>;
		vendor,cam-power-seq-type = "clock-rxphy", "sensor_avdd1_en", "sensor_dvdd0_en", "sensor_dvdd1_en", "sensor_mclk", "sensor_rst";
		huawei,gpio-ctrl-types = "reset", "avdd1_en", "dvdd0-en", "dvdd1-en";
		gpios = <0x196 0x0c 0x00 0x4e 0x07 0x00 0x43 0x16 0x00 0x2f 0x02 0x00>;
		vendor,i2c_pad_type = <0x01>;
		clock-names = "rxphy", "mclk";
		clocks = <0x521 0x5c6>;
		vendor,phy_work_mode = <0x00>;
		vendor,phy_freq = <0x6422c40>;
		vendor,phy_freq_mode = <0x00>;
		vendor,phy_mode = <0x01>;
		vendor,phy_id = <0x02>;
		vendor,is_master_sensor = <0x01>;
		vendor,phyinfo_valid = <0x01>;
		vendor,bus_type = "I2C";
		vendor,i2c_index = <0x01>;
		vendor,csi_index = <0x02>;
		vendor,vcmpd_valid = <0x00>;
		vendor,reset_valid = <0x01>;
		vendor,pd_valid = <0x01>;
		vendor,is_fpga = <0x00>;
		huawei,sensor_index = <0x01>;
		huawei,sensor_name = "C014UTF";
		compatible = "huawei,sensor";
		phandle = <0x807>;
	};

	huawei,c015fuc {
		status = "ok";
		vendor,cam-power-seq-delay = <0x00 0x00 0x00 0x00 0x01 0x01 0x01 0x01>;
		vendor,cam-power-seq-cfg-val = <0x6422c40 0x2c4020 0x1b7740 0x118c30 0x30d400 0x1b7740 0x124f800 0x00>;
		vendor,cam-power-seq-type = "clock-rxphy", "ldo-hi6563_ldo1", "ldo-hi6563_ldo5", "ldo-hi6563_buck1", "sensor_afvdd", "sensor_iovdd", "sensor_mclk", "sensor_rst";
		huawei,gpio-ctrl-types = "reset";
		gpios = <0x196 0x14 0x00>;
		hi6563_buck1-supply = <0x3e8>;
		hi6563_ldo5-supply = <0x3ed>;
		hi6563_ldo1-supply = <0x3e9>;
		iovdd-supply = <0x65b>;
		afvdd-supply = <0x646>;
		clocks = <0x520 0x511>;
		clock-names = "rxphy", "mclk";
		vendor,phy_work_mode = <0x00>;
		vendor,phy_freq = <0x6422c40>;
		vendor,phy_freq_mode = <0x01>;
		vendor,phy_mode = <0x01>;
		vendor,phy_id = <0x01>;
		vendor,is_master_sensor = <0x01>;
		vendor,phyinfo_valid = <0x01>;
		vendor,i2c_index = <0x02>;
		vendor,csi_index = <0x00>;
		vendor,vcmpd_valid = <0x00>;
		vendor,reset_valid = <0x01>;
		vendor,pd_valid = <0x01>;
		vendor,is_fpga = <0x00>;
		huawei,sensor_index = <0x00>;
		huawei,sensor_name = "C015FUC";
		compatible = "huawei,sensor";
		phandle = <0x808>;
	};

	huawei,c015amz {
		status = "ok";
		vendor,cam-power-seq-delay = <0x00 0x00 0x00 0x00 0x00 0x00 0x01 0x01>;
		vendor,cam-power-seq-cfg-val = <0x6422c40 0x2c4020 0x1b7740 0x30d400 0x1b7740 0x00 0x124f800 0x00>;
		vendor,cam-power-seq-type = "clock-rxphy", "ldo-hi6563_ldo2", "ldo-hi6563_ldo6", "ldo-hi6563_ldo7", "sensor_iovdd", "sensor_dvdd0_en", "sensor_mclk", "sensor_rst";
		huawei,gpio-ctrl-types = "reset", "dvdd0-en";
		gpios = <0x2f 0x1a 0x00 0x43 0x16 0x00>;
		hi6563_ldo7-supply = <0x3ef>;
		hi6563_ldo6-supply = <0x3ee>;
		hi6563_ldo2-supply = <0x3ea>;
		iovdd-supply = <0x65b>;
		clock-names = "rxphy", "mclk";
		clocks = <0x522 0x513>;
		vendor,phy_work_mode = <0x00>;
		vendor,phy_freq = <0x6422c40>;
		vendor,phy_freq_mode = <0x00>;
		vendor,phy_mode = <0x01>;
		vendor,phy_id = <0x03>;
		vendor,is_master_sensor = <0x01>;
		vendor,phyinfo_valid = <0x01>;
		vendor,i2c_index = <0x00>;
		vendor,csi_index = <0x05>;
		vendor,vcmpd_valid = <0x00>;
		vendor,reset_valid = <0x01>;
		vendor,pd_valid = <0x01>;
		vendor,is_fpga = <0x00>;
		huawei,sensor_index = <0x05>;
		huawei,sensor_name = "C015AMZ";
		compatible = "huawei,sensor";
		phandle = <0x809>;
	};

	huawei,c023oby {
		status = "ok";
		vendor,cam-power-seq-delay = <0x00 0x00 0x00 0x00 0x00 0x01 0x01>;
		vendor,cam-power-seq-cfg-val = <0x6422c40 0x30d400 0x2b7cd0 0x1b7740 0x10c8e0 0x124f800 0x00>;
		vendor,cam-power-seq-type = "clock-rxphy", "ldo-hi6563_ldo7", "ldo-hi6563_ldo3", "sensor_iovdd", "sensor_dvdd", "sensor_mclk", "sensor_rst";
		huawei,gpio-ctrl-types = "reset";
		gpios = <0x166 0x02 0x00>;
		hi6563_ldo7-supply = <0x3ef>;
		hi6563_ldo3-supply = <0x3eb>;
		iovdd-supply = <0x65b>;
		dvdd-supply = <0x664>;
		vendor,vcmpd_valid = <0x00>;
		clocks = <0x524 0x513>;
		clock-names = "rxphy", "mclk";
		vendor,phy_work_mode = <0x00>;
		vendor,phy_freq = <0x6422c40>;
		vendor,phy_freq_mode = <0x00>;
		vendor,phy_mode = <0x00>;
		vendor,phy_id = <0x05>;
		vendor,is_master_sensor = <0x01>;
		vendor,phyinfo_valid = <0x01>;
		vendor,reset_valid = <0x01>;
		vendor,i2c_index = <0x02>;
		vendor,csi_index = <0x06>;
		huawei,sensor_index = <0x04>;
		vendor,pd_valid = <0x01>;
		vendor,is_fpga = <0x00>;
		huawei,sensor_name = "C023OBY";
		compatible = "huawei,sensor";
		phandle = <0x80a>;
	};

	huawei,c015gou {
		status = "ok";
		vendor,cam-power-seq-delay = <0x00 0x00 0x00 0x00 0x00 0x00 0x01 0x01>;
		vendor,cam-power-seq-cfg-val = <0x6422c40 0x2c4020 0x1b7740 0x30d400 0x1b7740 0x00 0x124f800 0x00>;
		vendor,cam-power-seq-type = "clock-rxphy", "ldo-hi6563_ldo2", "ldo-hi6563_ldo6", "ldo-hi6563_ldo7", "sensor_iovdd", "sensor_dvdd0_en", "sensor_mclk", "sensor_rst";
		huawei,gpio-ctrl-types = "reset", "dvdd0-en";
		gpios = <0x2f 0x1a 0x00 0x43 0x16 0x00>;
		hi6563_ldo7-supply = <0x3ef>;
		hi6563_ldo6-supply = <0x3ee>;
		hi6563_ldo2-supply = <0x3ea>;
		iovdd-supply = <0x65b>;
		clock-names = "rxphy", "mclk";
		clocks = <0x522 0x513>;
		vendor,phy_work_mode = <0x00>;
		vendor,phy_freq = <0x6422c40>;
		vendor,phy_freq_mode = <0x00>;
		vendor,phy_mode = <0x01>;
		vendor,phy_id = <0x03>;
		vendor,is_master_sensor = <0x01>;
		vendor,phyinfo_valid = <0x01>;
		vendor,i2c_index = <0x00>;
		vendor,csi_index = <0x05>;
		vendor,vcmpd_valid = <0x00>;
		vendor,reset_valid = <0x01>;
		vendor,pd_valid = <0x01>;
		vendor,is_fpga = <0x00>;
		huawei,sensor_index = <0x05>;
		huawei,sensor_name = "C015GOU";
		compatible = "huawei,sensor";
		phandle = <0x80b>;
	};

	huawei,c895hiv {
		status = "ok";
		vendor,cam-power-seq-delay-off = <0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x01>;
		vendor,cam-power-seq-delay = <0x00 0x00 0x00 0x00 0x00 0x00 0x01 0x14>;
		vendor,cam-power-seq-cfg-val = <0x6422c40 0x1b7740 0x1b7740 0x2c4020 0x118c30 0x124f800 0x30d400 0x00>;
		vendor,cam-power-seq-type = "clock-rxphy", "sensor_iovdd", "ldo-hi6563_ldo5", "ldo-hi6563_ldo1", "ldo-hi6563_buck1", "sensor_mclk", "sensor_afvdd", "sensor_rst";
		huawei,gpio-ctrl-types = "reset";
		gpios = <0x196 0x14 0x00>;
		hi6563_buck1-supply = <0x3e8>;
		hi6563_ldo5-supply = <0x3ed>;
		hi6563_ldo1-supply = <0x3e9>;
		afvdd-supply = <0x646>;
		iovdd-supply = <0x65b>;
		clocks = <0x520 0x511>;
		clock-names = "rxphy", "mclk";
		vendor,phy_work_mode = <0x00>;
		vendor,phy_freq = <0x6422c40>;
		vendor,phy_freq_mode = <0x01>;
		vendor,phy_mode = <0x01>;
		vendor,phy_id = <0x01>;
		vendor,is_master_sensor = <0x01>;
		vendor,phyinfo_valid = <0x01>;
		vendor,bus_type = "I2C";
		vendor,i2c_index = <0x00>;
		vendor,csi_index = <0x00>;
		vendor,vcmpd_valid = <0x00>;
		vendor,reset_valid = <0x01>;
		vendor,pd_valid = <0x01>;
		vendor,is_fpga = <0x00>;
		huawei,sensor_index = <0x00>;
		huawei,sensor_name = "C895HIV";
		compatible = "huawei,sensor";
		phandle = <0x80c>;
	};

	huawei,c928hiv {
		phandle = <0x80d>;
	};

	huawei,c001yfi {
		phandle = <0x80e>;
	};

	huawei,c983kfc {
		phandle = <0x80f>;
	};

	huawei,c713utf {
		phandle = <0x810>;
	};

	huawei,c929quv {
		phandle = <0x811>;
	};

	huawei,c930dyf {
		phandle = <0x812>;
	};

	huawei,c802dnr {
		phandle = <0x813>;
	};

	huawei,c954dkl {
		phandle = <0x814>;
	};

	huawei,c954dpo {
		phandle = <0x815>;
	};

	huawei,c956dnr {
		phandle = <0x816>;
	};

	huawei,c956utf {
		phandle = <0x817>;
	};

	huawei,c962dyb {
		phandle = <0x818>;
	};

	huawei,c958dnr {
		phandle = <0x819>;
	};

	huawei,c982mmj {
		phandle = <0x81a>;
	};

	huawei,c959qcp {
		phandle = <0x81b>;
	};

	huawei,c959qcp_swing {
		phandle = <0x81c>;
	};

	huawei,c957ors {
		phandle = <0x81d>;
	};

	huawei,c957oby {
		phandle = <0x81e>;
	};

	huawei,c937dnr {
		phandle = <0x81f>;
	};

	huawei,c981mmj {
		phandle = <0x820>;
	};

	huawei,c951mos {
		phandle = <0x821>;
	};

	huawei,c949dyb {
		phandle = <0x822>;
	};

	huawei,c939hiv {
		phandle = <0x823>;
	};

	huawei,c972yfi {
		phandle = <0x824>;
	};

	huawei,c934hpw {
		phandle = <0x825>;
	};

	huawei,c934ekr {
		phandle = <0x826>;
	};

	huawei,c918dyb {
		phandle = <0x827>;
	};

	huawei,c973hwy {
		phandle = <0x828>;
	};

	huawei,c802utf {
		status = "ok";
		vendor,cam-power-seq-delay-off = <0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x01>;
		vendor,cam-power-seq-delay = <0x00 0x00 0x00 0x00 0x00 0x01 0x00 0x00 0x02>;
		vendor,cam-power-seq-cfg-val = <0x6422c40 0x1b7740 0x1b7740 0x2c4020 0x00 0x00 0x30d400 0x18cba80 0x00>;
		vendor,cam-power-seq-type = "clock-rxphy", "sensor_iovdd", "ldo-hi6563_ldo6", "ldo-hi6563_ldo2", "sensor_dvdd0_en", "sensor_dvdd1_en", "ldo-hi6563_ldo7", "sensor_mclk", "sensor_rst";
		huawei,gpio-ctrl-types = "dvdd0-en", "dvdd1-en", "reset";
		gpios = <0x43 0x16 0x00 0xf5 0x02 0x00 0x2f 0x1a 0x00>;
		hi6563_ldo7-supply = <0x3ef>;
		hi6563_ldo6-supply = <0x3ee>;
		hi6563_ldo2-supply = <0x3ea>;
		vendor,ldo-names = "iovdd";
		iovdd-supply = <0x65b>;
		vendor,i2c_pad_type = <0x02>;
		clock-names = "rxphy", "mclk";
		clocks = <0x51f 0x5c5>;
		vendor,phy_work_mode = <0x00>;
		vendor,phy_freq = <0x6422c40>;
		vendor,phy_freq_mode = <0x00>;
		vendor,phy_mode = <0x01>;
		vendor,phy_id = <0x00>;
		vendor,is_master_sensor = <0x01>;
		vendor,phyinfo_valid = <0x01>;
		vendor,ao_i2c_index = <0x08>;
		vendor,bus_type = "I2C";
		vendor,i2c_index = <0x02>;
		vendor,csi_index = <0x01>;
		vendor,vcmpd_valid = <0x00>;
		vendor,reset_valid = <0x01>;
		vendor,pd_valid = <0x01>;
		vendor,is_fpga = <0x00>;
		huawei,sensor_index = <0x05>;
		huawei,sensor_name = "C802UTF";
		compatible = "huawei,sensor";
		phandle = <0x829>;
	};

	huawei,c073oby {
		status = "ok";
		vendor,cam-power-seq-delay-off = <0x01 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x02>;
		vendor,cam-power-seq-delay = <0x00 0x00 0x00 0x00 0x00 0x00 0x01 0x00 0x14>;
		vendor,cam-power-seq-cfg-val = <0x6422c40 0x1b7740 0x1b7740 0x2c4020 0x10c8e0 0x124f800 0x30d400 0x00 0x00>;
		vendor,cam-power-seq-type = "clock-rxphy", "sensor_iovdd", "ldo-hi6563_ldo5", "ldo-hi6563_ldo3", "sensor_dvdd", "sensor_mclk", "ldo-hi6563_ldo7", "pinctrl-i3c", "sensor_rst";
		huawei,gpio-ctrl-types = "reset";
		gpios = <0x166 0x02 0x00>;
		hi6563_ldo7-supply = <0x3ef>;
		hi6563_ldo5-supply = <0x3ed>;
		hi6563_ldo3-supply = <0x3eb>;
		dvdd-supply = <0x664>;
		iovdd-supply = <0x65b>;
		clock-names = "rxphy", "mclk";
		clocks = <0x524 0x514>;
		vendor,phy_work_mode = <0x00>;
		vendor,phy_freq = <0x6422c40>;
		vendor,phy_freq_mode = <0x00>;
		vendor,phy_mode = <0x00>;
		vendor,phy_id = <0x05>;
		vendor,is_master_sensor = <0x01>;
		vendor,phyinfo_valid = <0x01>;
		vendor,bus_type = "i3c";
		vendor,i2c_index = <0x04>;
		vendor,csi_index = <0x06>;
		vendor,vcmpd_valid = <0x00>;
		vendor,reset_valid = <0x01>;
		vendor,pd_valid = <0x01>;
		vendor,is_fpga = <0x00>;
		huawei,sensor_index = <0x04>;
		huawei,sensor_name = "C073OBY";
		compatible = "huawei,sensor";
		phandle = <0x82a>;
	};

	huawei,c940oby {
		phandle = <0x82b>;
	};

	huawei,c897utf {
		status = "ok";
		vendor,cam-power-seq-delay-off = <0x00 0x00 0x00 0x00 0x00 0x01>;
		vendor,cam-power-seq-delay = <0x00 0x00 0x00 0x00 0x01 0x14>;
		vendor,cam-power-seq-cfg-val = <0x6422c40 0x00 0x00 0x18cba80 0x00 0x00>;
		vendor,cam-power-seq-type = "clock-rxphy", "sensor_avdd1_en", "sensor_dvdd0_en", "sensor_mclk", "sensor_dvdd1_en", "sensor_rst";
		huawei,gpio-ctrl-types = "avdd1_en", "dvdd0-en", "dvdd1-en", "reset";
		gpios = <0x4e 0x07 0x00 0x43 0x16 0x00 0x2f 0x02 0x00 0x196 0x0c 0x00>;
		vendor,i2c_pad_type = <0x01>;
		clock-names = "rxphy", "mclk";
		clocks = <0x521 0x5c6>;
		vendor,phy_work_mode = <0x00>;
		vendor,phy_freq = <0x6422c40>;
		vendor,phy_freq_mode = <0x00>;
		vendor,phy_mode = <0x01>;
		vendor,phy_id = <0x02>;
		vendor,is_master_sensor = <0x01>;
		vendor,phyinfo_valid = <0x01>;
		vendor,bus_type = "I2C";
		vendor,i2c_index = <0x01>;
		vendor,csi_index = <0x02>;
		vendor,vcmpd_valid = <0x00>;
		vendor,reset_valid = <0x01>;
		vendor,pd_valid = <0x01>;
		vendor,is_fpga = <0x00>;
		huawei,sensor_index = <0x01>;
		huawei,sensor_name = "C897UTF";
		compatible = "huawei,sensor";
		phandle = <0x82c>;
	};

	huawei,c896utf {
		status = "ok";
		vendor,cam-power-seq-delay-off = <0x00 0x00 0x00 0x00 0x00 0x01>;
		vendor,cam-power-seq-delay = <0x00 0x00 0x00 0x00 0x01 0x14>;
		vendor,cam-power-seq-cfg-val = <0x6422c40 0x00 0x00 0x18cba80 0x00 0x00>;
		vendor,cam-power-seq-type = "clock-rxphy", "sensor_avdd1_en", "sensor_dvdd0_en", "sensor_mclk", "sensor_dvdd1_en", "sensor_rst";
		huawei,gpio-ctrl-types = "avdd1_en", "dvdd0-en", "dvdd1-en", "reset";
		gpios = <0x4e 0x07 0x00 0x43 0x16 0x00 0x2f 0x02 0x00 0x196 0x0c 0x00>;
		vendor,i2c_pad_type = <0x01>;
		phy-clock-num = <0x01>;
		vendor,phyclk = <0x6422c40>;
		vendor,mclk = <0x18cba80>;
		clock-names = "rxphy", "mclk";
		clocks = <0x521 0x5c6>;
		vendor,phy_work_mode = <0x00>;
		vendor,phy_freq = <0x6422c40>;
		vendor,phy_freq_mode = <0x00>;
		vendor,phy_mode = <0x01>;
		vendor,phy_id = <0x02>;
		vendor,is_master_sensor = <0x01>;
		vendor,phyinfo_valid = <0x01>;
		vendor,bus_type = "I2C";
		vendor,i2c_index = <0x01>;
		vendor,csi_index = <0x02>;
		vendor,vcmpd_valid = <0x00>;
		vendor,reset_valid = <0x01>;
		vendor,pd_valid = <0x01>;
		vendor,is_fpga = <0x00>;
		huawei,sensor_index = <0x01>;
		huawei,sensor_name = "C896UTF";
		compatible = "huawei,sensor";
		phandle = <0x82d>;
	};

	huawei,c998hdt {
		phandle = <0x82e>;
	};

	huawei,c999hdt {
		phandle = <0x82f>;
	};

	huawei,c947utf {
		phandle = <0x830>;
	};

	huawei,c985dnr {
		phandle = <0x831>;
	};

	huawei,c936hiv {
		phandle = <0x832>;
	};

	huawei,c984yfi {
		phandle = <0x833>;
	};

	huawei,c998yfi {
		phandle = <0x834>;
	};

	huawei,c935mxw {
		phandle = <0x835>;
	};

	huawei,c935dyb {
		phandle = <0x836>;
	};

	huawei,c937utf {
		phandle = <0x837>;
	};

	huawei,c987hdt {
		phandle = <0x838>;
	};

	huawei,c988eva {
		phandle = <0x839>;
	};

	huawei,c806zgl {
		phandle = <0x83a>;
	};

	huawei,c806muf {
		phandle = <0x83b>;
	};

	huawei,c806quo {
		phandle = <0x83c>;
	};

	huawei,c802utf_swing {
		phandle = <0x83d>;
	};

	huawei,c802utf_swing_folded {
		phandle = <0x83e>;
	};

	huawei,c802dnr_swing {
		phandle = <0x83f>;
	};

	huawei,c802dnr_swing_folded {
		phandle = <0x840>;
	};

	huawei,c947utf_swing {
		phandle = <0x841>;
	};

	huawei,c985dnr_swing {
		phandle = <0x842>;
	};

	huawei,c897utf_swing {
		phandle = <0x843>;
	};

	huawei,c896utf_swing {
		phandle = <0x844>;
	};

	huawei,c998hdt_swing {
		phandle = <0x845>;
	};

	huawei,c999hdt_swing {
		phandle = <0x846>;
	};

	huawei,c713utf_swing {
		phandle = <0x847>;
	};

	huawei,c896utfxg {
		phandle = <0x848>;
	};

	huawei,c999hdtxg {
		phandle = <0x849>;
	};

	huawei_c937utf_swing {
		phandle = <0x84a>;
	};

	huawei_c987hdt_swing {
		phandle = <0x84b>;
	};

	huawei,c956dnr_swing {
		phandle = <0x84c>;
	};

	huawei,c956utf_swing {
		phandle = <0x84d>;
	};

	huawei,c982mmj_swing {
		phandle = <0x84e>;
	};

	huawei,c824qcp {
		phandle = <0x84f>;
	};

	huawei,c824xba {
		phandle = <0x850>;
	};

	huawei,c877aor {
		phandle = <0x851>;
	};

	huawei,c877mmj {
		phandle = <0x852>;
	};

	huawei,c919fuv {
		phandle = <0x853>;
	};

	huawei,c919fuv_swing {
		phandle = <0x854>;
	};

	huawei,c842fuv {
		phandle = <0x855>;
	};

	huawei,c842ogu {
		phandle = <0x856>;
	};

	huawei,c950ouo {
		phandle = <0x857>;
	};

	huawei,c856mmj {
		phandle = <0x858>;
	};

	huawei,c851pol {
		phandle = <0x859>;
	};

	huawei,c854irc {
		phandle = <0x85a>;
	};

	huawei,c856mmj_swing {
		phandle = <0x85b>;
	};

	huawei,c963hiv {
		phandle = <0x85c>;
	};

	huawei,c963yfi {
		phandle = <0x85d>;
	};

	huawei,c931dyf {
		phandle = <0x85e>;
	};

	huawei,c932oby {
		phandle = <0x85f>;
	};

	huawei,c931dyf257 {
		phandle = <0x860>;
	};

	huawei,c931dyf257_swing {
		phandle = <0x861>;
	};

	huawei,imx616_fpc {
		status = "disabled";
		vendor,cam-power-seq-delay = <0x00 0x00 0x00 0x01 0x01 0x01>;
		vendor,cam-power-seq-cfg-val = <0x57bcf00 0x00 0x00 0x1b7740 0x124f800 0x00>;
		vendor,cam-power-seq-type = "clock-rxphy", "sensor_avdd1_en", "sensor_dvdd0_en", "sensor_iovdd", "sensor_mclk", "sensor_rst";
		huawei,gpio-ctrl-types = "reset", "avdd1_en", "dvdd0-en";
		gpios = <0x166 0x0c 0x00 0x4e 0x09 0x00 0x4e 0x0b 0x00>;
		iovdd-supply = <0x65b>;
		vendor,vcmpd_valid = <0x00>;
		clock-names = "rxphy", "mclk";
		clocks = <0x520 0x513>;
		vendor,phy_work_mode = <0x00>;
		vendor,phy_freq = <0x57bcf00>;
		vendor,phy_freq_mode = <0x00>;
		vendor,phy_mode = <0x00>;
		vendor,phy_id = <0x05>;
		vendor,is_master_sensor = <0x01>;
		vendor,phyinfo_valid = <0x01>;
		vendor,reset_valid = <0x01>;
		vendor,i2c_index = <0x00>;
		vendor,csi_index = <0x06>;
		huawei,sensor_index = <0x01>;
		vendor,pd_valid = <0x01>;
		vendor,is_fpga = <0x00>;
		huawei,sensor_name = "IMX616_FPC";
		compatible = "huawei,sensor";
		phandle = <0x862>;
	};

	huawei,cam_misc {
		phandle = <0x863>;
	};

	smmuv3_hsdt1 {
		phandle = <0x864>;
	};

	isp {
		phandle = <0x865>;
	};

	dev_ivp1 {
		phandle = <0x866>;
	};

	dev_ivp1_ipc {
		phandle = <0x867>;
	};

	hisee_mntn {
		phandle = <0x868>;
	};

	dp_source_switch {
		phandle = <0x869>;
	};

	irda {
		phandle = <0x86a>;
	};

	nfc_exist {
		phandle = <0x86b>;
	};

	ese_config {
		phandle = <0x86c>;
	};

	fingerprint {
		phandle = <0x86d>;
	};

	auth_cert@0 {
		compatible = "hisi,hisi-auth-cert";
		auth_cert_fix_pos = "true";
		phandle = <0x86e>;
	};

	sec_auth {
		compatible = "hisi,hisi-sec-auth";
		cert_format = "x509";
		phandle = <0x86f>;
	};

	uapp {

		bindfile {
			ptn = "xloader";
			offset = <0x00 0x100000>;
			size = <0x00 0x10000>;
		};

		bindfile_backup {
			ptn = "xloader";
			offset = <0x00 0x110000>;
			size = <0x00 0x10000>;
		};

		cert {
			cert_format = "x509";
		};
	};

	empower_cert {
		ptn = "xloader";
		offset = <0x00 0xfc000>;
		size = <0x00 0x2000>;
	};

	huawei_rsmc {
		phandle = <0x870>;
	};

	huawei_sate {
		phandle = <0x871>;
	};

	singleap_wifionly {
		phandle = <0x872>;
	};

	reserved_memory {
		phandle = <0x873>;
	};

	hifi_vir_dai {
		phandle = <0x874>;
	};

	sound_DA_separate {
		phandle = <0x875>;
	};

	antenna_boardid_detect {
		phandle = <0x876>;
	};

	thermal_interface {
		status = "ok";
		rtc-gpio = <0x48>;
		compatible = "huawei,thermal_interface";
		phandle = <0x877>;
	};

	huawei,cloud_network {
		phandle = <0x878>;
	};

	hw_ufs_led {
		status = "ok";
		led_gpio = <0x28>;
		compatible = "huawei,ufs_led";
		phandle = <0x879>;
	};

	hisi_usb_armpc {
		switch_usb_mode;
		compatible = "hisilicon,armpc-usb";
		phandle = <0x87a>;
	};

	hw_bios_wol {
		value = <0x00>;
		compatible = "huawei,bios_wol_variable";
		phandle = <0x87b>;
	};

	hw_trans_bios_variable {
		port_status = <0x00>;
		value = <0x00>;
		compatible = "trans,bios_setup_variable";
		phandle = <0x87c>;
	};

	hw_usb_hub {
		status = "ok";
		skip_s4;
		disable_usbhub_notifier;
		poweron_time = <0x0a>;
		usb_device_poweron_wait_time = <0xdac>;
		usbnet_reset_time = <0x2bc>;
		hub_net_gpio_delay_time = <0x0c>;
		usbnet_power_gpio = <0xd6>;
		usbcam_pwr_en_gpio = <0xdf>;
		reset_or_bpwr_delay_time = <0x05>;
		hub_bpwr_gpio = <0xf1>;
		compatible = "huawei,hw_usb_hub";
		phandle = <0x87d>;
	};

	power_misc {
		status = "ok";
		regulator_values = <0x2625a0 0x10c8e0 0x129da0 0x1312d0>;
		dp2vga-supply = <0x65e>;
		mipi2hdmi-supply = <0x65c>;
		pcie2sata-supply = <0x668>;
		pcieSwitch-supply = <0x124>;
		regulator_names_list = "pcieSwitch", "pcie2sata", "mipi2hdmi", "dp2vga";
		regulators_num = <0x04>;
		compatible = "armpc,power_misc";
		phandle = <0x87e>;
	};

	hw_pcie_0 {
		status = "ok";
		poweron_gpio_op = <0x01>;
		power-gpio = <0x166 0x02 0x00>;
		pcie_rc_idx = <0x00>;
		compatible = "huawei,hw_pcie";
		phandle = <0x87f>;
	};

	hw_pcie_1 {
		status = "ok";
		pcie_rc_idx = <0x01>;
		compatible = "huawei,hw_pcie1";
		phandle = <0x880>;
	};

	huawei_memory {
		phandle = <0x881>;
	};

	huawei_external_camera {
		phandle = <0x882>;
	};

	huawei_sparklink {
		phandle = <0x883>;
	};

	__symbols__ {
		connectivity_sensor = "/sensorhub/connectivity";
		dsi_alta_310_c07_6p39 = "/huawei,lcd_config/lcd_kit_alta_190_c07_6p39";
		dsi_alta_190_c07_7p847 = "/huawei,lcd_config/lcd_kit_alta_190_c07_7p847";
		echub_mcu = "/amba/i2c@FF88F000/echub_i2c@38/echub_mcu";
		overheat = "/amba/i2c@FF88F000/echub_i2c@38/overheat";
		fan0 = "/amba/i2c@FF88F000/echub_i2c@38/fan0";
		echub_lid = "/amba/i2c@FF88F000/echub_i2c@38/echub_lid";
		muteled = "/amba/i2c@FF88F000/echub_i2c@38/muteled";
		echub_battery = "/amba/i2c@FF88F000/echub_i2c@38/echub_battery";
		ldo4_hdmi = "/amba/i2c@FF88F000/echub_i2c@38/power@0/regulators/LDO4";
		ldo2_hdmi = "/amba/i2c@FF88F000/echub_i2c@38/power@0/regulators/LDO2";
		rsvmem = "/reserved-memory";
		pgtable_mem = "/reserved-memory/iommu_pgtable";
		sec_smmu_tcu = "/reserved-memory/sec_smmu_tcu";
		thee = "/reserved-memory/thee";
		mntn_mem = "/reserved-memory/bbox-mem";
		ramoops_ram = "/reserved-memory/pstore-mem";
		fastboot_cma = "/reserved-memory/fastboot-cma-mem";
		dtb = "/reserved-memory/dtb";
		normal_ramdisk = "/reserved-memory/normal-ramdisk";
		recovery_ramdisk = "/reserved-memory/recovery-ramdisk";
		modem_xmode_memory = "/reserved-memory/xmode-data";
		camera_heap = "/reserved-memory/camera-mem";
		mm_cma = "/reserved-memory/mm_cma";
		mm_iris_static_cma = "/reserved-memory/mm_iris_static_cma";
		tiny_cma = "/reserved-memory/tiny_cma";
		mm_smemheap_cma = "/reserved-memory/mm_smemheap_cma";
		aod_dynamic_cma = "/reserved-memory/aod_dynamic_cma";
		fastboot_pmic = "/fastboot_pmic";
		fastboot_pmic_mntn = "/fastboot_pmic_mntn";
		fastboot_subpmu_mntn = "/fastboot_subpmu_mntn";
		fastboot_coul = "/fastboot_coul";
		codec_bus = "/codec_bus";
		slimbus = "/codec_bus/slimbus";
		cpus = "/cpus";
		little0 = "/cpus/cpu@0";
		little1 = "/cpus/cpu@100";
		little2 = "/cpus/cpu@200";
		little3 = "/cpus/cpu@300";
		middle0 = "/cpus/cpu@400";
		middle1 = "/cpus/cpu@401";
		middle2 = "/cpus/cpu@500";
		middle3 = "/cpus/cpu@501";
		middle4 = "/cpus/cpu@600";
		middle5 = "/cpus/cpu@601";
		big0 = "/cpus/cpu@700";
		big1 = "/cpus/cpu@701";
		cluster0_opp_table = "/cpus/opp_table0";
		cluster1_opp_table = "/cpus/opp_table1";
		cluster2_opp_table = "/cpus/opp_table2";
		CPU_NAP_0 = "/cpus/idle-states/cpu-nap-0";
		CPU_SLEEP_0 = "/cpus/idle-states/cpu-sleep-0";
		CPU_SLEEP_1 = "/cpus/idle-states/cpu-sleep-1";
		CPU_SLEEP_2 = "/cpus/idle-states/cpu-sleep-2";
		CLUSTER_SLEEP_0 = "/cpus/idle-states/cluster-sleep-0";
		CLUSTER_SLEEP_1 = "/cpus/idle-states/cluster-sleep-1";
		CLUSTER_SLEEP_2 = "/cpus/idle-states/cluster-sleep-2";
		cluster0 = "/cpus/cpu-map/cluster0";
		cluster1 = "/cpus/cpu-map/cluster1";
		cluster2 = "/cpus/cpu-map/cluster2";
		pinmuxff801000 = "/pinmux@ff801000";
		pmx0 = "/pinmux@ff801000";
		gpio001_pmx_func = "/pinmux@ff801000/gpio001_pmx_func";
		gpio001_pmx_idle = "/pinmux@ff801000/gpio001_pmx_idle";
		gpio002_pmx_func = "/pinmux@ff801000/gpio002_pmx_func";
		gpio002_pmx_idle = "/pinmux@ff801000/gpio002_pmx_idle";
		gpio003_pmx_func = "/pinmux@ff801000/gpio003_pmx_func";
		gpio003_pmx_idle = "/pinmux@ff801000/gpio003_pmx_idle";
		gpio004_pmx_func = "/pinmux@ff801000/gpio004_pmx_func";
		gpio004_pmx_idle = "/pinmux@ff801000/gpio004_pmx_idle";
		gpio005_pmx_func = "/pinmux@ff801000/gpio005_pmx_func";
		gpio005_pmx_idle = "/pinmux@ff801000/gpio005_pmx_idle";
		gpio006_pmx_func = "/pinmux@ff801000/gpio006_pmx_func";
		gpio006_pmx_idle = "/pinmux@ff801000/gpio006_pmx_idle";
		gpio007_pmx_func = "/pinmux@ff801000/gpio007_pmx_func";
		gpio007_pmx_idle = "/pinmux@ff801000/gpio007_pmx_idle";
		gpio008_pmx_func = "/pinmux@ff801000/gpio008_pmx_func";
		gpio008_pmx_idle = "/pinmux@ff801000/gpio008_pmx_idle";
		gpio009_pmx_func = "/pinmux@ff801000/gpio009_pmx_func";
		gpio009_pmx_idle = "/pinmux@ff801000/gpio009_pmx_idle";
		gpio010_pmx_func = "/pinmux@ff801000/gpio010_pmx_func";
		gpio010_pmx_idle = "/pinmux@ff801000/gpio010_pmx_idle";
		gpio011_pmx_func = "/pinmux@ff801000/gpio011_pmx_func";
		gpio011_pmx_idle = "/pinmux@ff801000/gpio011_pmx_idle";
		gpio012_pmx_func = "/pinmux@ff801000/gpio012_pmx_func";
		gpio012_pmx_idle = "/pinmux@ff801000/gpio012_pmx_idle";
		gpio013_pmx_func = "/pinmux@ff801000/gpio013_pmx_func";
		gpio013_pmx_idle = "/pinmux@ff801000/gpio013_pmx_idle";
		gpio014_pmx_func = "/pinmux@ff801000/gpio014_pmx_func";
		gpio014_pmx_idle = "/pinmux@ff801000/gpio014_pmx_idle";
		gpio015_pmx_func = "/pinmux@ff801000/gpio015_pmx_func";
		gpio015_pmx_idle = "/pinmux@ff801000/gpio015_pmx_idle";
		gpio016_pmx_func = "/pinmux@ff801000/gpio016_pmx_func";
		gpio016_pmx_idle = "/pinmux@ff801000/gpio016_pmx_idle";
		gpio017_pmx_func = "/pinmux@ff801000/gpio017_pmx_func";
		gpio017_pmx_idle = "/pinmux@ff801000/gpio017_pmx_idle";
		gpio018_pmx_func = "/pinmux@ff801000/gpio018_pmx_func";
		gpio018_pmx_idle = "/pinmux@ff801000/gpio018_pmx_idle";
		gpio019_pmx_func = "/pinmux@ff801000/gpio019_pmx_func";
		gpio019_pmx_idle = "/pinmux@ff801000/gpio019_pmx_idle";
		gpio026_pmx_func = "/pinmux@ff801000/gpio026_pmx_func";
		gpio026_pmx_idle = "/pinmux@ff801000/gpio026_pmx_idle";
		gpio033_pmx_func = "/pinmux@ff801000/gpio033_pmx_func";
		gpio033_pmx_idle = "/pinmux@ff801000/gpio033_pmx_idle";
		gpio034_pmx_func = "/pinmux@ff801000/gpio034_pmx_func";
		gpio034_pmx_idle = "/pinmux@ff801000/gpio034_pmx_idle";
		gpio037_pmx_func = "/pinmux@ff801000/gpio037_pmx_func";
		gpio037_pmx_idle = "/pinmux@ff801000/gpio037_pmx_idle";
		gpio038_pmx_func = "/pinmux@ff801000/gpio038_pmx_func";
		gpio038_pmx_idle = "/pinmux@ff801000/gpio038_pmx_idle";
		gpio039_pmx_func = "/pinmux@ff801000/gpio039_pmx_func";
		gpio039_pmx_idle = "/pinmux@ff801000/gpio039_pmx_idle";
		gpio040_pmx_func = "/pinmux@ff801000/gpio040_pmx_func";
		gpio040_pmx_idle = "/pinmux@ff801000/gpio040_pmx_idle";
		gpio041_pmx_func = "/pinmux@ff801000/gpio041_pmx_func";
		gpio041_pmx_idle = "/pinmux@ff801000/gpio041_pmx_idle";
		gpio042_pmx_func = "/pinmux@ff801000/gpio042_pmx_func";
		gpio042_pmx_idle = "/pinmux@ff801000/gpio042_pmx_idle";
		gpio043_pmx_func = "/pinmux@ff801000/gpio043_pmx_func";
		gpio043_pmx_idle = "/pinmux@ff801000/gpio043_pmx_idle";
		gpio044_pmx_func = "/pinmux@ff801000/gpio044_pmx_func";
		gpio044_pmx_idle = "/pinmux@ff801000/gpio044_pmx_idle";
		gpio046_pmx_func = "/pinmux@ff801000/gpio046_pmx_func";
		gpio046_pmx_idle = "/pinmux@ff801000/gpio046_pmx_idle";
		gpio047_pmx_func = "/pinmux@ff801000/gpio047_pmx_func";
		gpio047_pmx_idle = "/pinmux@ff801000/gpio047_pmx_idle";
		gpio048_pmx_func = "/pinmux@ff801000/gpio048_pmx_func";
		gpio048_pmx_idle = "/pinmux@ff801000/gpio048_pmx_idle";
		range = "/pinmux@ff801000/gpio-range";
		pinmuxff801800 = "/pinmux@ff801800";
		pmx1 = "/pinmux@ff801800";
		gpio001_cfg_func = "/pinmux@ff801800/gpio001_cfg_func";
		gpio001_cfg_idle = "/pinmux@ff801800/gpio001_cfg_idle";
		gpio002_cfg_func = "/pinmux@ff801800/gpio002_cfg_func";
		gpio002_cfg_idle = "/pinmux@ff801800/gpio002_cfg_idle";
		gpio003_cfg_func = "/pinmux@ff801800/gpio003_cfg_func";
		gpio003_cfg_idle = "/pinmux@ff801800/gpio003_cfg_idle";
		gpio004_cfg_func = "/pinmux@ff801800/gpio004_cfg_func";
		gpio004_cfg_idle = "/pinmux@ff801800/gpio004_cfg_idle";
		gpio005_cfg_func = "/pinmux@ff801800/gpio005_cfg_func";
		gpio005_cfg_idle = "/pinmux@ff801800/gpio005_cfg_idle";
		gpio006_cfg_func = "/pinmux@ff801800/gpio006_cfg_func";
		gpio006_cfg_idle = "/pinmux@ff801800/gpio006_cfg_idle";
		gpio007_cfg_func = "/pinmux@ff801800/gpio007_cfg_func";
		gpio007_cfg_idle = "/pinmux@ff801800/gpio007_cfg_idle";
		gpio008_cfg_func = "/pinmux@ff801800/gpio008_cfg_func";
		gpio008_cfg_idle = "/pinmux@ff801800/gpio008_cfg_idle";
		gpio009_cfg_func = "/pinmux@ff801800/gpio009_cfg_func";
		gpio009_cfg_idle = "/pinmux@ff801800/gpio009_cfg_idle";
		gpio010_cfg_func = "/pinmux@ff801800/gpio010_cfg_func";
		gpio010_cfg_idle = "/pinmux@ff801800/gpio010_cfg_idle";
		gpio011_cfg_func = "/pinmux@ff801800/gpio011_cfg_func";
		gpio011_cfg_idle = "/pinmux@ff801800/gpio011_cfg_idle";
		gpio012_cfg_func = "/pinmux@ff801800/gpio012_cfg_func";
		gpio012_cfg_idle = "/pinmux@ff801800/gpio012_cfg_idle";
		gpio013_cfg_func = "/pinmux@ff801800/gpio013_cfg_func";
		gpio013_cfg_idle = "/pinmux@ff801800/gpio013_cfg_idle";
		gpio014_cfg_func = "/pinmux@ff801800/gpio014_cfg_func";
		gpio014_cfg_idle = "/pinmux@ff801800/gpio014_cfg_idle";
		gpio015_cfg_func = "/pinmux@ff801800/gpio015_cfg_func";
		gpio015_cfg_idle = "/pinmux@ff801800/gpio015_cfg_idle";
		gpio016_cfg_func = "/pinmux@ff801800/gpio016_cfg_func";
		gpio016_cfg_idle = "/pinmux@ff801800/gpio016_cfg_idle";
		gpio017_cfg_func = "/pinmux@ff801800/gpio017_cfg_func";
		gpio017_cfg_idle = "/pinmux@ff801800/gpio017_cfg_idle";
		gpio018_cfg_func = "/pinmux@ff801800/gpio018_cfg_func";
		gpio018_cfg_idle = "/pinmux@ff801800/gpio018_cfg_idle";
		gpio019_cfg_func = "/pinmux@ff801800/gpio019_cfg_func";
		gpio019_cfg_idle = "/pinmux@ff801800/gpio019_cfg_idle";
		gpio026_cfg_func = "/pinmux@ff801800/gpio026_cfg_func";
		gpio026_cfg_idle = "/pinmux@ff801800/gpio026_cfg_idle";
		gpio033_cfg_func = "/pinmux@ff801800/gpio033_cfg_func";
		gpio033_cfg_idle = "/pinmux@ff801800/gpio033_cfg_idle";
		gpio034_cfg_func = "/pinmux@ff801800/gpio034_cfg_func";
		gpio034_cfg_idle = "/pinmux@ff801800/gpio034_cfg_idle";
		gpio037_cfg_func = "/pinmux@ff801800/gpio037_cfg_func";
		gpio037_cfg_idle = "/pinmux@ff801800/gpio037_cfg_idle";
		gpio038_cfg_func = "/pinmux@ff801800/gpio038_cfg_func";
		gpio038_cfg_idle = "/pinmux@ff801800/gpio038_cfg_idle";
		gpio039_cfg_func = "/pinmux@ff801800/gpio039_cfg_func";
		gpio039_cfg_idle = "/pinmux@ff801800/gpio039_cfg_idle";
		gpio040_cfg_func = "/pinmux@ff801800/gpio040_cfg_func";
		gpio040_cfg_idle = "/pinmux@ff801800/gpio040_cfg_idle";
		gpio041_cfg_func = "/pinmux@ff801800/gpio041_cfg_func";
		gpio041_cfg_idle = "/pinmux@ff801800/gpio041_cfg_idle";
		gpio042_cfg_func = "/pinmux@ff801800/gpio042_cfg_func";
		gpio042_cfg_idle = "/pinmux@ff801800/gpio042_cfg_idle";
		gpio043_cfg_func = "/pinmux@ff801800/gpio043_cfg_func";
		gpio043_cfg_idle = "/pinmux@ff801800/gpio043_cfg_idle";
		gpio044_cfg_func = "/pinmux@ff801800/gpio044_cfg_func";
		gpio044_cfg_idle = "/pinmux@ff801800/gpio044_cfg_idle";
		gpio046_cfg_func = "/pinmux@ff801800/gpio046_cfg_func";
		gpio046_cfg_idle = "/pinmux@ff801800/gpio046_cfg_idle";
		gpio047_cfg_func = "/pinmux@ff801800/gpio047_cfg_func";
		gpio047_cfg_idle = "/pinmux@ff801800/gpio047_cfg_idle";
		gpio048_cfg_func = "/pinmux@ff801800/gpio048_cfg_func";
		gpio048_cfg_idle = "/pinmux@ff801800/gpio048_cfg_idle";
		pinmuxff811000 = "/pinmux@ff811000";
		pmx2 = "/pinmux@ff811000";
		gpio064_pmx_func = "/pinmux@ff811000/gpio064_pmx_func";
		gpio064_pmx_idle = "/pinmux@ff811000/gpio064_pmx_idle";
		gpio065_pmx_func = "/pinmux@ff811000/gpio065_pmx_func";
		gpio065_pmx_idle = "/pinmux@ff811000/gpio065_pmx_idle";
		gpio070_pmx_func = "/pinmux@ff811000/gpio070_pmx_func";
		gpio070_pmx_idle = "/pinmux@ff811000/gpio070_pmx_idle";
		gpio071_pmx_func = "/pinmux@ff811000/gpio071_pmx_func";
		gpio071_pmx_idle = "/pinmux@ff811000/gpio071_pmx_idle";
		gpio072_pmx_func = "/pinmux@ff811000/gpio072_pmx_func";
		gpio072_pmx_idle = "/pinmux@ff811000/gpio072_pmx_idle";
		gpio073_pmx_func = "/pinmux@ff811000/gpio073_pmx_func";
		gpio073_pmx_idle = "/pinmux@ff811000/gpio073_pmx_idle";
		gpio074_pmx_func = "/pinmux@ff811000/gpio074_pmx_func";
		gpio074_pmx_idle = "/pinmux@ff811000/gpio074_pmx_idle";
		gpio076_pmx_func = "/pinmux@ff811000/gpio076_pmx_func";
		gpio076_pmx_idle = "/pinmux@ff811000/gpio076_pmx_idle";
		gpio077_pmx_func = "/pinmux@ff811000/gpio077_pmx_func";
		gpio077_pmx_idle = "/pinmux@ff811000/gpio077_pmx_idle";
		pinmuxff811800 = "/pinmux@ff811800";
		pmx3 = "/pinmux@ff811800";
		gpio064_cfg_func = "/pinmux@ff811800/gpio064_cfg_func";
		gpio064_cfg_idle = "/pinmux@ff811800/gpio064_cfg_idle";
		gpio065_cfg_func = "/pinmux@ff811800/gpio065_cfg_func";
		gpio065_cfg_idle = "/pinmux@ff811800/gpio065_cfg_idle";
		gpio070_cfg_func = "/pinmux@ff811800/gpio070_cfg_func";
		gpio070_cfg_idle = "/pinmux@ff811800/gpio070_cfg_idle";
		gpio071_cfg_func = "/pinmux@ff811800/gpio071_cfg_func";
		gpio071_cfg_idle = "/pinmux@ff811800/gpio071_cfg_idle";
		gpio072_cfg_func = "/pinmux@ff811800/gpio072_cfg_func";
		gpio072_cfg_idle = "/pinmux@ff811800/gpio072_cfg_idle";
		gpio073_cfg_func = "/pinmux@ff811800/gpio073_cfg_func";
		gpio073_cfg_idle = "/pinmux@ff811800/gpio073_cfg_idle";
		gpio074_cfg_func = "/pinmux@ff811800/gpio074_cfg_func";
		gpio074_cfg_idle = "/pinmux@ff811800/gpio074_cfg_idle";
		gpio076_cfg_func = "/pinmux@ff811800/gpio076_cfg_func";
		gpio076_cfg_idle = "/pinmux@ff811800/gpio076_cfg_idle";
		gpio077_cfg_func = "/pinmux@ff811800/gpio077_cfg_func";
		gpio077_cfg_idle = "/pinmux@ff811800/gpio077_cfg_idle";
		pinmuxee266000 = "/pinmux@ee266000";
		pmx5 = "/pinmux@ee266000";
		gpio096_pmx_func = "/pinmux@ee266000/gpio096_pmx_func";
		gpio096_pmx_idle = "/pinmux@ee266000/gpio096_pmx_idle";
		gpio097_pmx_func = "/pinmux@ee266000/gpio097_pmx_func";
		gpio097_pmx_idle = "/pinmux@ee266000/gpio097_pmx_idle";
		gpio098_pmx_func = "/pinmux@ee266000/gpio098_pmx_func";
		gpio098_pmx_idle = "/pinmux@ee266000/gpio098_pmx_idle";
		gpio099_pmx_func = "/pinmux@ee266000/gpio099_pmx_func";
		gpio099_pmx_idle = "/pinmux@ee266000/gpio099_pmx_idle";
		gpio100_pmx_func = "/pinmux@ee266000/gpio100_pmx_func";
		gpio100_pmx_idle = "/pinmux@ee266000/gpio100_pmx_idle";
		gpio101_pmx_func = "/pinmux@ee266000/gpio101_pmx_func";
		gpio101_pmx_idle = "/pinmux@ee266000/gpio101_pmx_idle";
		gpio103_pmx_func = "/pinmux@ee266000/gpio103_pmx_func";
		gpio103_pmx_idle = "/pinmux@ee266000/gpio103_pmx_idle";
		gpio104_pmx_func = "/pinmux@ee266000/gpio104_pmx_func";
		gpio104_pmx_idle = "/pinmux@ee266000/gpio104_pmx_idle";
		gpio105_pmx_func = "/pinmux@ee266000/gpio105_pmx_func";
		gpio105_pmx_idle = "/pinmux@ee266000/gpio105_pmx_idle";
		gpio106_pmx_func = "/pinmux@ee266000/gpio106_pmx_func";
		gpio106_pmx_idle = "/pinmux@ee266000/gpio106_pmx_idle";
		gpio107_pmx_func = "/pinmux@ee266000/gpio107_pmx_func";
		gpio107_pmx_idle = "/pinmux@ee266000/gpio107_pmx_idle";
		pinmuxee266800 = "/pinmux@ee266800";
		pmx6 = "/pinmux@ee266800";
		gpio096_cfg_func = "/pinmux@ee266800/gpio096_cfg_func";
		gpio096_cfg_idle = "/pinmux@ee266800/gpio096_cfg_idle";
		gpio097_cfg_func = "/pinmux@ee266800/gpio097_cfg_func";
		gpio097_cfg_idle = "/pinmux@ee266800/gpio097_cfg_idle";
		gpio098_cfg_func = "/pinmux@ee266800/gpio098_cfg_func";
		gpio098_cfg_idle = "/pinmux@ee266800/gpio098_cfg_idle";
		gpio099_cfg_func = "/pinmux@ee266800/gpio099_cfg_func";
		gpio099_cfg_idle = "/pinmux@ee266800/gpio099_cfg_idle";
		gpio100_cfg_func = "/pinmux@ee266800/gpio100_cfg_func";
		gpio100_cfg_idle = "/pinmux@ee266800/gpio100_cfg_idle";
		gpio101_cfg_func = "/pinmux@ee266800/gpio101_cfg_func";
		gpio101_cfg_idle = "/pinmux@ee266800/gpio101_cfg_idle";
		gpio103_cfg_func = "/pinmux@ee266800/gpio103_cfg_func";
		gpio103_cfg_idle = "/pinmux@ee266800/gpio103_cfg_idle";
		gpio104_cfg_func = "/pinmux@ee266800/gpio104_cfg_func";
		gpio104_cfg_idle = "/pinmux@ee266800/gpio104_cfg_idle";
		gpio105_cfg_func = "/pinmux@ee266800/gpio105_cfg_func";
		gpio105_cfg_idle = "/pinmux@ee266800/gpio105_cfg_idle";
		gpio106_cfg_func = "/pinmux@ee266800/gpio106_cfg_func";
		gpio106_cfg_idle = "/pinmux@ee266800/gpio106_cfg_idle";
		gpio107_cfg_func = "/pinmux@ee266800/gpio107_cfg_func";
		gpio107_cfg_idle = "/pinmux@ee266800/gpio107_cfg_idle";
		pinmuxefb04000 = "/pinmux@efb04000";
		pmx7 = "/pinmux@efb04000";
		gpio320_pmx_func = "/pinmux@efb04000/gpio320_pmx_func";
		gpio320_pmx_idle = "/pinmux@efb04000/gpio320_pmx_idle";
		gpio321_pmx_func = "/pinmux@efb04000/gpio321_pmx_func";
		gpio321_pmx_idle = "/pinmux@efb04000/gpio321_pmx_idle";
		gpio322_pmx_func = "/pinmux@efb04000/gpio322_pmx_func";
		gpio322_pmx_idle = "/pinmux@efb04000/gpio322_pmx_idle";
		gpio323_pmx_func = "/pinmux@efb04000/gpio323_pmx_func";
		gpio323_pmx_idle = "/pinmux@efb04000/gpio323_pmx_idle";
		gpio324_pmx_func = "/pinmux@efb04000/gpio324_pmx_func";
		gpio324_pmx_idle = "/pinmux@efb04000/gpio324_pmx_idle";
		gpio325_pmx_func = "/pinmux@efb04000/gpio325_pmx_func";
		gpio325_pmx_idle = "/pinmux@efb04000/gpio325_pmx_idle";
		gpio326_pmx_func = "/pinmux@efb04000/gpio326_pmx_func";
		gpio326_pmx_idle = "/pinmux@efb04000/gpio326_pmx_idle";
		gpio327_pmx_func = "/pinmux@efb04000/gpio327_pmx_func";
		gpio327_pmx_idle = "/pinmux@efb04000/gpio327_pmx_idle";
		gpio328_pmx_func = "/pinmux@efb04000/gpio328_pmx_func";
		gpio328_pmx_idle = "/pinmux@efb04000/gpio328_pmx_idle";
		gpio329_pmx_func = "/pinmux@efb04000/gpio329_pmx_func";
		gpio329_pmx_idle = "/pinmux@efb04000/gpio329_pmx_idle";
		gpio330_pmx_func = "/pinmux@efb04000/gpio330_pmx_func";
		gpio330_pmx_idle = "/pinmux@efb04000/gpio330_pmx_idle";
		gpio331_pmx_func = "/pinmux@efb04000/gpio331_pmx_func";
		gpio331_pmx_idle = "/pinmux@efb04000/gpio331_pmx_idle";
		gpio341_pmx_func = "/pinmux@efb04000/gpio341_pmx_func";
		gpio341_pmx_idle = "/pinmux@efb04000/gpio341_pmx_idle";
		gpio342_pmx_func = "/pinmux@efb04000/gpio342_pmx_func";
		gpio342_pmx_idle = "/pinmux@efb04000/gpio342_pmx_idle";
		gpio343_pmx_func = "/pinmux@efb04000/gpio343_pmx_func";
		gpio343_pmx_idle = "/pinmux@efb04000/gpio343_pmx_idle";
		gpio344_pmx_func = "/pinmux@efb04000/gpio344_pmx_func";
		gpio344_pmx_idle = "/pinmux@efb04000/gpio344_pmx_idle";
		gpio345_pmx_func = "/pinmux@efb04000/gpio345_pmx_func";
		gpio345_pmx_idle = "/pinmux@efb04000/gpio345_pmx_idle";
		gpio346_pmx_func = "/pinmux@efb04000/gpio346_pmx_func";
		gpio346_pmx_idle = "/pinmux@efb04000/gpio346_pmx_idle";
		gpio347_pmx_func = "/pinmux@efb04000/gpio347_pmx_func";
		gpio347_pmx_idle = "/pinmux@efb04000/gpio347_pmx_idle";
		gpio348_pmx_func = "/pinmux@efb04000/gpio348_pmx_func";
		gpio348_pmx_idle = "/pinmux@efb04000/gpio348_pmx_idle";
		pinmuxefb04800 = "/pinmux@efb04800";
		pmx8 = "/pinmux@efb04800";
		gpio320_cfg_func = "/pinmux@efb04800/gpio320_cfg_func";
		gpio320_cfg_idle = "/pinmux@efb04800/gpio320_cfg_idle";
		gpio321_cfg_func = "/pinmux@efb04800/gpio321_cfg_func";
		gpio321_cfg_idle = "/pinmux@efb04800/gpio321_cfg_idle";
		gpio322_cfg_func = "/pinmux@efb04800/gpio322_cfg_func";
		gpio322_cfg_idle = "/pinmux@efb04800/gpio322_cfg_idle";
		gpio323_cfg_func = "/pinmux@efb04800/gpio323_cfg_func";
		gpio323_cfg_idle = "/pinmux@efb04800/gpio323_cfg_idle";
		gpio324_cfg_func = "/pinmux@efb04800/gpio324_cfg_func";
		gpio324_cfg_idle = "/pinmux@efb04800/gpio324_cfg_idle";
		gpio325_cfg_func = "/pinmux@efb04800/gpio325_cfg_func";
		gpio325_cfg_idle = "/pinmux@efb04800/gpio325_cfg_idle";
		gpio326_cfg_func = "/pinmux@efb04800/gpio326_cfg_func";
		gpio326_cfg_idle = "/pinmux@efb04800/gpio326_cfg_idle";
		gpio327_cfg_func = "/pinmux@efb04800/gpio327_cfg_func";
		gpio327_cfg_idle = "/pinmux@efb04800/gpio327_cfg_idle";
		gpio328_cfg_func = "/pinmux@efb04800/gpio328_cfg_func";
		gpio328_cfg_idle = "/pinmux@efb04800/gpio328_cfg_idle";
		gpio329_cfg_func = "/pinmux@efb04800/gpio329_cfg_func";
		gpio329_cfg_idle = "/pinmux@efb04800/gpio329_cfg_idle";
		gpio330_cfg_func = "/pinmux@efb04800/gpio330_cfg_func";
		gpio330_cfg_idle = "/pinmux@efb04800/gpio330_cfg_idle";
		gpio331_cfg_func = "/pinmux@efb04800/gpio331_cfg_func";
		gpio331_cfg_idle = "/pinmux@efb04800/gpio331_cfg_idle";
		gpio332_cfg_func = "/pinmux@efb04800/gpio332_cfg_func";
		gpio332_cfg_idle = "/pinmux@efb04800/gpio332_cfg_idle";
		gpio333_cfg_func = "/pinmux@efb04800/gpio333_cfg_func";
		gpio333_cfg_idle = "/pinmux@efb04800/gpio333_cfg_idle";
		gpio334_cfg_func = "/pinmux@efb04800/gpio334_cfg_func";
		gpio334_cfg_idle = "/pinmux@efb04800/gpio334_cfg_idle";
		gpio335_cfg_func = "/pinmux@efb04800/gpio335_cfg_func";
		gpio335_cfg_idle = "/pinmux@efb04800/gpio335_cfg_idle";
		gpio336_cfg_func = "/pinmux@efb04800/gpio336_cfg_func";
		gpio336_cfg_idle = "/pinmux@efb04800/gpio336_cfg_idle";
		gpio337_cfg_func = "/pinmux@efb04800/gpio337_cfg_func";
		gpio337_cfg_idle = "/pinmux@efb04800/gpio337_cfg_idle";
		gpio338_cfg_func = "/pinmux@efb04800/gpio338_cfg_func";
		gpio338_cfg_idle = "/pinmux@efb04800/gpio338_cfg_idle";
		gpio339_cfg_func = "/pinmux@efb04800/gpio339_cfg_func";
		gpio339_cfg_idle = "/pinmux@efb04800/gpio339_cfg_idle";
		gpio340_cfg_func = "/pinmux@efb04800/gpio340_cfg_func";
		gpio340_cfg_idle = "/pinmux@efb04800/gpio340_cfg_idle";
		gpio341_cfg_func = "/pinmux@efb04800/gpio341_cfg_func";
		gpio341_cfg_idle = "/pinmux@efb04800/gpio341_cfg_idle";
		gpio342_cfg_func = "/pinmux@efb04800/gpio342_cfg_func";
		gpio342_cfg_idle = "/pinmux@efb04800/gpio342_cfg_idle";
		gpio343_cfg_func = "/pinmux@efb04800/gpio343_cfg_func";
		gpio343_cfg_idle = "/pinmux@efb04800/gpio343_cfg_idle";
		gpio344_cfg_func = "/pinmux@efb04800/gpio344_cfg_func";
		gpio344_cfg_idle = "/pinmux@efb04800/gpio344_cfg_idle";
		gpio345_cfg_func = "/pinmux@efb04800/gpio345_cfg_func";
		gpio345_cfg_idle = "/pinmux@efb04800/gpio345_cfg_idle";
		gpio346_cfg_func = "/pinmux@efb04800/gpio346_cfg_func";
		gpio346_cfg_idle = "/pinmux@efb04800/gpio346_cfg_idle";
		gpio347_cfg_func = "/pinmux@efb04800/gpio347_cfg_func";
		gpio347_cfg_idle = "/pinmux@efb04800/gpio347_cfg_idle";
		gpio348_cfg_func = "/pinmux@efb04800/gpio348_cfg_func";
		gpio348_cfg_idle = "/pinmux@efb04800/gpio348_cfg_idle";
		gpio349_cfg_func = "/pinmux@efb04800/gpio349_cfg_func";
		gpio349_cfg_idle = "/pinmux@efb04800/gpio349_cfg_idle";
		gpio350_cfg_func = "/pinmux@efb04800/gpio350_cfg_func";
		gpio350_cfg_idle = "/pinmux@efb04800/gpio350_cfg_idle";
		gpio351_cfg_func = "/pinmux@efb04800/gpio351_cfg_func";
		gpio351_cfg_idle = "/pinmux@efb04800/gpio351_cfg_idle";
		gpio352_cfg_func = "/pinmux@efb04800/gpio352_cfg_func";
		gpio352_cfg_idle = "/pinmux@efb04800/gpio352_cfg_idle";
		gpio353_cfg_func = "/pinmux@efb04800/gpio353_cfg_func";
		gpio353_cfg_idle = "/pinmux@efb04800/gpio353_cfg_idle";
		gpio354_cfg_func = "/pinmux@efb04800/gpio354_cfg_func";
		gpio354_cfg_idle = "/pinmux@efb04800/gpio354_cfg_idle";
		gpio355_cfg_func = "/pinmux@efb04800/gpio355_cfg_func";
		gpio355_cfg_idle = "/pinmux@efb04800/gpio355_cfg_idle";
		gpio356_cfg_func = "/pinmux@efb04800/gpio356_cfg_func";
		gpio356_cfg_idle = "/pinmux@efb04800/gpio356_cfg_idle";
		gpio357_cfg_func = "/pinmux@efb04800/gpio357_cfg_func";
		gpio357_cfg_idle = "/pinmux@efb04800/gpio357_cfg_idle";
		gpio358_cfg_func = "/pinmux@efb04800/gpio358_cfg_func";
		gpio358_cfg_idle = "/pinmux@efb04800/gpio358_cfg_idle";
		gpio359_cfg_func = "/pinmux@efb04800/gpio359_cfg_func";
		gpio359_cfg_idle = "/pinmux@efb04800/gpio359_cfg_idle";
		gpio360_cfg_func = "/pinmux@efb04800/gpio360_cfg_func";
		gpio360_cfg_idle = "/pinmux@efb04800/gpio360_cfg_idle";
		pinmuxfb229000 = "/pinmux@fb229000";
		pmx9 = "/pinmux@fb229000";
		gpio160_pmx_func = "/pinmux@fb229000/gpio160_pmx_func";
		gpio160_pmx_idle = "/pinmux@fb229000/gpio160_pmx_idle";
		gpio161_pmx_func = "/pinmux@fb229000/gpio161_pmx_func";
		gpio161_pmx_idle = "/pinmux@fb229000/gpio161_pmx_idle";
		gpio162_pmx_func = "/pinmux@fb229000/gpio162_pmx_func";
		gpio162_pmx_idle = "/pinmux@fb229000/gpio162_pmx_idle";
		gpio163_pmx_func = "/pinmux@fb229000/gpio163_pmx_func";
		gpio163_pmx_idle = "/pinmux@fb229000/gpio163_pmx_idle";
		gpio164_pmx_func = "/pinmux@fb229000/gpio164_pmx_func";
		gpio164_pmx_idle = "/pinmux@fb229000/gpio164_pmx_idle";
		gpio165_pmx_func = "/pinmux@fb229000/gpio165_pmx_func";
		gpio165_pmx_idle = "/pinmux@fb229000/gpio165_pmx_idle";
		gpio166_pmx_func = "/pinmux@fb229000/gpio166_pmx_func";
		gpio166_pmx_idle = "/pinmux@fb229000/gpio166_pmx_idle";
		gpio167_pmx_func = "/pinmux@fb229000/gpio167_pmx_func";
		gpio167_pmx_idle = "/pinmux@fb229000/gpio167_pmx_idle";
		gpio168_pmx_func = "/pinmux@fb229000/gpio168_pmx_func";
		gpio168_pmx_idle = "/pinmux@fb229000/gpio168_pmx_idle";
		gpio169_pmx_func = "/pinmux@fb229000/gpio169_pmx_func";
		gpio169_pmx_idle = "/pinmux@fb229000/gpio169_pmx_idle";
		gpio170_pmx_func = "/pinmux@fb229000/gpio170_pmx_func";
		gpio170_pmx_idle = "/pinmux@fb229000/gpio170_pmx_idle";
		gpio171_pmx_func = "/pinmux@fb229000/gpio171_pmx_func";
		gpio171_pmx_idle = "/pinmux@fb229000/gpio171_pmx_idle";
		gpio172_pmx_func = "/pinmux@fb229000/gpio172_pmx_func";
		gpio172_pmx_idle = "/pinmux@fb229000/gpio172_pmx_idle";
		gpio173_pmx_func = "/pinmux@fb229000/gpio173_pmx_func";
		gpio173_pmx_idle = "/pinmux@fb229000/gpio173_pmx_idle";
		gpio174_pmx_func = "/pinmux@fb229000/gpio174_pmx_func";
		gpio174_pmx_idle = "/pinmux@fb229000/gpio174_pmx_idle";
		gpio175_pmx_func = "/pinmux@fb229000/gpio175_pmx_func";
		gpio175_pmx_idle = "/pinmux@fb229000/gpio175_pmx_idle";
		gpio177_pmx_func = "/pinmux@fb229000/gpio177_pmx_func";
		gpio177_pmx_idle = "/pinmux@fb229000/gpio177_pmx_idle";
		gpio178_pmx_func = "/pinmux@fb229000/gpio178_pmx_func";
		gpio178_pmx_idle = "/pinmux@fb229000/gpio178_pmx_idle";
		gpio179_pmx_func = "/pinmux@fb229000/gpio179_pmx_func";
		gpio179_pmx_idle = "/pinmux@fb229000/gpio179_pmx_idle";
		gpio180_pmx_func = "/pinmux@fb229000/gpio180_pmx_func";
		gpio180_pmx_idle = "/pinmux@fb229000/gpio180_pmx_idle";
		gpio181_pmx_func = "/pinmux@fb229000/gpio181_pmx_func";
		gpio181_pmx_idle = "/pinmux@fb229000/gpio181_pmx_idle";
		gpio182_pmx_func = "/pinmux@fb229000/gpio182_pmx_func";
		gpio182_pmx_idle = "/pinmux@fb229000/gpio182_pmx_idle";
		gpio183_pmx_func = "/pinmux@fb229000/gpio183_pmx_func";
		gpio183_pmx_idle = "/pinmux@fb229000/gpio183_pmx_idle";
		gpio184_pmx_func = "/pinmux@fb229000/gpio184_pmx_func";
		gpio184_pmx_idle = "/pinmux@fb229000/gpio184_pmx_idle";
		gpio185_pmx_func = "/pinmux@fb229000/gpio185_pmx_func";
		gpio185_pmx_idle = "/pinmux@fb229000/gpio185_pmx_idle";
		gpio186_pmx_func = "/pinmux@fb229000/gpio186_pmx_func";
		gpio186_pmx_idle = "/pinmux@fb229000/gpio186_pmx_idle";
		gpio187_pmx_func = "/pinmux@fb229000/gpio187_pmx_func";
		gpio187_pmx_idle = "/pinmux@fb229000/gpio187_pmx_idle";
		gpio188_pmx_func = "/pinmux@fb229000/gpio188_pmx_func";
		gpio188_pmx_idle = "/pinmux@fb229000/gpio188_pmx_idle";
		gpio189_pmx_func = "/pinmux@fb229000/gpio189_pmx_func";
		gpio189_pmx_idle = "/pinmux@fb229000/gpio189_pmx_idle";
		gpio190_pmx_func = "/pinmux@fb229000/gpio190_pmx_func";
		gpio190_pmx_idle = "/pinmux@fb229000/gpio190_pmx_idle";
		gpio191_pmx_func = "/pinmux@fb229000/gpio191_pmx_func";
		gpio191_pmx_idle = "/pinmux@fb229000/gpio191_pmx_idle";
		gpio192_pmx_func = "/pinmux@fb229000/gpio192_pmx_func";
		gpio192_pmx_idle = "/pinmux@fb229000/gpio192_pmx_idle";
		gpio193_pmx_func = "/pinmux@fb229000/gpio193_pmx_func";
		gpio193_pmx_idle = "/pinmux@fb229000/gpio193_pmx_idle";
		gpio194_pmx_func = "/pinmux@fb229000/gpio194_pmx_func";
		gpio194_pmx_idle = "/pinmux@fb229000/gpio194_pmx_idle";
		gpio195_pmx_func = "/pinmux@fb229000/gpio195_pmx_func";
		gpio195_pmx_idle = "/pinmux@fb229000/gpio195_pmx_idle";
		gpio196_pmx_func = "/pinmux@fb229000/gpio196_pmx_func";
		gpio196_pmx_idle = "/pinmux@fb229000/gpio196_pmx_idle";
		gpio197_pmx_func = "/pinmux@fb229000/gpio197_pmx_func";
		gpio197_pmx_idle = "/pinmux@fb229000/gpio197_pmx_idle";
		gpio198_pmx_func = "/pinmux@fb229000/gpio198_pmx_func";
		gpio198_pmx_idle = "/pinmux@fb229000/gpio198_pmx_idle";
		gpio199_pmx_func = "/pinmux@fb229000/gpio199_pmx_func";
		gpio199_pmx_idle = "/pinmux@fb229000/gpio199_pmx_idle";
		gpio200_pmx_func = "/pinmux@fb229000/gpio200_pmx_func";
		gpio200_pmx_idle = "/pinmux@fb229000/gpio200_pmx_idle";
		gpio201_pmx_func = "/pinmux@fb229000/gpio201_pmx_func";
		gpio201_pmx_idle = "/pinmux@fb229000/gpio201_pmx_idle";
		gpio202_pmx_func = "/pinmux@fb229000/gpio202_pmx_func";
		gpio202_pmx_idle = "/pinmux@fb229000/gpio202_pmx_idle";
		gpio203_pmx_func = "/pinmux@fb229000/gpio203_pmx_func";
		gpio203_pmx_idle = "/pinmux@fb229000/gpio203_pmx_idle";
		gpio204_pmx_func = "/pinmux@fb229000/gpio204_pmx_func";
		gpio204_pmx_idle = "/pinmux@fb229000/gpio204_pmx_idle";
		gpio205_pmx_func = "/pinmux@fb229000/gpio205_pmx_func";
		gpio205_pmx_idle = "/pinmux@fb229000/gpio205_pmx_idle";
		gpio206_pmx_func = "/pinmux@fb229000/gpio206_pmx_func";
		gpio206_pmx_idle = "/pinmux@fb229000/gpio206_pmx_idle";
		gpio207_pmx_func = "/pinmux@fb229000/gpio207_pmx_func";
		gpio207_pmx_idle = "/pinmux@fb229000/gpio207_pmx_idle";
		gpio208_pmx_func = "/pinmux@fb229000/gpio208_pmx_func";
		gpio208_pmx_idle = "/pinmux@fb229000/gpio208_pmx_idle";
		gpio209_pmx_func = "/pinmux@fb229000/gpio209_pmx_func";
		gpio209_pmx_idle = "/pinmux@fb229000/gpio209_pmx_idle";
		gpio210_pmx_func = "/pinmux@fb229000/gpio210_pmx_func";
		gpio210_pmx_idle = "/pinmux@fb229000/gpio210_pmx_idle";
		gpio211_pmx_func = "/pinmux@fb229000/gpio211_pmx_func";
		gpio211_pmx_idle = "/pinmux@fb229000/gpio211_pmx_idle";
		gpio212_pmx_func = "/pinmux@fb229000/gpio212_pmx_func";
		gpio212_pmx_idle = "/pinmux@fb229000/gpio212_pmx_idle";
		gpio213_pmx_func = "/pinmux@fb229000/gpio213_pmx_func";
		gpio213_pmx_idle = "/pinmux@fb229000/gpio213_pmx_idle";
		gpio214_pmx_func = "/pinmux@fb229000/gpio214_pmx_func";
		gpio214_pmx_idle = "/pinmux@fb229000/gpio214_pmx_idle";
		gpio215_pmx_func = "/pinmux@fb229000/gpio215_pmx_func";
		gpio215_pmx_idle = "/pinmux@fb229000/gpio215_pmx_idle";
		gpio216_pmx_func = "/pinmux@fb229000/gpio216_pmx_func";
		gpio216_pmx_idle = "/pinmux@fb229000/gpio216_pmx_idle";
		gpio217_pmx_func = "/pinmux@fb229000/gpio217_pmx_func";
		gpio217_pmx_idle = "/pinmux@fb229000/gpio217_pmx_idle";
		gpio218_pmx_func = "/pinmux@fb229000/gpio218_pmx_func";
		gpio218_pmx_idle = "/pinmux@fb229000/gpio218_pmx_idle";
		gpio219_pmx_func = "/pinmux@fb229000/gpio219_pmx_func";
		gpio219_pmx_idle = "/pinmux@fb229000/gpio219_pmx_idle";
		gpio220_pmx_func = "/pinmux@fb229000/gpio220_pmx_func";
		gpio220_pmx_idle = "/pinmux@fb229000/gpio220_pmx_idle";
		gpio221_pmx_func = "/pinmux@fb229000/gpio221_pmx_func";
		gpio221_pmx_idle = "/pinmux@fb229000/gpio221_pmx_idle";
		gpio222_pmx_func = "/pinmux@fb229000/gpio222_pmx_func";
		gpio222_pmx_idle = "/pinmux@fb229000/gpio222_pmx_idle";
		gpio223_pmx_func = "/pinmux@fb229000/gpio223_pmx_func";
		gpio223_pmx_idle = "/pinmux@fb229000/gpio223_pmx_idle";
		gpio224_pmx_func = "/pinmux@fb229000/gpio224_pmx_func";
		gpio224_pmx_idle = "/pinmux@fb229000/gpio224_pmx_idle";
		gpio225_pmx_func = "/pinmux@fb229000/gpio225_pmx_func";
		gpio225_pmx_idle = "/pinmux@fb229000/gpio225_pmx_idle";
		gpio226_pmx_func = "/pinmux@fb229000/gpio226_pmx_func";
		gpio226_pmx_idle = "/pinmux@fb229000/gpio226_pmx_idle";
		gpio227_pmx_func = "/pinmux@fb229000/gpio227_pmx_func";
		gpio227_pmx_idle = "/pinmux@fb229000/gpio227_pmx_idle";
		gpio228_pmx_func = "/pinmux@fb229000/gpio228_pmx_func";
		gpio228_pmx_idle = "/pinmux@fb229000/gpio228_pmx_idle";
		gpio230_pmx_func = "/pinmux@fb229000/gpio230_pmx_func";
		gpio230_pmx_idle = "/pinmux@fb229000/gpio230_pmx_idle";
		gpio231_pmx_func = "/pinmux@fb229000/gpio231_pmx_func";
		gpio231_pmx_idle = "/pinmux@fb229000/gpio231_pmx_idle";
		gpio235_pmx_func = "/pinmux@fb229000/gpio235_pmx_func";
		gpio235_pmx_idle = "/pinmux@fb229000/gpio235_pmx_idle";
		gpio236_pmx_func = "/pinmux@fb229000/gpio236_pmx_func";
		gpio236_pmx_idle = "/pinmux@fb229000/gpio236_pmx_idle";
		gpio237_pmx_func = "/pinmux@fb229000/gpio237_pmx_func";
		gpio237_pmx_idle = "/pinmux@fb229000/gpio237_pmx_idle";
		gpio238_pmx_func = "/pinmux@fb229000/gpio238_pmx_func";
		gpio238_pmx_idle = "/pinmux@fb229000/gpio238_pmx_idle";
		gpio239_pmx_func = "/pinmux@fb229000/gpio239_pmx_func";
		gpio239_pmx_idle = "/pinmux@fb229000/gpio239_pmx_idle";
		gpio240_pmx_func = "/pinmux@fb229000/gpio240_pmx_func";
		gpio240_pmx_idle = "/pinmux@fb229000/gpio240_pmx_idle";
		gpio241_pmx_func = "/pinmux@fb229000/gpio241_pmx_func";
		gpio241_pmx_idle = "/pinmux@fb229000/gpio241_pmx_idle";
		gpio242_pmx_func = "/pinmux@fb229000/gpio242_pmx_func";
		gpio242_pmx_idle = "/pinmux@fb229000/gpio242_pmx_idle";
		gpio243_pmx_func = "/pinmux@fb229000/gpio243_pmx_func";
		gpio243_pmx_idle = "/pinmux@fb229000/gpio243_pmx_idle";
		gpio244_pmx_func = "/pinmux@fb229000/gpio244_pmx_func";
		gpio244_pmx_idle = "/pinmux@fb229000/gpio244_pmx_idle";
		gpio245_pmx_func = "/pinmux@fb229000/gpio245_pmx_func";
		gpio245_pmx_idle = "/pinmux@fb229000/gpio245_pmx_idle";
		gpio246_pmx_func = "/pinmux@fb229000/gpio246_pmx_func";
		gpio246_pmx_idle = "/pinmux@fb229000/gpio246_pmx_idle";
		gpio247_pmx_func = "/pinmux@fb229000/gpio247_pmx_func";
		gpio247_pmx_idle = "/pinmux@fb229000/gpio247_pmx_idle";
		gpio248_pmx_func = "/pinmux@fb229000/gpio248_pmx_func";
		gpio248_pmx_idle = "/pinmux@fb229000/gpio248_pmx_idle";
		gpio249_pmx_func = "/pinmux@fb229000/gpio249_pmx_func";
		gpio249_pmx_idle = "/pinmux@fb229000/gpio249_pmx_idle";
		gpio250_pmx_func = "/pinmux@fb229000/gpio250_pmx_func";
		gpio250_pmx_idle = "/pinmux@fb229000/gpio250_pmx_idle";
		gpio251_pmx_func = "/pinmux@fb229000/gpio251_pmx_func";
		gpio251_pmx_idle = "/pinmux@fb229000/gpio251_pmx_idle";
		gpio252_pmx_func = "/pinmux@fb229000/gpio252_pmx_func";
		gpio252_pmx_idle = "/pinmux@fb229000/gpio252_pmx_idle";
		gpio253_pmx_func = "/pinmux@fb229000/gpio253_pmx_func";
		gpio253_pmx_idle = "/pinmux@fb229000/gpio253_pmx_idle";
		gpio254_pmx_func = "/pinmux@fb229000/gpio254_pmx_func";
		gpio254_pmx_idle = "/pinmux@fb229000/gpio254_pmx_idle";
		gpio255_pmx_func = "/pinmux@fb229000/gpio255_pmx_func";
		gpio255_pmx_idle = "/pinmux@fb229000/gpio255_pmx_idle";
		gpio256_pmx_func = "/pinmux@fb229000/gpio256_pmx_func";
		gpio256_pmx_idle = "/pinmux@fb229000/gpio256_pmx_idle";
		gpio257_pmx_func = "/pinmux@fb229000/gpio257_pmx_func";
		gpio257_pmx_idle = "/pinmux@fb229000/gpio257_pmx_idle";
		gpio258_pmx_func = "/pinmux@fb229000/gpio258_pmx_func";
		gpio258_pmx_idle = "/pinmux@fb229000/gpio258_pmx_idle";
		pinmuxfb229800 = "/pinmux@fb229800";
		pmx10 = "/pinmux@fb229800";
		gpio160_cfg_func = "/pinmux@fb229800/gpio160_cfg_func";
		gpio160_cfg_idle = "/pinmux@fb229800/gpio160_cfg_idle";
		gpio161_cfg_func = "/pinmux@fb229800/gpio161_cfg_func";
		gpio161_cfg_idle = "/pinmux@fb229800/gpio161_cfg_idle";
		gpio162_cfg_func = "/pinmux@fb229800/gpio162_cfg_func";
		gpio162_cfg_idle = "/pinmux@fb229800/gpio162_cfg_idle";
		gpio163_cfg_func = "/pinmux@fb229800/gpio163_cfg_func";
		gpio163_cfg_idle = "/pinmux@fb229800/gpio163_cfg_idle";
		gpio164_cfg_func = "/pinmux@fb229800/gpio164_cfg_func";
		gpio164_cfg_idle = "/pinmux@fb229800/gpio164_cfg_idle";
		gpio165_cfg_func = "/pinmux@fb229800/gpio165_cfg_func";
		gpio165_cfg_idle = "/pinmux@fb229800/gpio165_cfg_idle";
		gpio166_cfg_func = "/pinmux@fb229800/gpio166_cfg_func";
		gpio166_cfg_idle = "/pinmux@fb229800/gpio166_cfg_idle";
		gpio167_cfg_func = "/pinmux@fb229800/gpio167_cfg_func";
		gpio167_cfg_idle = "/pinmux@fb229800/gpio167_cfg_idle";
		gpio168_cfg_func = "/pinmux@fb229800/gpio168_cfg_func";
		gpio168_cfg_idle = "/pinmux@fb229800/gpio168_cfg_idle";
		gpio169_cfg_func = "/pinmux@fb229800/gpio169_cfg_func";
		gpio169_cfg_idle = "/pinmux@fb229800/gpio169_cfg_idle";
		gpio170_cfg_func = "/pinmux@fb229800/gpio170_cfg_func";
		gpio170_cfg_idle = "/pinmux@fb229800/gpio170_cfg_idle";
		gpio171_cfg_func = "/pinmux@fb229800/gpio171_cfg_func";
		gpio171_cfg_idle = "/pinmux@fb229800/gpio171_cfg_idle";
		gpio172_cfg_func = "/pinmux@fb229800/gpio172_cfg_func";
		gpio172_cfg_idle = "/pinmux@fb229800/gpio172_cfg_idle";
		gpio173_cfg_func = "/pinmux@fb229800/gpio173_cfg_func";
		gpio173_cfg_idle = "/pinmux@fb229800/gpio173_cfg_idle";
		gpio174_cfg_func = "/pinmux@fb229800/gpio174_cfg_func";
		gpio174_cfg_idle = "/pinmux@fb229800/gpio174_cfg_idle";
		gpio175_cfg_func = "/pinmux@fb229800/gpio175_cfg_func";
		gpio175_cfg_idle = "/pinmux@fb229800/gpio175_cfg_idle";
		gpio176_cfg_func = "/pinmux@fb229800/gpio176_cfg_func";
		gpio176_cfg_idle = "/pinmux@fb229800/gpio176_cfg_idle";
		gpio177_cfg_func = "/pinmux@fb229800/gpio177_cfg_func";
		gpio177_cfg_idle = "/pinmux@fb229800/gpio177_cfg_idle";
		gpio178_cfg_func = "/pinmux@fb229800/gpio178_cfg_func";
		gpio178_cfg_idle = "/pinmux@fb229800/gpio178_cfg_idle";
		gpio179_cfg_func = "/pinmux@fb229800/gpio179_cfg_func";
		gpio179_cfg_idle = "/pinmux@fb229800/gpio179_cfg_idle";
		gpio180_cfg_func = "/pinmux@fb229800/gpio180_cfg_func";
		gpio180_cfg_idle = "/pinmux@fb229800/gpio180_cfg_idle";
		gpio181_cfg_func = "/pinmux@fb229800/gpio181_cfg_func";
		gpio181_cfg_idle = "/pinmux@fb229800/gpio181_cfg_idle";
		gpio182_cfg_func = "/pinmux@fb229800/gpio182_cfg_func";
		gpio182_cfg_idle = "/pinmux@fb229800/gpio182_cfg_idle";
		gpio183_cfg_func = "/pinmux@fb229800/gpio183_cfg_func";
		gpio183_cfg_idle = "/pinmux@fb229800/gpio183_cfg_idle";
		gpio184_cfg_func = "/pinmux@fb229800/gpio184_cfg_func";
		gpio184_cfg_idle = "/pinmux@fb229800/gpio184_cfg_idle";
		gpio185_cfg_func = "/pinmux@fb229800/gpio185_cfg_func";
		gpio185_cfg_idle = "/pinmux@fb229800/gpio185_cfg_idle";
		gpio186_cfg_func = "/pinmux@fb229800/gpio186_cfg_func";
		gpio186_cfg_idle = "/pinmux@fb229800/gpio186_cfg_idle";
		gpio187_cfg_func = "/pinmux@fb229800/gpio187_cfg_func";
		gpio187_cfg_idle = "/pinmux@fb229800/gpio187_cfg_idle";
		gpio188_cfg_func = "/pinmux@fb229800/gpio188_cfg_func";
		gpio188_cfg_idle = "/pinmux@fb229800/gpio188_cfg_idle";
		gpio189_cfg_func = "/pinmux@fb229800/gpio189_cfg_func";
		gpio189_cfg_idle = "/pinmux@fb229800/gpio189_cfg_idle";
		gpio190_cfg_func = "/pinmux@fb229800/gpio190_cfg_func";
		gpio190_cfg_idle = "/pinmux@fb229800/gpio190_cfg_idle";
		gpio191_cfg_func = "/pinmux@fb229800/gpio191_cfg_func";
		gpio191_cfg_idle = "/pinmux@fb229800/gpio191_cfg_idle";
		gpio192_cfg_func = "/pinmux@fb229800/gpio192_cfg_func";
		gpio192_cfg_idle = "/pinmux@fb229800/gpio192_cfg_idle";
		gpio193_cfg_func = "/pinmux@fb229800/gpio193_cfg_func";
		gpio193_cfg_idle = "/pinmux@fb229800/gpio193_cfg_idle";
		gpio194_cfg_func = "/pinmux@fb229800/gpio194_cfg_func";
		gpio194_cfg_idle = "/pinmux@fb229800/gpio194_cfg_idle";
		gpio195_cfg_func = "/pinmux@fb229800/gpio195_cfg_func";
		gpio195_cfg_idle = "/pinmux@fb229800/gpio195_cfg_idle";
		gpio196_cfg_func = "/pinmux@fb229800/gpio196_cfg_func";
		gpio196_cfg_idle = "/pinmux@fb229800/gpio196_cfg_idle";
		gpio197_cfg_func = "/pinmux@fb229800/gpio197_cfg_func";
		gpio197_cfg_idle = "/pinmux@fb229800/gpio197_cfg_idle";
		gpio198_cfg_func = "/pinmux@fb229800/gpio198_cfg_func";
		gpio198_cfg_idle = "/pinmux@fb229800/gpio198_cfg_idle";
		gpio199_cfg_func = "/pinmux@fb229800/gpio199_cfg_func";
		gpio199_cfg_idle = "/pinmux@fb229800/gpio199_cfg_idle";
		gpio200_cfg_func = "/pinmux@fb229800/gpio200_cfg_func";
		gpio200_cfg_idle = "/pinmux@fb229800/gpio200_cfg_idle";
		gpio201_cfg_func = "/pinmux@fb229800/gpio201_cfg_func";
		gpio201_cfg_idle = "/pinmux@fb229800/gpio201_cfg_idle";
		gpio202_cfg_func = "/pinmux@fb229800/gpio202_cfg_func";
		gpio202_cfg_idle = "/pinmux@fb229800/gpio202_cfg_idle";
		gpio203_cfg_func = "/pinmux@fb229800/gpio203_cfg_func";
		gpio203_cfg_idle = "/pinmux@fb229800/gpio203_cfg_idle";
		gpio204_cfg_func = "/pinmux@fb229800/gpio204_cfg_func";
		gpio204_cfg_idle = "/pinmux@fb229800/gpio204_cfg_idle";
		gpio205_cfg_func = "/pinmux@fb229800/gpio205_cfg_func";
		gpio205_cfg_idle = "/pinmux@fb229800/gpio205_cfg_idle";
		gpio206_cfg_func = "/pinmux@fb229800/gpio206_cfg_func";
		gpio206_cfg_idle = "/pinmux@fb229800/gpio206_cfg_idle";
		gpio207_cfg_func = "/pinmux@fb229800/gpio207_cfg_func";
		gpio207_cfg_idle = "/pinmux@fb229800/gpio207_cfg_idle";
		gpio208_cfg_func = "/pinmux@fb229800/gpio208_cfg_func";
		gpio208_cfg_idle = "/pinmux@fb229800/gpio208_cfg_idle";
		gpio209_cfg_func = "/pinmux@fb229800/gpio209_cfg_func";
		gpio209_cfg_idle = "/pinmux@fb229800/gpio209_cfg_idle";
		gpio210_cfg_func = "/pinmux@fb229800/gpio210_cfg_func";
		gpio210_cfg_idle = "/pinmux@fb229800/gpio210_cfg_idle";
		gpio211_cfg_func = "/pinmux@fb229800/gpio211_cfg_func";
		gpio211_cfg_idle = "/pinmux@fb229800/gpio211_cfg_idle";
		gpio212_cfg_func = "/pinmux@fb229800/gpio212_cfg_func";
		gpio212_cfg_idle = "/pinmux@fb229800/gpio212_cfg_idle";
		gpio213_cfg_func = "/pinmux@fb229800/gpio213_cfg_func";
		gpio213_cfg_idle = "/pinmux@fb229800/gpio213_cfg_idle";
		gpio214_cfg_func = "/pinmux@fb229800/gpio214_cfg_func";
		gpio214_cfg_idle = "/pinmux@fb229800/gpio214_cfg_idle";
		gpio215_cfg_func = "/pinmux@fb229800/gpio215_cfg_func";
		gpio215_cfg_idle = "/pinmux@fb229800/gpio215_cfg_idle";
		gpio216_cfg_func = "/pinmux@fb229800/gpio216_cfg_func";
		gpio216_cfg_idle = "/pinmux@fb229800/gpio216_cfg_idle";
		gpio217_cfg_func = "/pinmux@fb229800/gpio217_cfg_func";
		gpio217_cfg_idle = "/pinmux@fb229800/gpio217_cfg_idle";
		gpio218_cfg_func = "/pinmux@fb229800/gpio218_cfg_func";
		gpio218_cfg_idle = "/pinmux@fb229800/gpio218_cfg_idle";
		gpio219_cfg_func = "/pinmux@fb229800/gpio219_cfg_func";
		gpio219_cfg_idle = "/pinmux@fb229800/gpio219_cfg_idle";
		gpio220_cfg_func = "/pinmux@fb229800/gpio220_cfg_func";
		gpio220_cfg_idle = "/pinmux@fb229800/gpio220_cfg_idle";
		gpio221_cfg_func = "/pinmux@fb229800/gpio221_cfg_func";
		gpio221_cfg_idle = "/pinmux@fb229800/gpio221_cfg_idle";
		gpio222_cfg_func = "/pinmux@fb229800/gpio222_cfg_func";
		gpio222_cfg_idle = "/pinmux@fb229800/gpio222_cfg_idle";
		gpio223_cfg_func = "/pinmux@fb229800/gpio223_cfg_func";
		gpio223_cfg_idle = "/pinmux@fb229800/gpio223_cfg_idle";
		gpio224_cfg_func = "/pinmux@fb229800/gpio224_cfg_func";
		gpio224_cfg_idle = "/pinmux@fb229800/gpio224_cfg_idle";
		gpio225_cfg_func = "/pinmux@fb229800/gpio225_cfg_func";
		gpio225_cfg_idle = "/pinmux@fb229800/gpio225_cfg_idle";
		gpio226_cfg_func = "/pinmux@fb229800/gpio226_cfg_func";
		gpio226_cfg_idle = "/pinmux@fb229800/gpio226_cfg_idle";
		gpio227_cfg_func = "/pinmux@fb229800/gpio227_cfg_func";
		gpio227_cfg_idle = "/pinmux@fb229800/gpio227_cfg_idle";
		gpio228_cfg_func = "/pinmux@fb229800/gpio228_cfg_func";
		gpio228_cfg_idle = "/pinmux@fb229800/gpio228_cfg_idle";
		gpio230_cfg_func = "/pinmux@fb229800/gpio230_cfg_func";
		gpio230_cfg_idle = "/pinmux@fb229800/gpio230_cfg_idle";
		gpio231_cfg_func = "/pinmux@fb229800/gpio231_cfg_func";
		gpio231_cfg_idle = "/pinmux@fb229800/gpio231_cfg_idle";
		gpio234_cfg_func = "/pinmux@fb229800/gpio234_cfg_func";
		gpio234_cfg_idle = "/pinmux@fb229800/gpio234_cfg_idle";
		gpio235_cfg_func = "/pinmux@fb229800/gpio235_cfg_func";
		gpio235_cfg_idle = "/pinmux@fb229800/gpio235_cfg_idle";
		gpio236_cfg_func = "/pinmux@fb229800/gpio236_cfg_func";
		gpio236_cfg_idle = "/pinmux@fb229800/gpio236_cfg_idle";
		gpio237_cfg_func = "/pinmux@fb229800/gpio237_cfg_func";
		gpio237_cfg_idle = "/pinmux@fb229800/gpio237_cfg_idle";
		gpio238_cfg_func = "/pinmux@fb229800/gpio238_cfg_func";
		gpio238_cfg_idle = "/pinmux@fb229800/gpio238_cfg_idle";
		gpio239_cfg_func = "/pinmux@fb229800/gpio239_cfg_func";
		gpio239_cfg_idle = "/pinmux@fb229800/gpio239_cfg_idle";
		gpio240_cfg_func = "/pinmux@fb229800/gpio240_cfg_func";
		gpio240_cfg_idle = "/pinmux@fb229800/gpio240_cfg_idle";
		gpio241_cfg_func = "/pinmux@fb229800/gpio241_cfg_func";
		gpio241_cfg_idle = "/pinmux@fb229800/gpio241_cfg_idle";
		gpio242_cfg_func = "/pinmux@fb229800/gpio242_cfg_func";
		gpio242_cfg_idle = "/pinmux@fb229800/gpio242_cfg_idle";
		gpio243_cfg_func = "/pinmux@fb229800/gpio243_cfg_func";
		gpio243_cfg_idle = "/pinmux@fb229800/gpio243_cfg_idle";
		gpio244_cfg_func = "/pinmux@fb229800/gpio244_cfg_func";
		gpio244_cfg_idle = "/pinmux@fb229800/gpio244_cfg_idle";
		gpio245_cfg_func = "/pinmux@fb229800/gpio245_cfg_func";
		gpio245_cfg_idle = "/pinmux@fb229800/gpio245_cfg_idle";
		gpio246_cfg_func = "/pinmux@fb229800/gpio246_cfg_func";
		gpio246_cfg_idle = "/pinmux@fb229800/gpio246_cfg_idle";
		gpio247_cfg_func = "/pinmux@fb229800/gpio247_cfg_func";
		gpio247_cfg_idle = "/pinmux@fb229800/gpio247_cfg_idle";
		gpio248_cfg_func = "/pinmux@fb229800/gpio248_cfg_func";
		gpio248_cfg_idle = "/pinmux@fb229800/gpio248_cfg_idle";
		gpio249_cfg_func = "/pinmux@fb229800/gpio249_cfg_func";
		gpio249_cfg_idle = "/pinmux@fb229800/gpio249_cfg_idle";
		gpio250_cfg_func = "/pinmux@fb229800/gpio250_cfg_func";
		gpio250_cfg_idle = "/pinmux@fb229800/gpio250_cfg_idle";
		gpio251_cfg_func = "/pinmux@fb229800/gpio251_cfg_func";
		gpio251_cfg_idle = "/pinmux@fb229800/gpio251_cfg_idle";
		gpio252_cfg_func = "/pinmux@fb229800/gpio252_cfg_func";
		gpio252_cfg_idle = "/pinmux@fb229800/gpio252_cfg_idle";
		gpio253_cfg_func = "/pinmux@fb229800/gpio253_cfg_func";
		gpio253_cfg_idle = "/pinmux@fb229800/gpio253_cfg_idle";
		gpio254_cfg_func = "/pinmux@fb229800/gpio254_cfg_func";
		gpio254_cfg_idle = "/pinmux@fb229800/gpio254_cfg_idle";
		gpio255_cfg_func = "/pinmux@fb229800/gpio255_cfg_func";
		gpio255_cfg_idle = "/pinmux@fb229800/gpio255_cfg_idle";
		gpio256_cfg_func = "/pinmux@fb229800/gpio256_cfg_func";
		gpio256_cfg_idle = "/pinmux@fb229800/gpio256_cfg_idle";
		gpio257_cfg_func = "/pinmux@fb229800/gpio257_cfg_func";
		gpio257_cfg_idle = "/pinmux@fb229800/gpio257_cfg_idle";
		gpio258_cfg_func = "/pinmux@fb229800/gpio258_cfg_func";
		gpio258_cfg_idle = "/pinmux@fb229800/gpio258_cfg_idle";
		amba = "/amba";
		i2c2 = "/amba/i2c@FF88B000";
		i2c3 = "/amba/i2c@FF88C000";
		i2c4 = "/amba/i2c@FF88D000";
		hi6563_pmic = "/amba/i2c@FF88D000/hi6563_pmic@17";
		hi6563_buck1 = "/amba/i2c@FF88D000/hi6563_pmic@17/hi6563_buck1";
		hi6563_ldo1 = "/amba/i2c@FF88D000/hi6563_pmic@17/hi6563_ldo1";
		hi6563_ldo2 = "/amba/i2c@FF88D000/hi6563_pmic@17/hi6563_ldo2";
		hi6563_ldo3 = "/amba/i2c@FF88D000/hi6563_pmic@17/hi6563_ldo3";
		hi6563_ldo4 = "/amba/i2c@FF88D000/hi6563_pmic@17/hi6563_ldo4";
		hi6563_ldo5 = "/amba/i2c@FF88D000/hi6563_pmic@17/hi6563_ldo5";
		hi6563_ldo6 = "/amba/i2c@FF88D000/hi6563_pmic@17/hi6563_ldo6";
		hi6563_ldo7 = "/amba/i2c@FF88D000/hi6563_pmic@17/hi6563_ldo7";
		hi6563_ldo8 = "/amba/i2c@FF88D000/hi6563_pmic@17/hi6563_ldo8";
		hi6563_ldo9 = "/amba/i2c@FF88D000/hi6563_pmic@17/hi6563_ldo9";
		hi6563_buckboost = "/amba/i2c@FF88D000/hi6563_pmic@17/hi6563_buckboost";
		lt9611ux = "/amba/i2c@FF88D000/lt,lt9611ux@2B/port/endpoint";
		max98925_smartpa_l = "/amba/i2c@FF88D000/smartpa@31";
		max98925_smartpa_r = "/amba/i2c@FF88D000/smartpa@34";
		tfa9872_smartpa_l = "/amba/i2c@FF88D000/smartpa@35";
		tfa9872_smartpa_r = "/amba/i2c@FF88D000/smartpa@36";
		tas2560_smartpa_l = "/amba/i2c@FF88D000/smartpa@4C";
		tas2560_smartpa_r = "/amba/i2c@FF88D000/smartpa@4F";
		wireless_cps8601_i2c4 = "/amba/i2c@FF88D000/wireless_cps8601_i2c4@41";
		wireless_mt5806_i2c4 = "/amba/i2c@FF88D000/wireless_mt5806_i2c4@2B";
		i2c6 = "/amba/i2c@FF88E000";
		scharger_v700 = "/amba/i2c@FF88E000/scharger_v700@6B";
		scharger_v700_buck = "/amba/i2c@FF88E000/scharger_v700@6B/scharger_v700_buck";
		hisi_usb_typec_v700 = "/amba/i2c@FF88E000/scharger_v700@6B/hisi_usb_typec_v700";
		scharger_v700_watchdog = "/amba/i2c@FF88E000/scharger_v700@6B/scharger_v700_watchdog";
		scharger_v700_fcp = "/amba/i2c@FF88E000/scharger_v700@6B/scharger_v700_fcp";
		scharger_v700_dc = "/amba/i2c@FF88E000/scharger_v700@6B/scharger_v700_dc";
		scharger_v700_batctl = "/amba/i2c@FF88E000/scharger_v700@6B/scharger_v700_batctl";
		scharger_v700_adc = "/amba/i2c@FF88E000/scharger_v700@6B/scharger_v700_adc";
		scharger_v700_water_det = "/amba/i2c@FF88E000/scharger_v700@6B/scharger_v700_water_det";
		scharger_v700_tcpc = "/amba/i2c@FF88E000/scharger_v700@6B/scharger_v700_tcpc";
		bat_par_ctrl = "/amba/i2c@FF88E000/scharger_v700@6B/bat_par_ctrl";
		scharger_cv = "/amba/i2c@FF88E000/scharger_v700@6B/scharger_cv";
		scharger_v700_coul = "/amba/i2c@FF88E000/scharger_v700@6B/scharger_v700_coul";
		batt_l = "/amba/i2c@FF88E000/scharger_v700@6B/scharger_v700_coul/batt_l";
		batt_h = "/amba/i2c@FF88E000/scharger_v700@6B/scharger_v700_coul/batt_h";
		hisi_scharger_eis = "/amba/i2c@FF88E000/scharger_v700@6B/hisi_scharger_eis@1";
		bq25892_charger_i2c6 = "/amba/i2c@FF88E000/bq25892_charger_i2c6@6B";
		hi6523_charger_i2c6 = "/amba/i2c@FF88E000/hi6523_charger_i2c6@6B";
		hi6526_charger_i2c6 = "/amba/i2c@FF88E000/hi6526_charger_i2c6@6B";
		hisi_usb_typec_v600 = "/amba/i2c@FF88E000/hi6526_charger_i2c6@6B/hisi_usb_typec_v600";
		hi6526_cv = "/amba/i2c@FF88E000/hi6526_charger_i2c6@6B/hi6526_cv";
		wireless_itdp9221_i2c6 = "/amba/i2c@FF88E000/wireless_idtp9221_i2c6@61";
		i2c7 = "/amba/i2c@FF88F000";
		i2c9 = "/amba/i2c@FB227000";
		serial0 = "/amba/uart@ff894000";
		serial4 = "/amba/uart@ff881000";
		serial5 = "/amba/uart@ff885000";
		serial6 = "/amba/uart@ffb82000";
		spi1 = "/amba/spi@ff888000";
		spi3 = "/amba/spi@fb21f000";
		spi5 = "/amba/spi@fb215000";
		spi6 = "/amba/spi@ff88a000";
		gpio0 = "/amba/gpio@ff802000";
		gpio1 = "/amba/gpio@ff806000";
		gpio2 = "/amba/gpio@ff812000";
		gpio3 = "/amba/gpio@ee267000";
		gpio5 = "/amba/gpio@fb22a000";
		gpio6 = "/amba/gpio@fb22e000";
		gpio7 = "/amba/gpio@fb232000";
		gpio8 = "/amba/gpio@fb236000";
		gpio10 = "/amba/gpio@efb05000";
		gpio11 = "/amba/gpio@efb06000";
		etm0_out_port = "/amba/etm@0,fd040000/port/endpoint";
		cti_cpu0 = "/amba/cti_cpu0@0,fd020000";
		etm1_out_port = "/amba/etm@1,fd140000/port/endpoint";
		cti_cpu1 = "/amba/cti_cpu1@1,fd120000";
		etm2_out_port = "/amba/etm@2,fd240000/port/endpoint";
		cti_cpu2 = "/amba/cti_cpu2@2,fd220000";
		etm3_out_port = "/amba/etm@3,fd340000/port/endpoint";
		cti_cpu3 = "/amba/cti_cpu3@3,fd320000";
		etm4_out_port = "/amba/etm@4,fd440000/port/endpoint";
		cti_cpu4 = "/amba/cti_cpu4@4,fd420000";
		etm5_out_port = "/amba/etm@5,fd640000/port/endpoint";
		cti_cpu5 = "/amba/cti_cpu5@5,fd620000";
		etm6_out_port = "/amba/etm@6,fd840000/port/endpoint";
		cti_cpu6 = "/amba/cti_cpu6@6,fd820000";
		etm7_out_port = "/amba/etm@7,fda40000/port/endpoint";
		cti_cpu7 = "/amba/cti_cpu7@7,fda20000";
		funnel1 = "/amba/funnel@1,fd001000";
		funnel1_in_port2_0 = "/amba/funnel@1,fd001000/ports/port@2/endpoint@0";
		funnel1_in_port2_1 = "/amba/funnel@1,fd001000/ports/port@2/endpoint@1";
		funnel1_in_port3_0 = "/amba/funnel@1,fd001000/ports/port@3/endpoint@0";
		funnel1_in_port3_1 = "/amba/funnel@1,fd001000/ports/port@3/endpoint@1";
		funnel1_in_port4 = "/amba/funnel@1,fd001000/ports/port@4/endpoint";
		funnel1_in_port5 = "/amba/funnel@1,fd001000/ports/port@5/endpoint";
		funnel1_in_port6 = "/amba/funnel@1,fd001000/ports/port@6/endpoint";
		funnel1_in_port7_0 = "/amba/funnel@1,fd001000/ports/port@7/endpoint";
		funnel1_out_port0 = "/amba/funnel@1,fd001000/ports/port@8/endpoint";
		etb1 = "/amba/etb@1,fd002000";
		etb1_in_port = "/amba/etb@1,fd002000/ports/port@0/endpoint";
		etb1_out_port = "/amba/etb@1,fd002000/ports/port@1/endpoint";
		funnel2_in_port4 = "/amba/funnel@2,fc031000/ports/port@4/endpoint";
		funnel2_out_port0 = "/amba/funnel@2,fc031000/ports/port@8/endpoint";
		etb2_in_port = "/amba/etb@2,fc036000/ports/port@0/endpoint";
		etb2_out_port = "/amba/etb@2,fc036000/ports/port@1/endpoint";
		etr0_in_port = "/amba/etr@0,fc033000/ports/port/endpoint";
		threshold = "/thermal-zones/soc_thermal/trips/trip-point@0";
		target = "/thermal-zones/soc_thermal/trips/trip-point@1";
		brd_target = "/thermal-zones/soc_thermal/trips/trip-point@2";
		board_threshold = "/thermal-zones/board_thermal/trips/trip-point@0";
		board_target = "/thermal-zones/board_thermal/trips/trip-point@1";
		ip_freq_autodown = "/ip_freq_autodown@0xFFB85000";
		gpu = "/mali@FED40000";
		ipa_sensor0 = "/ipa-sensor@0";
		watchdog0 = "/watchdog0";
		rdr = "/rdr";
		nve_mntn_switch = "/mntn_switch";
		codec_controller = "/codec_controller@e82b9000";
		codec_irq = "/codec_controller@e82b9000/codec_irq";
		da_combine_v3_codec = "/codec_controller@e82b9000/codec_irq/da_combine_v3_codec";
		da_combine_v5_codec = "/codec_controller@e82b9000/codec_irq/da_combine_v5_codec";
		test_codec_irq = "/codec_controller@e82b9000/codec_irq/test_codec_irq";
		test_codec_controller = "/codec_controller@e82b9000/test_codec_controller";
		modem_pinctrl = "/modem_pinctrl";
		gic = "/interrupt-controller@ff000000";
		hisi_prktimer = "/prktimer@fb21b000";
		timer0 = "/timer@fae80000";
		clocks_extreme = "/clocks_extreme";
		clkin_sys = "/clocks_extreme/clkin_sys";
		clkin_sys_serdes = "/clocks_extreme/clkin_sys_serdes";
		clkin_ref = "/clocks_extreme/clkin_ref";
		clk_fll_src = "/clocks_extreme/clk_fll_src";
		clk_ppll1 = "/clocks_extreme/clk_ppll1";
		clk_ppll2 = "/clocks_extreme/clk_ppll2";
		clk_ppll3 = "/clocks_extreme/clk_ppll3";
		clk_ppll5 = "/clocks_extreme/clk_ppll5";
		clk_ppll7 = "/clocks_extreme/clk_ppll7";
		clk_spll = "/clocks_extreme/clk_spll";
		clk_modem_base = "/clocks_extreme/clk_modem_base";
		clk_ulppll_1 = "/clocks_extreme/clk_ulppll_1";
		clk_lbintjpll = "/clocks_extreme/clk_lbintjpll";
		clk_aupll = "/clocks_extreme/clk_aupll";
		clk_scpll = "/clocks_extreme/clk_scpll";
		clk_fnpll = "/clocks_extreme/clk_fnpll";
		clk_ppll_pcie = "/clocks_extreme/clk_ppll_pcie";
		clk_ppll_pcie1 = "/clocks_extreme/clk_ppll_pcie1";
		clk_sdpll = "/clocks_extreme/clk_sdpll";
		pclk = "/clocks_extreme/apb_pclk";
		clk_gate_ppll1 = "/clocks_extreme/clk_ap_ppll1";
		clk_gate_ppll2 = "/clocks_extreme/clk_ap_ppll2";
		clk_div_ppll2_b = "/clocks_extreme/clk_div_ppll2_b";
		clk_gate_ppll2_b = "/clocks_extreme/clk_ap_ppll2_b";
		clk_gate_ppll3 = "/clocks_extreme/clk_ap_ppll3";
		clk_gate_ppll7 = "/clocks_extreme/clk_ap_ppll7";
		clk_gate_ppll0_media = "/clocks_extreme/clk_ppll0_media";
		clk_gate_ppll1_media = "/clocks_extreme/clk_ppll1_media";
		clk_gate_ppll2_media = "/clocks_extreme/clk_ppll2_media";
		clk_gate_ppll2b_media = "/clocks_extreme/clk_ppll2b_media";
		clk_gate_ppll3_media = "/clocks_extreme/clk_ppll3_media";
		clk_gate_ppll7_media = "/clocks_extreme/clk_ppll7_media";
		clk_gate_ppll0_m2 = "/clocks_extreme/clk_ppll0_m2";
		clk_gate_ppll1_m2 = "/clocks_extreme/clk_ppll1_m2";
		clk_gate_ppll2_m2 = "/clocks_extreme/clk_ppll2_m2";
		clk_gate_ppll2b_m2 = "/clocks_extreme/clk_ppll2b_m2";
		clk_gate_ppll3_m2 = "/clocks_extreme/clk_ppll3_m2";
		clk_ppll_eps = "/clocks_extreme/clk_ppll_eps";
		clk_gate_hiface = "/clocks_extreme/clk_hiface";
		clk_sys_ini = "/clocks_extreme/clk_sys_ini";
		clk_div_sysbus = "/clocks_extreme/div_sysbus_pll";
		clk_div_cfgbus = "/clocks_extreme/sc_div_cfgbus";
		pclk_gpio0 = "/clocks_extreme/pclk_gpio0";
		pclk_gpio1 = "/clocks_extreme/pclk_gpio1";
		pclk_gpio2 = "/clocks_extreme/pclk_gpio2";
		pclk_gpio3 = "/clocks_extreme/pclk_gpio3";
		pclk_gpio4 = "/clocks_extreme/pclk_gpio4";
		pclk_gpio5 = "/clocks_extreme/pclk_gpio5";
		pclk_gpio6 = "/clocks_extreme/pclk_gpio6";
		pclk_gpio7 = "/clocks_extreme/pclk_gpio7";
		pclk_gpio8 = "/clocks_extreme/pclk_gpio8";
		pclk_gpio9 = "/clocks_extreme/pclk_gpio9";
		pclk_gpio10 = "/clocks_extreme/pclk_gpio10";
		pclk_gpio11 = "/clocks_extreme/pclk_gpio11";
		pclk_gpio12 = "/clocks_extreme/pclk_gpio12";
		pclk_gpio13 = "/clocks_extreme/pclk_gpio13";
		pclk_gpio14 = "/clocks_extreme/pclk_gpio14";
		pclk_gpio15 = "/clocks_extreme/pclk_gpio15";
		pclk_gpio16 = "/clocks_extreme/pclk_gpio16";
		pclk_gpio17 = "/clocks_extreme/pclk_gpio17";
		pclk_gpio18 = "/clocks_extreme/pclk_gpio18";
		pclk_gpio19 = "/clocks_extreme/pclk_gpio19";
		pclk_gate_wd0_high = "/clocks_extreme/pclk_wd0_high";
		clk_gate_wd0_high = "/clocks_extreme/clk_wd0_high";
		pclk_gate_wd0 = "/clocks_extreme/pclk_wd0";
		pclk_gate_wd1 = "/clocks_extreme/pclk_wd1";
		aclk_gate_media_common = "/clocks_extreme/aclk_media_common";
		aclk_gate_qic_dss = "/clocks_extreme/aclk_qic_dss";
		pclk_gate_media_common = "/clocks_extreme/pclk_media_common";
		pclk_gate_qic_dss_cfg = "/clocks_extreme/pclk_qic_dss_cfg";
		pclk_gate_mmbuf_cfg = "/clocks_extreme/pclk_mmbuf_cfg";
		pclk_gate_disp_qic_subsys = "/clocks_extreme/pclk_disp_qic_subsys";
		aclk_gate_disp_qic_subsys = "/clocks_extreme/aclk_disp_qic_subsys";
		pclk_gate_dss = "/clocks_extreme/pclk_dss";
		codeccssi_mux = "/clocks_extreme/sel_codeccssi";
		clk_gate_codecssi = "/clocks_extreme/clk_codecssi";
		pclk_gate_codecssi = "/clocks_extreme/pclk_codecssi";
		clk_div_aobus_334M = "/clocks_extreme/div_aobus_334M";
		clk_div_aobus = "/clocks_extreme/sc_div_aobus";
		clk_factor_tcxo = "/clocks_extreme/clk_factor_tcxo";
		clk_gate_timer5_a = "/clocks_extreme/clk_timer5_a";
		clk_andgt_hsdt1_usbdp = "/clocks_extreme/clk_hsdt1_usbdp_andgt";
		clk_div_hsdt1_usbdp = "/clocks_extreme/div_hsdt1_usbdp";
		clk_gate_hsdt1_usbdp = "/clocks_extreme/clk_hsdt1_usbdp";
		hclk_gate_usb3otg = "/clocks_extreme/hclk_usb3otg";
		clk_mux_usb_dock = "/clocks_extreme/clkmux_usb_dock";
		pclk_gate_ioc = "/clocks_extreme/pclk_ioc";
		clk_atdvfs = "/clocks_extreme/clk_atdvfs";
		atclk = "/clocks_extreme/clk_at";
		atclk_to_cpu = "/clocks_extreme/clk_at_to_cpu";
		pclk_dbg = "/clocks_extreme/pclk_dbg";
		pclk_div_dbg = "/clocks_extreme/pclkdiv_dbg";
		clk_gate_time_stamp_gt = "/clocks_extreme/clk_timestp_gt";
		clk_div_time_stamp = "/clocks_extreme/clk_timestp_div";
		clk_gate_time_stamp = "/clocks_extreme/clk_time_stamp";
		aclk_gate_perf_stat = "/clocks_extreme/aclk_perf_stat";
		pclk_gate_perf_stat = "/clocks_extreme/pclk_perf_stat";
		clk_div_perf_stat = "/clocks_extreme/clk_perf_div";
		clk_perf_div_gt = "/clocks_extreme/clk_perf_gt";
		clk_gate_perf_stat = "/clocks_extreme/clk_perf_stat";
		clk_gate_perf_ctrl = "/clocks_extreme/clk_perf_ctrl";
		clk_div_cssysdbg = "/clocks_extreme/clk_cssys_div";
		clk_gate_cssysdbg = "/clocks_extreme/clk_cssysdbg";
		clk_div_dmabus = "/clocks_extreme/clk_dmabus_div";
		clk_gate_dmac = "/clocks_extreme/clk_dmac";
		clk_gate_dma_iomcu = "/clocks_extreme/clk_dma_iomcu";
		clk_gate_odt_acpu = "/clocks_extreme/clk_odt_acpu";
		clk_gate_odt_deflate = "/clocks_extreme/clk_odt_deflat";
		clk_gate_tclk_odt = "/clocks_extreme/tclk_odt";
		clk_gate_pfa_tft = "/clocks_extreme/clk_pfa_tft";
		aclk_gate_dss = "/clocks_extreme/aclk_dss";
		clk_sdio_sys = "/clocks_extreme/clk_sdio_sys";
		hclk_gate_sdio = "/clocks_extreme/hclk_sdio";
		pclk_gate_dsi0 = "/clocks_extreme/pclk_dsi0";
		pclk_gate_dsi1 = "/clocks_extreme/pclk_dsi1";
		clk_gate_ldi0 = "/clocks_extreme/clk_ldi0";
		clk_gate_venc2 = "/clocks_extreme/clk_venc2";
		clk_gate_ppll5 = "/clocks_extreme/clk_ap_ppll5";
		clk_gate_fd_func = "/clocks_extreme/clk_fd_func";
		clk_gate_fdai_func = "/clocks_extreme/clk_fdai_func";
		clk_div_hsdt1bus = "/clocks_extreme/clk_div_hsdt1bus";
		clk_andgt_sd_peri = "/clocks_extreme/clkgt_sd_peri";
		clk_div_sd_peri = "/clocks_extreme/clk_div_sd_peri";
		clk_gate_sd_peri = "/clocks_extreme/clk_sd_peri";
		clk_mux_sd_pll = "/clocks_extreme/clk_sd_muxpll";
		clk_div_sd = "/clocks_extreme/clk_sd_div";
		clk_andgt_sd = "/clocks_extreme/clk_sd_gt";
		clk_sd_sys = "/clocks_extreme/clk_sd_sys";
		clk_mux_a53hpm = "/clocks_extreme/clk_a53hpm_mux";
		clk_a53hpm_andgt = "/clocks_extreme/clk_a53hpm_gt";
		clk_div_a53hpm = "/clocks_extreme/clk_a53hpm_div";
		clk_320m_pll_gt = "/clocks_extreme/gt_clk_320m_pll";
		clk_div_320m = "/clocks_extreme/sc_div_320m";
		clk_gate_uart4 = "/clocks_extreme/clk_uart4";
		pclk_gate_uart4 = "/clocks_extreme/pclk_uart4";
		clk_mux_uarth = "/clocks_extreme/clkmux_uarth";
		clk_div_uarth = "/clocks_extreme/clkdiv_uarth";
		clk_andgt_uarth = "/clocks_extreme/clkgt_uarth";
		clk_gate_uart5 = "/clocks_extreme/clk_uart5";
		pclk_gate_uart5 = "/clocks_extreme/pclk_uart5";
		clk_mux_uartl = "/clocks_extreme/clkmux_uartl";
		clk_div_uartl = "/clocks_extreme/clkdiv_uartl";
		clk_andgt_uartl = "/clocks_extreme/clkgt_uartl";
		clk_gate_uart0 = "/clocks_extreme/clk_uart0";
		pclk_gate_uart0 = "/clocks_extreme/pclk_uart0";
		clk_mux_uart0 = "/clocks_extreme/clkmux_uart0";
		clk_div_uart0 = "/clocks_extreme/clkdiv_uart0";
		clk_andgt_uart0 = "/clocks_extreme/clkgt_uart0";
		clk_factor_uart0 = "/clocks_extreme/clk_uart0_fac";
		clk_uart0_dbg = "/clocks_extreme/uart0clk_dbg";
		clk_uart6 = "/clocks_extreme/uart6clk";
		clk_gate_uart3 = "/clocks_extreme/clk_uart3";
		clk_gate_uart8 = "/clocks_extreme/clk_uart8";
		clk_gate_uart7 = "/clocks_extreme/clk_uart7";
		clk_gate_i2c2_acpu = "/clocks_extreme/clk_i2c2_acpu";
		clk_gate_i2c3 = "/clocks_extreme/clk_i2c3";
		clk_gate_i2c4 = "/clocks_extreme/clk_i2c4";
		clk_gate_i2c6_acpu = "/clocks_extreme/clk_i2c6_acpu";
		clk_gate_i2c7 = "/clocks_extreme/clk_i2c7";
		pclk_gate_i2c2 = "/clocks_extreme/pclk_i2c2";
		pclk_gate_i2c3 = "/clocks_extreme/pclk_i2c3";
		pclk_gate_i2c4 = "/clocks_extreme/pclk_i2c4";
		pclk_gate_i2c6_acpu = "/clocks_extreme/pclk_i2c6_acpu";
		pclk_gate_i2c7 = "/clocks_extreme/pclk_i2c7";
		clk_div_i2c = "/clocks_extreme/clkdiv_i2c";
		clk_mux_i2c = "/clocks_extreme/clkmux_i2c";
		clk_gate_i2c0 = "/clocks_extreme/clk_i2c0";
		clk_gate_i2c1 = "/clocks_extreme/clk_i2c1";
		clk_gate_i2c2 = "/clocks_extreme/clk_i2c2";
		clk_andgt_i3c4 = "/clocks_extreme/clkgt_i3c4";
		clk_div_i3c4 = "/clocks_extreme/clkdiv_i3c4";
		clk_gate_i3c4 = "/clocks_extreme/clk_i3c4";
		pclk_gate_i3c4 = "/clocks_extreme/pclk_i3c4";
		clk_andgt_spi1 = "/clocks_extreme/clkgt_spi1";
		clk_div_spi1 = "/clocks_extreme/clkdiv_spi1";
		clk_mux_spi1 = "/clocks_extreme/clkmux_spi1";
		clk_gate_spi1 = "/clocks_extreme/clk_spi1";
		clk_andgt_spi4 = "/clocks_extreme/clkgt_spi4";
		clk_div_spi4 = "/clocks_extreme/clkdiv_spi4";
		clk_mux_spi4 = "/clocks_extreme/clkmux_spi4";
		clk_gate_spi4 = "/clocks_extreme/clk_spi4";
		pclk_gate_spi1 = "/clocks_extreme/pclk_spi1";
		pclk_gate_spi4 = "/clocks_extreme/pclk_spi4";
		clk_andgt_spi6 = "/clocks_extreme/clkgt_spi6";
		clk_div_spi6 = "/clocks_extreme/clkdiv_spi6";
		clk_mux_spi6 = "/clocks_extreme/clkmux_spi6";
		clk_gate_spi6 = "/clocks_extreme/clk_spi6";
		pclk_gate_spi6 = "/clocks_extreme/pclk_spi6";
		clk_gate_spi0 = "/clocks_extreme/clk_spi0";
		clk_fac_180m = "/clocks_extreme/clkfac_180m";
		clk_gate_iomcu_peri0 = "/clocks_extreme/clk_gate_peri0";
		clk_gate_spi2 = "/clocks_extreme/clk_spi2";
		clk_gate_usb3otg_ref = "/clocks_extreme/clk_usb3otg_ref";
		clk_usb3_32k_div = "/clocks_extreme/clkdiv_usb3_32k";
		clk_factor_usb3phy_pll = "/clocks_extreme/clkfac_usb3phy";
		clk_usb2phy_ref_div = "/clocks_extreme/clkdiv_usb2phy_ref";
		clk_mux_ulpi = "/clocks_extreme/sel_ulpi_ref";
		clk_gate_ulpi_ref = "/clocks_extreme/clk_ulpi_ref";
		clk_hsdt1_eusb_mux = "/clocks_extreme/sel_hsdt1_eusb";
		clk_gate_hsdt1_eusb = "/clocks_extreme/clk_hsdt1_eusb";
		clk_gate_abb_usb = "/clocks_extreme/clk_abb_usb";
		clk_pcie1pll_serdes = "/clocks_extreme/clk_pcie1pll_serdes";
		clk_hsdt_subsys_ini = "/clocks_extreme/clk_hsdt_subsys_ini";
		pclk_gate_hsdt0_pcie = "/clocks_extreme/pclk_hsdt0_pcie";
		pclk_gate_hsdt1_pcie1 = "/clocks_extreme/pclk_hsdt1_pcie1";
		pclk_div_pcie = "/clocks_extreme/pclk_pcie_div";
		pclk_andgt_pcie = "/clocks_extreme/pclk_pcie_andgt";
		clk_gate_ufsphy_ref = "/clocks_extreme/clk_ufsphy_ref";
		clk_gate_ufsio_ref = "/clocks_extreme/clk_ufsio_ref";
		clk_gate_ao_asp = "/clocks_extreme/clk_ao_asp";
		clk_div_ao_asp = "/clocks_extreme/clk_ao_asp_div";
		clk_mux_ao_asp = "/clocks_extreme/clkmux_ao_asp";
		clk_div_ao_asp_gt = "/clocks_extreme/clk_ao_asp_gt";
		pclk_gate_pctrl = "/clocks_extreme/pclk_pctrl";
		clk_andgt_ptp = "/clocks_extreme/clk_ptp_gt";
		clk_div_ptp = "/clocks_extreme/clk_ptp_div";
		clk_gate_blpwm1 = "/clocks_extreme/clk_blpwm1";
		clk_gate_blpwm = "/clocks_extreme/clk_blpwm";
		clk_syscnt_div = "/clocks_extreme/clk_syscnt_div";
		clk_gate_gps_ref = "/clocks_extreme/clk_gps_ref";
		clk_mux_gps_ref = "/clocks_extreme/clkmux_gps_ref";
		clk_gate_mdm2gps0 = "/clocks_extreme/clk_mdm2gps0";
		clk_gate_mdm2gps1 = "/clocks_extreme/clk_mdm2gps1";
		clk_gate_mdm2gps2 = "/clocks_extreme/clk_mdm2gps2";
		clk_gate_ldi1 = "/clocks_extreme/clk_ldi1";
		peri_volt_no_avs_l = "/clocks_extreme/peri_volt_no_avs_l";
		peri_volt_hold = "/clocks_extreme/peri_volt_hold";
		peri_volt_middle = "/clocks_extreme/peri_volt_middle";
		peri_volt_low = "/clocks_extreme/peri_volt_low";
		eps_volt_high = "/clocks_extreme/eps_volt_high";
		eps_volt_middle = "/clocks_extreme/eps_volt_middle";
		eps_volt_low = "/clocks_extreme/eps_volt_low";
		venc_volt_hold = "/clocks_extreme/venc_volt_hold";
		vdec_volt_hold = "/clocks_extreme/vdec_volt_hold";
		edc_volt_hold = "/clocks_extreme/edc_volt_hold";
		efuse_volt_hold = "/clocks_extreme/efuse_volt_hold";
		ldi0_volt_hold = "/clocks_extreme/ldi0_volt_hold";
		seplat_volt_hold = "/clocks_extreme/seplat_volt_hold";
		clk_mux_dpctrl_16m = "/clocks_extreme/clk_mux_16m_dp";
		clk_gt_dpctrl_16m = "/clocks_extreme/clk_gt_16m_dp";
		clk_div_dpctrl_16m = "/clocks_extreme/div_dpctrl16m";
		clk_gate_dpctrl_16m = "/clocks_extreme/clk_dpctrl_16m";
		clk_mux_dpctr_pixel = "/clocks_extreme/mux_dpctr_pixel";
		clk_andgt_dpctr_pixel = "/clocks_extreme/gt_dpctr_pixel";
		clk_div_dpctr_pixel = "/clocks_extreme/div_dpctr_pixel";
		clk_gate_dpctrl_pixel = "/clocks_extreme/dpctrl_pixel";
		aclk_gate_dpctrl = "/clocks_extreme/aclk_dpctrl";
		clk_gate_ispfunc3freq = "/clocks_extreme/clk_ispfunc3freq";
		clk_gate_ispfunc4freq = "/clocks_extreme/clk_ispfunc4freq";
		clk_gate_ispfunc5freq = "/clocks_extreme/clk_ispfunc5freq";
		clk_gate_ispfunc3 = "/clocks_extreme/clk_ispfunc3";
		clk_gate_ispfunc4 = "/clocks_extreme/clk_ispfunc4";
		clk_gate_ispfunc5 = "/clocks_extreme/clk_ispfunc5";
		clk_gt_isp_i2c = "/clocks_extreme/clk_gt_isp_i2c";
		clk_div_isp_i2c = "/clocks_extreme/clk_div_isp_i2c";
		clk_gate_isp_i2c_media = "/clocks_extreme/clk_isp_i2c_media";
		clk_gate_isp_snclk0 = "/clocks_extreme/clk_isp_snclk0";
		clk_gate_isp_snclk1 = "/clocks_extreme/clk_isp_snclk1";
		clk_gate_isp_snclk2 = "/clocks_extreme/clk_isp_snclk2";
		clk_gate_isp_snclk3 = "/clocks_extreme/clk_isp_snclk3";
		clk_isp_snclk_mux0 = "/clocks_extreme/clk_mux_ispsn0";
		clk_isp_snclk_div0 = "/clocks_extreme/clk_div_ispsn0";
		clk_isp_snclk_mux1 = "/clocks_extreme/clk_mux_ispsn1";
		clk_isp_snclk_div1 = "/clocks_extreme/clk_div_ispsn1";
		clk_isp_snclk_mux2 = "/clocks_extreme/clk_mux_ispsn2";
		clk_isp_snclk_div2 = "/clocks_extreme/clk_div_ispsn2";
		clk_isp_snclk_mux3 = "/clocks_extreme/clk_mux_ispsn3";
		clk_isp_snclk_div3 = "/clocks_extreme/clk_div_ispsn3";
		clk_isp_snclk_fac = "/clocks_extreme/clk_fac_ispsn";
		clk_isp_snclk_angt = "/clocks_extreme/clk_ispsn_gt";
		clk_gate_rxdphy0_cfg = "/clocks_extreme/clk_rxdphy0_cfg";
		clk_gate_rxdphy1_cfg = "/clocks_extreme/clk_rxdphy1_cfg";
		clk_gate_rxdphy2_cfg = "/clocks_extreme/clk_rxdphy2_cfg";
		clk_gate_rxdphy3_cfg = "/clocks_extreme/clk_rxdphy3_cfg";
		clk_gate_rxdphy4_cfg = "/clocks_extreme/clk_rxdphy4_cfg";
		clk_gate_rxdphy5_cfg = "/clocks_extreme/clk_rxdphy5_cfg";
		clk_gate_rxdphy_cfg = "/clocks_extreme/clk_rxdphy_cfg";
		clk_div_rxdphy_cfg = "/clocks_extreme/div_rxdphy_cfg";
		clkandgt_rxdphy_cfg = "/clocks_extreme/clkgt_rxdphy_cfg";
		clk_gate_txdphy0_cfg = "/clocks_extreme/clk_txdphy0_cfg";
		clk_gate_txdphy0_ref = "/clocks_extreme/clk_txdphy0_ref";
		clk_gate_txdphy1_cfg = "/clocks_extreme/clk_txdphy1_cfg";
		clk_gate_txdphy1_ref = "/clocks_extreme/clk_txdphy1_ref";
		clkandgt_rxdphy_fll = "/clocks_extreme/clkgt_rxdphy_fll";
		clk_rxdphy_fll_div = "/clocks_extreme/div_rxdphy_fll";
		clk_mux_rxdphy_cfg = "/clocks_extreme/clk_rxdphy_mux";
		clk_media_common_sw = "/clocks_extreme/sel_media_common_pll";
		clkandgt_media_common = "/clocks_extreme/clkgt_media_common";
		clk_media_common_div = "/clocks_extreme/clkdiv_media_common";
		clk_gate_media_commonfreq = "/clocks_extreme/clk_media_commonfreq";
		clk_gate_media_common = "/clocks_extreme/clk_media_common";
		clk_gate_brg = "/clocks_extreme/clk_brg";
		clk_sw_ao_loadmonitor = "/clocks_extreme/clk_ao_loadmonitor_sw";
		pclk_gate_loadmonitor = "/clocks_extreme/pclk_loadmonitor";
		clk_gate_loadmonitor = "/clocks_extreme/clk_loadmonitor";
		clk_div_loadmonitor = "/clocks_extreme/clk_loadmonitor_div";
		clk_gt_loadmonitor = "/clocks_extreme/clk_loadmonitor_gt";
		pclk_gate_loadmonitor_l = "/clocks_extreme/pclk_loadmonitor_l";
		clk_gate_loadmonitor_l = "/clocks_extreme/clk_loadmonitor_l";
		clk_gate_media_tcxo = "/clocks_extreme/clk_media_tcxo";
		clk_gate_ivp32dsp_corefreq = "/clocks_extreme/clk_ivpdsp_corefreq";
		clk_gate_ivp32dsp_core = "/clocks_extreme/clk_ivpdsp_core";
		clk_gate_ivp1dsp_corefreq = "/clocks_extreme/clk_ivp1dsp_corefreq";
		clk_gate_ivp1dsp_core = "/clocks_extreme/clk_ivp1dsp_core";
		clk_gate_arppfreq = "/clocks_extreme/clk_arpp_topfreq";
		clk_gate_arpp = "/clocks_extreme/clk_arpp_top";
		clk_ade_func_mux = "/clocks_extreme/clkmux_ade_func";
		clk_andgt_ade_func = "/clocks_extreme/clkgt_ade_func";
		clk_div_ade_func = "/clocks_extreme/clk_ade_func_div";
		clk_gate_ade_funcfreq = "/clocks_extreme/clk_ade_funcfreq";
		clk_gate_ade_func = "/clocks_extreme/clk_ade_func";
		aclk_gate_asc = "/clocks_extreme/aclk_asc";
		clk_gate_dss_axi_mm = "/clocks_extreme/clk_dss_axi_mm";
		clk_gate_mmbuf = "/clocks_extreme/clk_mmbuf";
		pclk_gate_mmbuf = "/clocks_extreme/pclk_mmbuf";
		clk_sw_mmbuf = "/clocks_extreme/aclk_mmbuf_sw";
		aclk_div_mmbuf = "/clocks_extreme/aclk_mmbuf_div";
		pclk_div_mmbuf = "/clocks_extreme/pclk_mmbuf_div";
		clk_gate_pfa_gt = "/clocks_extreme/clk_pfa_gt";
		clk_div_pfa = "/clocks_extreme/clk_pfa_div";
		clk_gate_pfa_ref = "/clocks_extreme/clk_pfa_ref";
		hclk_gate_pfa = "/clocks_extreme/hclk_pfa";
		clk_gate_pfa = "/clocks_extreme/clk_pfa";
		clk_gate_dra_ref = "/clocks_extreme/clk_dra_ref";
		aclk_gate_dra = "/clocks_extreme/aclk_dra";
		osc32k = "/clocks_extreme/osc32khz";
		osc19m = "/clocks_extreme/osc19mhz";
		clk_480m = "/clocks_extreme/clk_480m";
		clk_invalid = "/clocks_extreme/clk_invalid";
		autodiv_sysbus = "/clocks_extreme/autodiv_sysbus";
		autodiv_hsdt1bus = "/clocks_extreme/autodiv_hsdt1bus";
		autodiv_cfgbus = "/clocks_extreme/autodiv_cfgbus";
		autodiv_dmabus = "/clocks_extreme/autodiv_dmabus";
		autodiv_isp_dvfs = "/clocks_extreme/autodiv_isp_dvfs";
		autodiv_isp = "/clocks_extreme/autodiv_isp";
		clk_gate_atdiv_hsdt1bus = "/clocks_extreme/clk_atdiv_hsdt1bus";
		clk_gate_atdiv_dma = "/clocks_extreme/clk_atdiv_dma";
		clk_gate_atdiv_cfg = "/clocks_extreme/clk_atdiv_cfg";
		clk_gate_atdiv_sys = "/clocks_extreme/clk_atdiv_sys";
		clk_fpga_1p92 = "/clocks_extreme/clk_fpga_1p92";
		clk_fpga_2m = "/clocks_extreme/clk_fpga_2m";
		clk_fpga_10m = "/clocks_extreme/clk_fpga_10m";
		clk_fpga_19m = "/clocks_extreme/clk_fpga_19m";
		clk_fpga_20m = "/clocks_extreme/clk_fpga_20m";
		clk_fpga_24m = "/clocks_extreme/clk_fpga_24m";
		clk_fpga_26m = "/clocks_extreme/clk_fpga_26m";
		clk_fpga_27m = "/clocks_extreme/clk_fpga_27m";
		clk_fpga_32m = "/clocks_extreme/clk_fpga_32m";
		clk_fpga_40m = "/clocks_extreme/clk_fpga_40m";
		clk_fpga_48m = "/clocks_extreme/clk_fpga_48m";
		clk_fpga_50m = "/clocks_extreme/clk_fpga_50m";
		clk_fpga_57m = "/clocks_extreme/clk_fpga_57m";
		clk_fpga_60m = "/clocks_extreme/clk_fpga_60m";
		clk_fpga_64m = "/clocks_extreme/clk_fpga_64m";
		clk_fpga_80m = "/clocks_extreme/clk_fpga_80m";
		clk_fpga_100m = "/clocks_extreme/clk_fpga_100m";
		clk_fpga_160m = "/clocks_extreme/clk_fpga_160m";
		clk_gate_blpwm3 = "/clocks_extreme/clk_blpwm3";
		clk_gate_blpwm4 = "/clocks_extreme/clk_blpwm4";
		clk_gate_pcie0pll = "/clocks_extreme/clk_ap_pcie0pll";
		clk_gate_hsdt0_pcie0_mcu = "/clocks_extreme/clk_hsdt0_pcie0_mcu";
		clk_gate_hsdt0_pcie1_mcu = "/clocks_extreme/clk_hsdt0_pcie1_mcu";
		clk_gate_hsdt0_pcie0_mcu_bus = "/clocks_extreme/clk_hsdt0_pcie0_mcu_bus";
		clk_gate_hsdt0_pcie1_mcu_bus = "/clocks_extreme/clk_hsdt0_pcie1_mcu_bus";
		clk_gate_hsdt0_pcie0_mcu_32k = "/clocks_extreme/clk_hsdt0_pcie0_mcu_32k";
		clk_gate_hsdt0_pcie1_mcu_32k = "/clocks_extreme/clk_hsdt0_pcie1_mcu_32k";
		clk_gate_hsdt0_pcie0_mcu_19p2 = "/clocks_extreme/clk_hsdt0_pcie0_mcu_19p2";
		clk_gate_hsdt0_pcie1_mcu_19p2 = "/clocks_extreme/clk_hsdt0_pcie1_mcu_19p2";
		clk_gate_pciephy_ref = "/clocks_extreme/clk_pciephy_ref";
		clk_gate_pcie1phy_ref = "/clocks_extreme/clk_pcie1phy_ref";
		pclk_gate_pcie_sys = "/clocks_extreme/pclk_pcie_sys";
		pclk_gate_pcie1_sys = "/clocks_extreme/pclk_pcie1_sys";
		pclk_gate_pcie_phy = "/clocks_extreme/pclk_pcie_phy";
		pclk_gate_pcie1_phy = "/clocks_extreme/pclk_pcie1_phy";
		aclk_gate_pcie = "/clocks_extreme/aclk_pcie";
		clk_gate_hsdt_tcu = "/clocks_extreme/clk_hsdt_tcu";
		clk_gate_hsdt_tbu = "/clocks_extreme/clk_hsdt_tbu";
		clk_gate_pcie1_tbu = "/clocks_extreme/clk_pcie1_tbu";
		aclk_gate_pcie1 = "/clocks_extreme/aclk_pcie1";
		clk_gate_sdpll = "/clocks_extreme/clk_ap_sdpll";
		aclk_gate_usb3otg = "/clocks_extreme/aclk_usb3otg";
		aclk_gate_usb3otg_asyncbrg = "/clocks_extreme/aclk_asyncbrg";
		clk_andgt_sdiopll = "/clocks_extreme/clkgt_sdiopll";
		clk_div_sdiopll = "/clocks_extreme/clkdiv_sdiopll";
		clk_sdio_sys_gt = "/clocks_extreme/clk_sdio_sys_gt";
		clk_mux_sdio_pll = "/clocks_extreme/clk_mux_sdio_pll";
		clk_gate_sdio = "/clocks_extreme/clk_sdio";
		clk_gate_sd = "/clocks_extreme/clk_sd";
		hclk_gate_sd = "/clocks_extreme/hclk_sd";
		clk_mux_sd_sys = "/clocks_extreme/clk_sd_muxsys";
		clk_andgt_sdpll = "/clocks_extreme/clkgt_sdpll";
		clk_div_sdpll = "/clocks_extreme/clkdiv_sdpll";
		clk_sd_sys_gt = "/clocks_extreme/clk_sd_sys_gt";
		clk_gate_usb31phy_apb = "/clocks_extreme/usb31phy_apb";
		hclk_gate_dcdr_mux = "/clocks_extreme/hclk_dcdr_mux";
		clk_gate_hi_usb3_suspend = "/clocks_extreme/hi_usb3_suspend";
		clk_gate_usbdp_mcu_32k = "/clocks_extreme/usbdp_mcu_32k";
		clk_gate_snp_usb3_suspend = "/clocks_extreme/snp_usb3_32k";
		clk_gate_hsdt1_usbdp_mcu = "/clocks_extreme/hsdt1_usbdp_mcu";
		clk_gate_hsdt1_usbdp_mcu_bus = "/clocks_extreme/usbdp_mcu_bus";
		clk_gate_hi_usb3_sys = "/clocks_extreme/clk_hi_usb3_sys";
		aclk_gate_hi_usb3 = "/clocks_extreme/aclk_hi_usb3";
		aclk_gate_snp_usb3 = "/clocks_extreme/aclk_snp_usb3";
		clk_gate_hsdt1_usbdp_mcu_19p2 = "/clocks_extreme/usbdp_mcu_19p2";
		pclk_gate_usb2phy = "/clocks_extreme/pclk_usb2phy";
		clk_gate_hi_usb3ctrl_ref = "/clocks_extreme/hi_usb3crtl";
		clk_gate_snp_usb3ctrl_ref = "/clocks_extreme/snp_usb3crtl";
		pclk_gate_usb_sctrl = "/clocks_extreme/pclk_usb_sctrl";
		clk_andgt_usb2phy_ref = "/clocks_extreme/clkgt_usb2phy_ref";
		clk_gate_usb2phy_ref = "/clocks_extreme/clk_usb2phy_ref";
		clk_gate_usbdp_aux = "/clocks_extreme/clk_usbdp_aux";
		clkgt_usb2_ulpi = "/clocks_extreme/clkgt_usb2_ulpi";
		clk_div_usb2_ulpi = "/clocks_extreme/clk_div_usb2_ulpi";
		clk_gate_usb2_ulpi = "/clocks_extreme/clk_usb2_ulpi";
		pclk_gate_dpctrl = "/clocks_extreme/pclk_dpctrl";
		clk_gate_aupll = "/clocks_extreme/clk_ap_aupll";
		pclk_gpio20 = "/clocks_extreme/pclk_gpio20";
		pclk_gpio21 = "/clocks_extreme/pclk_gpio21";
		clk_gate_timer5_b = "/clocks_extreme/clk_timer5_b";
		clk_mux_timer5_a = "/clocks_extreme/clkmux_timer5_a";
		clk_mux_timer5_b = "/clocks_extreme/clkmux_timer5_b";
		clk_gate_timer5 = "/clocks_extreme/clk_timer5";
		clk_mux_i2c9 = "/clocks_extreme/clkmux_i2c9";
		clk_andgt_i2c9 = "/clocks_extreme/clkgt_i2c9";
		clk_div_i2c9 = "/clocks_extreme/clkdiv_i2c9";
		clk_gate_i2c9 = "/clocks_extreme/clk_i2c9";
		pclk_gate_i2c9 = "/clocks_extreme/pclk_i2c9";
		clk_andgt_spi3_ulppll = "/clocks_extreme/gt_spi3_ulppll";
		clk_div_spi3_ulppll = "/clocks_extreme/div_spi3_ulppll";
		clk_andgt_spi3 = "/clocks_extreme/clkgt_spi3";
		clk_div_spi3 = "/clocks_extreme/clkdiv_spi3";
		clk_mux_spi3 = "/clocks_extreme/clkmux_spi3";
		clk_gate_spi = "/clocks_extreme/clk_spi3";
		pclk_gate_spi = "/clocks_extreme/pclk_spi3";
		clk_gate_qic_spidma = "/clocks_extreme/clk_qic_spidma";
		clk_andgt_spi5_ulppll = "/clocks_extreme/gt_spi5_ulppll";
		clk_div_spi5_ulppll = "/clocks_extreme/div_spi5_ulppll";
		clk_andgt_spi5 = "/clocks_extreme/clkgt_spi5";
		clk_div_spi5 = "/clocks_extreme/clkdiv_spi5";
		clk_mux_spi5 = "/clocks_extreme/clkmux_spi5";
		clk_gate_spi5 = "/clocks_extreme/clk_spi5";
		pclk_gate_spi5 = "/clocks_extreme/pclk_spi5";
		clk_andgt_32kpll_pcieaux = "/clocks_extreme/clkgt_32kpll_pcieaux";
		clk_div_32kpll_pcieaux = "/clocks_extreme/div_32kpll_pcieaux";
		clk_mux_pcieaux = "/clocks_extreme/clkmux_pcieaux";
		clk_gate_hsdt0_pcieaux = "/clocks_extreme/clk_hsdt0_pcie_aux";
		clk_gate_pcieaux = "/clocks_extreme/clk_pcie0_aux";
		clk_gate_pcie1aux = "/clocks_extreme/clk_pcie1_aux";
		pclk_gate_rtc = "/clocks_extreme/pclk_rtc";
		pclk_ao_gpio0 = "/clocks_extreme/pclk_ao_gpio0";
		pclk_ao_gpio1 = "/clocks_extreme/pclk_ao_gpio1";
		pclk_ao_gpio2 = "/clocks_extreme/pclk_ao_gpio2";
		pclk_ao_gpio3 = "/clocks_extreme/pclk_ao_gpio3";
		pclk_ao_gpio4 = "/clocks_extreme/pclk_ao_gpio4";
		pclk_ao_gpio5 = "/clocks_extreme/pclk_ao_gpio5";
		pclk_ao_gpio6 = "/clocks_extreme/pclk_ao_gpio6";
		pclk_ao_gpio29 = "/clocks_extreme/pclk_ao_gpio29";
		pclk_ao_gpio30 = "/clocks_extreme/pclk_ao_gpio30";
		pclk_ao_gpio31 = "/clocks_extreme/pclk_ao_gpio31";
		pclk_ao_gpio32 = "/clocks_extreme/pclk_ao_gpio32";
		pclk_ao_gpio33 = "/clocks_extreme/pclk_ao_gpio33";
		pclk_ao_gpio34 = "/clocks_extreme/pclk_ao_gpio34";
		pclk_ao_gpio35 = "/clocks_extreme/pclk_ao_gpio35";
		pclk_ao_gpio36 = "/clocks_extreme/pclk_ao_gpio36";
		clk_andgt_blpwm2 = "/clocks_extreme/clkgt_blpwm2";
		clk_div_blpwm2 = "/clocks_extreme/clkdiv_blpwm2";
		clk_gate_blpwm2 = "/clocks_extreme/clk_blpwm2";
		pclk_gate_syscnt = "/clocks_extreme/pclk_syscnt";
		clk_gate_syscnt = "/clocks_extreme/clk_syscnt";
		clkmux_syscnt = "/clocks_extreme/clkmux_syscnt";
		clkgt_asp_codec = "/clocks_extreme/clkgt_asp_codec";
		clkdiv_asp_codec = "/clocks_extreme/clkdiv_asp_codec";
		clk_asp_codec = "/clocks_extreme/clk_asp_codec";
		clk_gate_asp_subsys = "/clocks_extreme/clk_asp_subsys";
		clk_mux_asp_pll = "/clocks_extreme/clk_asp_pll_sel";
		clk_ao_asp_32kpll_mux = "/clocks_extreme/sel_ao_asp_32kpll";
		clk_gate_asp_tcxo = "/clocks_extreme/clk_asp_tcxo";
		clk_gate_dp_audio_pll = "/clocks_extreme/clk_dp_audio_pll";
		clkdiv_dp_audio_pll_ao = "/clocks_extreme/clk_dp_audio_pll_ao_div";
		clkgt_dp_audio_pll_ao = "/clocks_extreme/clk_dp_audio_pll_ao_gt";
		clk_mux_ao_camera = "/clocks_extreme/clkmux_ao_camera";
		clk_andgt_ao_camera = "/clocks_extreme/clkgt_ao_camera";
		clk_div_ao_camera = "/clocks_extreme/clkdiv_ao_camera";
		clk_gate_ao_tof = "/clocks_extreme/clk_ao_tof";
		clk_gate_ao_camera = "/clocks_extreme/clk_ao_camera";
		pclk_gate_ao_loadmonitor = "/clocks_extreme/pclk_ao_loadmonitor";
		clk_gate_ao_loadmonitor = "/clocks_extreme/clk_ao_loadmonitor";
		clk_div_ao_loadmonitor = "/clocks_extreme/clk_ao_loadmonitor_div";
		clk_gt_ao_loadmonitor = "/clocks_extreme/clk_ao_loadmonitor_gt";
		clk_andgt_out0 = "/clocks_extreme/clkgt_out0";
		clk_mux_out0 = "/clocks_extreme/clkmux_out0";
		clk_div_out0 = "/clocks_extreme/clkdiv_out0";
		clk_gate_out0 = "/clocks_extreme/clk_out0";
		clk_i2c1_gate_iomcu = "/clocks_extreme/clk_i2c1_gt";
		clk_dss_tcxo = "/clocks_extreme/clk_dss_tcxo";
		clk_mux_vivobus = "/clocks_extreme/clk_vivobus_mux";
		clk_gate_vivobus_andgt = "/clocks_extreme/clk_vivobus_gt";
		clk_div_vivobus = "/clocks_extreme/clk_vivobus_div";
		clk_gate_vivobus = "/clocks_extreme/clk_vivobus";
		clk_mux_vdec = "/clocks_extreme/clkmux_vdec";
		clk_andgt_vdec = "/clocks_extreme/clkgt_vdec";
		clk_div_vdec = "/clocks_extreme/clkdiv_vdec";
		clk_gate_vdecfreq = "/clocks_extreme/clk_vdecfreq";
		pclk_gate_vdec = "/clocks_extreme/pclk_vdec";
		aclk_gate_vdec = "/clocks_extreme/aclk_vdec";
		clk_mux_arpp = "/clocks_extreme/clkmux_arpp_top";
		clk_andgt_arpp = "/clocks_extreme/clkgt_arpp_top";
		clk_div_arpp = "/clocks_extreme/clkdiv_arpp_top";
		aclk_gate_jpg = "/clocks_extreme/aclk_jpg";
		pclk_gate_jpg = "/clocks_extreme/pclk_jpg";
		clk_gate_atdiv_vivo = "/clocks_extreme/clk_atdiv_vivo";
		clk_gate_atdiv_vdec = "/clocks_extreme/clk_atdiv_vdec";
		pclk_gate_isp_qic_subsys = "/clocks_extreme/pclk_isp_qic_subsys";
		aclk_gate_isp_qic_subsys = "/clocks_extreme/aclk_isp_qic_subsys";
		aclk_gate_isp = "/clocks_extreme/aclk_isp";
		clk_gate_vcodecbus = "/clocks_extreme/clk_vcodecbus";
		clk_gate_vcodecbus2ddr = "/clocks_extreme/clk_vcodecbus2";
		clk_div_vcodecbus = "/clocks_extreme/clk_vcodbus_div";
		clk_gate_vcodecbus_gt = "/clocks_extreme/clk_vcodbus_gt";
		clk_vcodec_syspll0 = "/clocks_extreme/clk_vcodec_syspll0";
		clk_mux_vcodecbus = "/clocks_extreme/clk_vcodbus_mux";
		clk_mux_venc = "/clocks_extreme/clkmux_venc";
		clk_andgt_venc = "/clocks_extreme/clkgt_venc";
		clk_div_venc = "/clocks_extreme/clkdiv_venc";
		clk_gate_vencfreq = "/clocks_extreme/clk_vencfreq";
		pclk_gate_venc = "/clocks_extreme/pclk_venc";
		aclk_mux_venc = "/clocks_extreme/aclkmux_venc";
		aclk_andgt_venc = "/clocks_extreme/aclkgt_venc";
		aclk_div_venc = "/clocks_extreme/aclkdiv_venc";
		aclk_gate_vencfreq = "/clocks_extreme/aclk_vencfreq";
		clk_mux_ispi2c = "/clocks_extreme/clk_ispi2c_mux";
		clk_gate_ispi2c = "/clocks_extreme/clk_ispi2c";
		clk_gate_isp_sys = "/clocks_extreme/clk_isp_sys";
		clk_mux_ispcpu = "/clocks_extreme/sel_ispcpu";
		clk_andgt_ispcpu = "/clocks_extreme/clk_ispcpu_gt";
		clk_div_ispcpu = "/clocks_extreme/clk_ispcpu_div";
		clk_gate_ispcpufreq = "/clocks_extreme/clk_ispcpufreq";
		clk_andgt_isp_i3c = "/clocks_extreme/clkgt_isp_i3c";
		clk_div_isp_i3c = "/clocks_extreme/clkdiv_isp_i3c";
		clk_gate_isp_i3c = "/clocks_extreme/clk_isp_i3c";
		clk_gate_ivp32dsp_tcxo = "/clocks_extreme/clk_ivpdsp_tcxo";
		clk_mux_ivp32dsp_core = "/clocks_extreme/clkmux_ivp32dsp";
		clk_andgt_ivp32dsp_core = "/clocks_extreme/clkgt_ivp32dsp";
		clk_div_ivp32dsp_core = "/clocks_extreme/clkdiv_ivpdsp";
		clk_gate_autodiv_vcodecbus = "/clocks_extreme/clk_atdiv_vcbus";
		clk_gate_atdiv_venc = "/clocks_extreme/clk_atdiv_venc";
		clk_cluster0 = "/clocks_extreme/cpu-cluster.0";
		clk_cluster1 = "/clocks_extreme/cpu-cluster.1";
		clk_g3d = "/clocks_extreme/clk_g3d";
		clk_ddrc_freq = "/clocks_extreme/clk_ddrc_freq";
		clk_ddrc_max = "/clocks_extreme/clk_ddrc_max";
		clk_ddrc_min = "/clocks_extreme/clk_ddrc_min";
		clk_l1bus_min = "/clocks_extreme/clk_l1bus_min";
		clk_gate_abb_192 = "/clocks_extreme/clk_abb_192";
		clk_pmu32ka = "/clocks_extreme/clk_pmu32ka";
		clk_pmu32kb = "/clocks_extreme/clk_pmu32kb";
		clk_pmu32kc = "/clocks_extreme/clk_pmu32kc";
		clk_pmuaudioclk = "/clocks_extreme/clk_pmuaudioclk";
		clk_eusb_38m4 = "/clocks_extreme/clk_eusb_38m4";
		clk_gate_edc0 = "/clocks_extreme/clk_edc0";
		clk_gate_vdec = "/clocks_extreme/clk_vdec";
		clk_gate_venc = "/clocks_extreme/clk_venc";
		clk_gate_ispfunc = "/clocks_extreme/clk_ispfunc";
		clk_gate_jpg_func = "/clocks_extreme/clk_jpg_func";
		aclk_gate_venc = "/clocks_extreme/aclk_venc";
		clk_gate_edc0_mem = "/clocks_extreme/clk_edc0_mem";
		clk_gate_vdec_mem = "/clocks_extreme/clk_vdec_mem";
		clk_gate_venc_mem = "/clocks_extreme/clk_venc_mem";
		clk_gate_ispfunc_mem = "/clocks_extreme/clk_ispfunc_mem";
		clk_gate_jpgfunc_mem = "/clocks_extreme/clk_jpgfunc_mem";
		aclk_gate_venc_mem = "/clocks_extreme/aclk_venc_mem";
		clk_gate_ispcpu = "/clocks_extreme/clk_ispcpu";
		clk_gate_ispfunc2 = "/clocks_extreme/clk_ispfunc2";
		clk_gate_edc0freq = "/clocks_extreme/clk_edc0freq";
		clk_gate_jpg_funcfreq = "/clocks_extreme/clk_jpg_funcfreq";
		clk_gate_vdec_freq = "/clocks_extreme/clk_vdec_freq";
		clk_gate_ispfuncfreq = "/clocks_extreme/clk_ispfuncfreq";
		aclk_gate_venc_freq = "/clocks_extreme/aclk_venc_freq";
		clk_crgctrl = "/clk_crgctrl@FFB85000";
		clk_hsdt_crg = "/clk_hsdt_crgctrl@EE262000";
		clk_hsdt1_crg = "/clk_hsdt1_crgctrl@EFB02000";
		clk_sctrl = "/clk_sctrl@FB21B000";
		clk_pctrl = "/clk_pctrl@FF7CC000";
		clk_media1_crg = "/clk_media1_crgctrl@E8D01000";
		clk_media2_crg = "/clk_media2_crgctrl@E93F0000";
		clk_iomcu_crgctrl = "/clk_iomcu_crgctrl@FAE7E000";
		clk_xfreqclk = "/clk_xfreqclk@FFB81000";
		clk_pmuctrl = "/clk_pmuctrl@FB21B000";
		clk_fast_dvfs_media1 = "/clk_fast_dvfs_media1_crgctrl@E8D01000";
		clk_fast_dvfs_media2 = "/clk_fast_dvfs_media2_crgctrl@E93F0000";
		clk_dvfs = "/clk_dvfs_crgctrl@FB21B000";
		hisi_peri_dvfs = "/peri_dvfs@0xFFB81000";
		pvp_edc0 = "/peri_dvfs@0xFFB81000/pvp_edc0";
		pvp_vdec = "/peri_dvfs@0xFFB81000/pvp_vdec";
		pvp_venc = "/peri_dvfs@0xFFB81000/pvp_venc";
		pvp_ispfunc = "/peri_dvfs@0xFFB81000/pvp_ispfunc";
		pvp_avenc = "/peri_dvfs@0xFFB81000/pvp_avenc";
		pvp_ispjpg = "/peri_dvfs@0xFFB81000/pvp_ispjpg";
		pvp_low = "/peri_dvfs@0xFFB81000/pvp_low";
		pvp_middle = "/peri_dvfs@0xFFB81000/pvp_middle";
		pvp_hold = "/peri_dvfs@0xFFB81000/pvp_hold";
		pvp_coresight = "/peri_dvfs@0xFFB81000/pvp_coresight";
		pvp_no_avs_l = "/peri_dvfs@0xFFB81000/pvp_no_avs_l";
		pvp_edc0_mem = "/peri_dvfs@0xFFB81000/pvp_edc0_mem";
		pvp_vdec_mem = "/peri_dvfs@0xFFB81000/pvp_vdec_mem";
		pvp_venc_mem = "/peri_dvfs@0xFFB81000/pvp_venc_mem";
		pvp_ispfunc_mem = "/peri_dvfs@0xFFB81000/pvp_ispfunc_mem";
		pvp_avenc_mem = "/peri_dvfs@0xFFB81000/pvp_avenc_mem";
		pvp_ispjpg_mem = "/peri_dvfs@0xFFB81000/pvp_ispjpg_mem";
		pvp_ispcpu_mem = "/peri_dvfs@0xFFB81000/pvp_ispcpu_mem";
		hisi_pll = "/hisi_pll@0xFFB85000";
		histarisp = "/isp@e9300000";
		ispcma = "/ispcma";
		isp_fastboot_cma = "/isp_fastboot_cma";
		hipp = "/hipp@E8000000";
		ippcom = "/ipp-com@E8000000";
		regulators_ip = "/regulator_ip@FFB85000";
		media1_subsys = "/regulator_ip@FFB85000/ip@0";
		media2_subsys = "/regulator_ip@FFB85000/ip@1";
		vivobus = "/regulator_ip@FFB85000/ip@2";
		vcodecsubsys = "/regulator_ip@FFB85000/ip@3";
		dsssubsys = "/regulator_ip@FFB85000/ip@4";
		disp_ch1subsys = "/regulator_ip@FFB85000/ip@5";
		ipp = "/regulator_ip@FFB85000/ip@6";
		vdec = "/regulator_ip@FFB85000/ip@7";
		ispsubsys = "/regulator_ip@FFB85000/ip@8";
		isp_r8 = "/regulator_ip@FFB85000/ip@9";
		vencaclk = "/regulator_ip@FFB85000/ip@10";
		venc = "/regulator_ip@FFB85000/ip@11";
		asp = "/regulator_ip@FFB85000/ip@12";
		g3d = "/regulator_ip@FFB85000/ip@13";
		vivobus_autodiv = "/regulator_ip@FFB85000/ip@14";
		mmbuf = "/regulator_ip@FFB85000/ip@15";
		fp_csi_fake = "/regulator_ip@FFB85000/ip@16";
		dss_fake = "/regulator_ip@FFB85000/ip@17";
		isp_fake = "/regulator_ip@FFB85000/ip@18";
		vdec_fake = "/regulator_ip@FFB85000/ip@19";
		venc_fake = "/regulator_ip@FFB85000/ip@20";
		ipp_fake = "/regulator_ip@FFB85000/ip@21";
		smmu_media1_ip = "/regulator_ip@FFB85000/ip@22";
		smmu_media2_ip = "/regulator_ip@FFB85000/ip@23";
		fpga_fake = "/regulator_ip@FFB85000/ip@24";
		hiface = "/regulator_ip@FFB85000/ip@25";
		arpp = "/regulator_ip@FFB85000/ip@26";
		ivp = "/regulator_ip@FFB85000/ip@27";
		ivp1 = "/regulator_ip@FFB85000/ip@28";
		smmu_media1 = "/smmuv3_media1@e8d03000";
		smmu_media2 = "/smmuv3_media2@e9380000";
		smmu_media1_ex1 = "/smmu_media1_ex1@f9d03000";
		smmu_media2_ex1 = "/smmu_media2_ex1@f9380000";
		smmu_davinci = "/smmuv3_davici@e5fc0000";
		smmu_hsdt0 = "/smmuv3_hsdt0@ee200000";
		spmi = "/spmi@0xFB210000";
		pmic3 = "/spmi@0xFB210000/pmic3@3";
		hi6563v300_buck0 = "/spmi@0xFB210000/pmic3@3/hi6563v300_buck0@1F";
		hi6563v300_ldo2 = "/spmi@0xFB210000/pmic3@3/hi6563v300_ldo2@29";
		hi6563v300_ldo3 = "/spmi@0xFB210000/pmic3@3/hi6563v300_ldo3@2B";
		hi6563v300_ldo6 = "/spmi@0xFB210000/pmic3@3/hi6563v300_ld06@31";
		hi6563v300_ldo7 = "/spmi@0xFB210000/pmic3@3/hi6563v300_ldo7@33";
		pmic1 = "/spmi@0xFB210000/pmic1@1";
		pmic_gpio_01 = "/spmi@0xFB210000/pmic1@1/pmic_gpio_01@162";
		buck00 = "/spmi@0xFB210000/pmic1@1/buck00@21";
		buck30 = "/spmi@0xFB210000/pmic1@1/buck30@22";
		buck6 = "/spmi@0xFB210000/pmic1@1/buck6@23";
		buck7 = "/spmi@0xFB210000/pmic1@1/buck7@24";
		buck8 = "/spmi@0xFB210000/pmic1@1/buck8@25";
		buck13 = "/spmi@0xFB210000/pmic1@1/buck13@26";
		ldo9 = "/spmi@0xFB210000/pmic1@1/ldo9@27";
		ldo34 = "/spmi@0xFB210000/pmic1@1/ldo34@28";
		ldo50 = "/spmi@0xFB210000/pmic1@1/ldo50@29";
		ldo51 = "/spmi@0xFB210000/pmic1@1/ldo51@2A";
		ldo53 = "/spmi@0xFB210000/pmic1@1/ldo53@2B";
		ldo54 = "/spmi@0xFB210000/pmic1@1/ldo54@2C";
		buckboost = "/spmi@0xFB210000/pmic1@1/buckboost@2E";
		pmic_mntn1 = "/spmi@0xFB210000/pmic1@1/pmic_mntn1@a0";
		pmic = "/spmi@0xFB210000/pmic@0";
		ponkey = "/spmi@0xFB210000/pmic@0/ponkey";
		pmic_gpio0 = "/spmi@0xFB210000/pmic@0/pmic_gpio0";
		pmic_gpio1 = "/spmi@0xFB210000/pmic@0/pmic_gpio1";
		buck1 = "/spmi@0xFB210000/pmic@0/buck1@D";
		buck2 = "/spmi@0xFB210000/pmic@0/buck2@E";
		buck9 = "/spmi@0xFB210000/pmic@0/buck9@18";
		buck70 = "/spmi@0xFB210000/pmic@0/buck70@14";
		ldo0 = "/spmi@0xFB210000/pmic@0/ldo0@19";
		ldo1 = "/spmi@0xFB210000/pmic@0/ldo1@1A";
		ldo3 = "/spmi@0xFB210000/pmic@0/ldo3@1B";
		ldo4 = "/spmi@0xFB210000/pmic@0/ldo4@1C";
		ldo6 = "/spmi@0xFB210000/pmic@0/ldo6@1D";
		ldo8 = "/spmi@0xFB210000/pmic@0/ldo8@1E";
		ldo11 = "/spmi@0xFB210000/pmic@0/ldo11@1F";
		ldo12 = "/spmi@0xFB210000/pmic@0/ldo12@20";
		ldo14 = "/spmi@0xFB210000/pmic@0/ldo14@21";
		ldo15 = "/spmi@0xFB210000/pmic@0/ldo15@22";
		ldo16 = "/spmi@0xFB210000/pmic@0/ldo16@23";
		ldo17 = "/spmi@0xFB210000/pmic@0/ldo17@24";
		ldo18 = "/spmi@0xFB210000/pmic@0/ldo18@25";
		ldo21 = "/spmi@0xFB210000/pmic@0/ldo21@26";
		ldo22 = "/spmi@0xFB210000/pmic@0/ldo22@27";
		ldo23 = "/spmi@0xFB210000/pmic@0/ldo23@28";
		ldo24 = "/spmi@0xFB210000/pmic@0/ldo24@29";
		ldo25 = "/spmi@0xFB210000/pmic@0/ldo25@2A";
		ldo26 = "/spmi@0xFB210000/pmic@0/ldo26@2B";
		ldo27 = "/spmi@0xFB210000/pmic@0/ldo27@2C";
		ldo28 = "/spmi@0xFB210000/pmic@0/ldo28@2D";
		ldo29 = "/spmi@0xFB210000/pmic@0/ldo29@2E";
		ldo30 = "/spmi@0xFB210000/pmic@0/ldo30@2F";
		ldo32 = "/spmi@0xFB210000/pmic@0/ldo32@30";
		ldo36 = "/spmi@0xFB210000/pmic@0/ldo36@32";
		ldo37 = "/spmi@0xFB210000/pmic@0/ldo37@33";
		ldo38 = "/spmi@0xFB210000/pmic@0/ldo38@34";
		ldo41 = "/spmi@0xFB210000/pmic@0/ldo41@36";
		ldo42 = "/spmi@0xFB210000/pmic@0/ldo42@37";
		ldo43 = "/spmi@0xFB210000/pmic@0/ldo43@38";
		ldo44 = "/spmi@0xFB210000/pmic@0/ldo44@39";
		ldo45 = "/spmi@0xFB210000/pmic@0/ldo45@3A";
		ldo46 = "/spmi@0xFB210000/pmic@0/ldo46@3B";
		pmic_mntn = "/spmi@0xFB210000/pmic@0/pmic_mntn@a0";
		pmic_led = "/spmi@0xFB210000/pmic@0/pmic_led";
		pmic_rtc = "/spmi@0xFB210000/pmic@0/pmic_rtc";
		hi6xxx_coul = "/spmi@0xFB210000/pmic@0/hi6xxx_coul";
		batt = "/spmi@0xFB210000/pmic@0/hi6xxx_coul/batt";
		hi6xxx_coul_adc = "/spmi@0xFB210000/pmic@0/hi6xxx_coul_adc";
		hisi_soh_pmic = "/spmi@0xFB210000/pmic@0/hisi_soh_pmic@1";
		hisi_pmic_eis = "/spmi@0xFB210000/pmic@0/hisi_pmic_eis@1";
		spmi1 = "/spmi1@0xFB248000";
		pmic2 = "/spmi1@0xFB248000/pmic2@2";
		hisi_resource_lock = "/hwspinlock";
		pm_clk_monitor = "/pm_clk";
		ddr = "/ddr@fffc0000";
		bootdevice = "/bootdevice";
		sdhci1 = "/sdhci1@EFB01000";
		mmccard = "/mmccard@";
		sdhci2 = "/sdhci2@EFB01000";
		ufs = "/ufs@FA400000";
		hisi_ipc = "/ipc@FF870000";
		hisi_ao_ipc = "/ipc@0xFB219000";
		firmware = "/firmware";
		aliases = "/aliases";
		usb_proxy_hcd = "/usb_proxy_hcd";
		hisi_usb_dp_ctrl = "/hisi_usb_dp_ctrl@efa70000";
		hsdt1crg_for_usb = "/hsdt1crg_for_usb@efb02000";
		pmc_for_usb = "/pmc_for_usb@ffb81000";
		sysctrl_for_usb = "/sysctrl_for_usb@fb21b000";
		sysqic_ib_usb3 = "/sysqic_ib_usb3@fb913000";
		chip_usb_misc_ctrl = "/chip_usb_misc_ctrl@efa02000";
		usb2_phy = "/usb2_phy";
		combophy_mcu = "/combophy_mcu@efd10000";
		combophy_phy = "/combophy_phy@efa40000";
		hisi_usb = "/hisi_usb";
		dwc3 = "/hisi_usb/dwc3@efc00000";
		mm_ion = "/mm,ion";
		aod_normal_heap = "/mm,ion/aod_normal_heap";
		cam_reuse_cma = "/media-zone/cam_reuse_cma";
		dmabuf_heap = "/mm,dmabuf_heap";
		vendor_efuse = "/efuse";
		rdr_ap_adapter = "/rdr_ap_adapter@2F900000";
		exceptiontrace = "/exceptiontrace";
		powerhold = "/powerhold@FB22A000";
		bl31_log = "/bl31_log";
		syscounter = "/syscounter@0xFB216000";
		contexthub = "/contexthub";
		mlps = "/mlps";
		smart_ar = "/ar";
		bsp_smart = "/smart-plt";
		sensorhub_buff = "/ddr_buff@0x106BF000";
		soc_syscounter = "/soc_syscounter_reg_addr@0x00001008";
		contexhub_boot_stat = "/contexhub_boot_stat_sctrl_offset@0x478";
		contexthub_mntn = "/contexthub_mntn";
		bsp_softtimer = "/softtimer@FB205000";
		smart_flp = "/flp";
		hisi_ble = "/ble";
		bsp_igs_dev = "/swing_dev";
		bsp_igs_dbg = "/swing_dbg";
		hisi_swing_tof_sensor = "/swing_tof_sensor";
		hisi_swing_cam = "/dev";
		hisi_swing_tof = "/swing_tof_dev";
		hisi_iomcu_di = "/iomcu_di";
		hisi_iomcu_ao_ns_ipc = "/iomcu_ao_ns_ipc@FB219000";
		bsp_iomcu_logic = "/iomcu_logic";
		vendor_chip_isp350 = "/vendor,chip_isp350";
		vendor_camera = "/vendor,vendor_camera";
		hisi_vendor_camera = "/vendor,vendor_camera";
		vendor_cam_buf = "/vendor,cam_buf";
		vendor_cam_buf1 = "/vendor,cam_buf1";
		vendor_cam_buf2 = "/vendor,cam_buf2";
		vendor_cam_buf3 = "/vendor,cam_buf3";
		vendor_cam_buf4 = "/vendor,cam_buf4";
		vendor_cam_buf5 = "/vendor,cam_buf5";
		vendor_cam_buf6 = "/vendor,cam_buf6";
		vendor_cam_buf7 = "/vendor,cam_buf7";
		vendor_cam_buf8 = "/vendor,cam_buf8";
		vendor_cam_buf9 = "/vendor,cam_buf9";
		vendor_hjpeg = "/vendor,hjpeg@E8C00000";
		sensorhub = "/sensorhub";
		als_sensor = "/sensorhub/light";
		ps_sensor = "/sensorhub/proximity";
		acc_sensor = "/sensorhub/gsensor";
		gyro_sensor = "/sensorhub/gyroscope";
		mag_sensor = "/sensorhub/compass";
		vibrator_sensor = "/sensorhub/vibrator";
		sensorhub_ext_config = "/sensorhub_ex";
		sensorhub_io_power = "/sensorhub_io_power";
		chg_watchdog = "/chg_watchdog";
		ddrcflux = "/ddrflux";
		fastboot_sub_pmic = "/fastboot_sub_pmic";
		hisi_pmic_hi6563v200 = "/hisi_pmic_hi6563v200";
		pci0 = "/pci@f8000000";
		pci1 = "/pci@edc00000";
		hisi_secs = "/secs_power_ctrl";
		pmu_reg = "/hisi_pmu_dump/pmu_reg";
		debug_reg = "/hisi_pmu_dump/debug_reg";
		lowpm_pmu = "/lowpm_pmu";
		hifi_voice_proxy = "/hifi_voice_proxy";
		framebuffer = "/framebuffer";
		disp_manager = "/disp_manager";
		dpu_resource = "/dpu_resource";
		connector_manager = "/connector_manager";
		panel_nt37700p = "/panel_nt37700p";
		panel_nt37800a = "/panel_nt37800a";
		panel_nt37290 = "/panel_nt37290";
		panel_nt37701_brq = "/panel_nt37701_brq";
		panel_hx5293 = "/panel_hx5293";
		panel_nt36870 = "/panel_nt36870";
		panel_visionox_6p39 = "/panel_visionox_6p39";
		panel_boe_7p847 = "/panel_boe_7p847";
		panel_boe_6p39 = "/panel_boe_6p39";
		panel_mipi_fake = "/panel_mipi_fake";
		dp_panel = "/dp_panel";
		offline_panel = "/offline_panel";
		dsi0 = "/dsi@E8800000";
		edp_out0 = "/dsi@E8800000/ports/port@1/endpoint@0";
		pmic_dcxo_ap = "/pmic_dcxo_ap";
		pmic_dcxo_cp = "/pmic_dcxo_cp";
		pmic_dcxo_cali = "/pmic_dcxo_cali";
		hisi_vbat_drop_protect = "/vbat_drop";
		mips_ddr_c0 = "/mips_ddr_c0";
		mips_ddr_c1 = "/mips_ddr_c1";
		mips_ddr_c2 = "/mips_ddr_c2";
		mips_l3_c0 = "/mips_l3_c0";
		mips_l3_c1 = "/mips_l3_c1";
		mips_l3_c2 = "/mips_l3_c2";
		ufs_dss = "/ufs,ufs_dss";
		seplat_node = "/seplat";
		blpwm3 = "/blpwm@FF4E4000";
		pwm_test = "/blpwm_test";
		lowpm_func = "/lowpm_func@ffb82000";
		l3_opp_table = "/l3_opp_table";
		l3c_devfreq = "/l3c_devfreq";
		l3extension = "/l3extension";
		flush_cmo = "/flush_cmo";
		l3part_ctrl = "/l3part_ctrl";
		nonshareable = "/nonshareable";
		gpu_hvgr = "/hvgr@E9FC0000";
		gpufreq = "/gpufreq";
		gpu_opp_table = "/gpu_opp_table";
		decoder = "/vdec@e8dc0000";
		codecssi = "/codecssi@FF480000";
		hisi_bci_battery = "/battery";
		hisi_batt_info = "/hisi_batt_info";
		touchscreen = "/touchscreen";
		synaptics = "/touchscreen/touchscreen@70";
		jpu = "/jpu@E8C01000";
		peripherals = "/peripherals@0x00000000";
		dma0 = "/peripherals@0x00000000/dma@ff481000";
		perfstat = "/a1@0xFF896000";
		hisi_npu_ipc = "/ipc@e5e01000";
		hisi_powerhal = "/powerhal";
		hisi_weights = "/weights";
		tsens = "/tsens";
		ithermal_peripheral_tm = "/hisi_tm";
		hisi_shell = "/shell_frame";
		shell_front = "/shell_front";
		shell_back = "/shell_back";
		shell_level = "/shell_level";
		hisi_ambient = "/hisi_ambient";
		ipa_sensor1 = "/ipa-sensor@1";
		hw_connectivity = "/hw_connectivity";
		rtl_wifi = "/rtl_wifi";
		bcm_wifi = "/bcm_wifi";
		bcm_bt = "/bcm_bt";
		bluetooth_sleep = "/bluetooth_sleep";
		bluetooth_power = "/bluetooth_power";
		gps_power = "/gps_power";
		hi110x = "/hi110x";
		hisi_wifi = "/hisi_wifi";
		hisi_bfgx = "/hisi_bfgx";
		hisi_me = "/hisi_me";
		hisi_gt = "/hisi_gt";
		hisi_gle = "/hisi_gle";
		hisi_sle_info = "/hisi_sle_info";
		hisi_cust_cfg = "/hisi_cust_cfg";
		hisi_gps = "/hisi_gps";
		hisi_gps_sync = "/hisi_gps_sync";
		coul_polar = "/coul_polar";
		bat_thermal = "/bat_thermal";
		coul_merge = "/coul_merge";
		hisi_coul_drv_test = "/hisi_coul_test";
		fastboot_battery = "/fastboot_battery";
		fastboot_charger = "/fastboot_charger";
		fastboot_charge_vibrate = "/fastboot_charge_vibrate";
		huawei_charger = "/huawei_charger";
		charger_detection = "/charger_detection";
		buck_charge_ic = "/buck_charge_ic";
		usb_short_circuit_protect = "/usb_short_circuit_protect";
		huawei_pogopin_sw = "/huawei_pogopin_sw";
		huawei_pogo_acc = "/huawei_pogo_acc";
		batt_acr_detect = "/batt_acr_detect";
		vbus_monitor = "/vbus_monitor";
		vbus_channel_charger = "/vbus_channel_charger";
		vbus_channel_boost_gpio = "/vbus_channel_boost_gpio";
		soc_decimal = "/soc_decimal";
		power_thermalzone = "/power_thermalzone";
		hw_batt_vol = "/hw_batt_vol";
		huawei_battery_temp = "/huawei_battery_temp";
		multi_btb_temp = "/multi_btb_temp";
		temp_control = "/temp_control";
		bat_heating = "/bat_heating";
		power_extra_event = "/power_extra_event";
		btb_check = "/btb_check";
		battery_temp_fitting = "/battery_temp_fitting";
		charge_pump = "/charge_pump";
		wireless_sc = "/wireless_sc";
		wireless_ps = "/wireless_ps";
		wireless_tx = "/wireless_tx";
		wireless_aux_tx = "/wireless_aux_tx";
		wireless_tx_pen_kb = "/wireless_tx_pen_kb";
		wireless_ps_aux = "/wireless_ps_aux";
		wltx_pwm = "/wltx_pwm";
		lightstrap = "/lightstrap";
		wireless_fw = "/wireless_fw";
		wireless_charger = "/wireless_charger";
		boost_5v = "/boost_5v";
		wired_channel_manager = "/wired_channel_manager";
		wired_channel_switch = "/wired_channel_switch";
		ovp_channel_switch = "/ovp_channel_switch";
		ncp3902_channel_switch = "/ncp3902_channel_switch";
		mixed_ovp_channel_switch = "/mixed_ovp_channel_switch";
		power_switch = "/power_switch";
		vbat_ovp = "/vbat_ovp";
		dischg_boost = "/dischg_boost";
		direct_charge_turbo = "/direct_charge_turbo";
		direct_charge_ps = "/direct_charge_ps";
		direct_charge_ic = "/direct_charge_ic";
		direct_charge_rechg = "/direct_charge_rechg";
		direct_charge_comp = "/direct_charge_comp";
		direct_charger = "/direct_charger";
		direct_charger_sc = "/direct_charger_sc";
		direct_charger_sc4 = "/direct_charger_sc4";
		dual_loadswitch = "/dual_loadswitch";
		retail_demo_capacity_limit_control = "/retail_demo_capacity_limit_control";
		charging_core = "/charging_core";
		water_check = "/water_check";
		huawei_batt_soh = "/huawei_batt_soh";
		wireless_tx_auth = "/wireless_tx_auth";
		ffc_control = "/ffc_control";
		battery_1s2p = "/battery_1s2p";
		battery_charge_balance = "/battery_charge_balance";
		multi_bat_check = "/multi_bat_check";
		battery_fault = "/battery_fault";
		battery_fault_notify = "/battery_fault_notify";
		ship_mode = "/ship_mode";
		charge_mode_test = "/charge_mode_test";
		power_gpio_misc = "/power_gpio_misc";
		buck_boost = "/buck_boost";
		low_power = "/low_power";
		battery_ocv = "/battery_ocv";
		huawei_accessory = "/huawei_accessory";
		battery_cccv = "/battery_cccv";
		xpmic_regulators = "/xpmic_regulators";
		xpmic_ldo1 = "/xpmic_regulators/xpmic_ldo1";
		xpmic_ldo2 = "/xpmic_regulators/xpmic_ldo2";
		xpmic_ldo3 = "/xpmic_regulators/xpmic_ldo3";
		xpmic_ldo4 = "/xpmic_regulators/xpmic_ldo4";
		xpmic_ldo5 = "/xpmic_regulators/xpmic_ldo5";
		xpmic_ldo6 = "/xpmic_regulators/xpmic_ldo6";
		xpmic_ldo7 = "/xpmic_regulators/xpmic_ldo7";
		huawei_smpl = "/huawei_smpl";
		huawei_batt_info = "/huawei_batt_info";
		battery_checker_0 = "/huawei_batt_info/battery_checker@0";
		battery_checker_1 = "/huawei_batt_info/battery_checker@1";
		battery_checker_2 = "/huawei_batt_info/battery_checker@2";
		battery_ct_debug = "/battery_ct_debug";
		ds28el15 = "/ds28el15";
		ds28el16 = "/ds28el16";
		richtek = "/richtek";
		a1007_1 = "/a1007_1";
		a1007_2 = "/a1007_2";
		gpio_pl061_ctrl = "/gpio_pl061_ctrl";
		gpio_pl061_ctrl_v2_1 = "/gpio_pl061_ctrl_v2_1";
		gpio_pl061_ctrl_v2_2 = "/gpio_pl061_ctrl_v2_2";
		sle95250 = "/sle95250";
		ns3300 = "/ns3300";
		fm1230 = "/fm1230";
		fm1230_1 = "/fm1230_1";
		fm1230_2 = "/fm1230_2";
		fm1230_swi = "/fm1230_swi";
		t91407 = "/t91407";
		t91407_1 = "/t91407_1";
		huawei_ptst = "/huawei_ptst";
		BCYCAE_10000_snCA_4500_65 = "/BCYCAE_10000_snCA_4500_65";
		BCYCAE_2135_snCA_4485_15 = "/BCYCAE_2135_snCA_4485_15";
		BCYCAE_2270_snCA_4485_15 = "/BCYCAE_2270_snCA_4485_15";
		BCYCAE_2565_snCA_4485_15 = "/BCYCAE_2565_snCA_4485_15";
		BCYCAE_2690_snCA_4485_15 = "/BCYCAE_2690_snCA_4485_15";
		BCYCAE_4500_39k_4500_10 = "/BCYCAE_4500_39k_4500_10";
		BCYCAE_4500_snCA_4500_10 = "/BCYCAE_4500_snCA_4500_10";
		BCYCAE_4900_snCA_4500_10 = "/BCYCAE_4900_snCA_4500_10";
		BCYCAE_4950_snCA_4500_10 = "/BCYCAE_4950_snCA_4500_10";
		BCYCDE_4800_snCW_4500_35 = "/BCYCDE_4800_snCW_4500_35";
		BCYCGL_4950_snCG_4500_10 = "/BCYCGL_4950_snCG_4500_10";
		BITCAE_2135_snIA_4485_15 = "/BITCAE_2135_snIA_4485_15";
		BITCAE_2270_snIA_4485_15 = "/BITCAE_2270_snIA_4485_15";
		BITCAE_2565_snIA_4485_15 = "/BITCAE_2565_snIA_4485_15";
		BITCAE_2690_snIA_4485_15 = "/BITCAE_2690_snIA_4485_15";
		BITCAE_4900_snIA_4500_10 = "/BITCAE_4900_snIA_4500_10";
		BITCAE_8700_snIA_4480_50 = "/BITCAE_8700_snIA_4480_50";
		BITCDE_10000_snIW_4500_65 = "/BITCDE_10000_snIW_4500_65";
		BITCDE_4650_snIW_4490_30 = "/BITCDE_4650_snIW_4490_30";
		BITCGL_8200_10k_4480_25 = "/BITCGL_8200_10k_4480_25";
		BITCGL_8200_snIG_4480_25 = "/BITCGL_8200_snIG_4480_25";
		BNTCAE_1250_snNA_4496_35 = "/BNTCAE_1250_snNA_4496_35";
		BNTCAE_1710_snNA_4515_15_ZV3000 = "/BNTCAE_1710_snNA_4515_15_ZV3000";
		BNTCAE_3790_snNA_4515_15_ZV3000 = "/BNTCAE_3790_snNA_4515_15_ZV3000";
		BNTCAE_4650_snNA_4490_35 = "/BNTCAE_4650_snNA_4490_35";
		BNTCAE_4800_snNA_4500_35 = "/BNTCAE_4800_snNA_4500_35";
		BCYCAE_4800_snCA_4500_35 = "/BCYCAE_4800_snCA_4500_35";
		BNTCAE_4950_snNA_4500_10 = "/BNTCAE_4950_snNA_4500_10";
		BNTCAE_5150_snNA_4500_10 = "/BNTCAE_5150_snNA_4500_10";
		BNTCAE_8200_22k_4480_10 = "/BNTCAE_8200_22k_4480_10";
		BNTCAE_8200_snNA_4480_10 = "/BNTCAE_8200_snNA_4480_10";
		BNTCGL_4500_22k_4500_10 = "/BNTCGL_4500_22k_4500_10";
		BNTCGL_4500_snNG_4500_10 = "/BNTCGL_4500_snNG_4500_10";
		BNTCWL_8700_snNW_4480_50 = "/BNTCWL_8700_snNW_4480_50";
		BYTCAE_1250_snYA_4496_35 = "/BYTCAE_1250_snYA_4496_35";
		default_3000_68k_4352 = "/default_3000_68k_4352";
		huawei_lga_check = "/huawei_lga_check";
		drg = "/drg";
		hifi_virtual_voice_proxy = "/hifi_virtual_voice_proxy";
		target_cpu = "/target-cpu";
		cpufreq = "/cpufreq-bL";
		psci = "/psci";
		support_target = "/support-target";
		cpu_hwp = "/cpu_hwp_ctrl";
		cpu_hwp_cluster2 = "/cpu_hwp_ctrl/cpu-hwp-c2";
		namtso_pmu = "/namtso_pmu@FF211000";
		share_l3 = "/share_l3@FF212000";
		hisi_battery = "/hisi_battery";
		soh_core = "/soh_core";
		eis_core_batt0 = "/eis_core_batt0";
		eis_core_batt1 = "/eis_core_batt1";
		eis_core_batt2 = "/eis_core_batt2";
		hisi_soh_charger = "/hisi_soh_charger@1";
		huawei_batt_identify = "/huawei_batt_identify";
		pd_dpm = "/pd_dpm";
		huawei_usb = "/huawei_usb";
		rt_pd_manager = "/rt_pd_manager";
		huawei_usbvbus = "/huawei_usbvbus";
		devcheck = "/devcheck";
		hwsim = "/hwsim";
		charger_time_remaining = "/charger_time_remaining";
		weaver_info = "/weaver_info";
		rootparam = "/rootparam";
		chosen = "/chosen";
		hm_overlay = "/hm-overlay";
		soc_spec = "/soc_spec";
		hisi_vibrator = "/hisi_vibrator@FB210000";
		coul_core = "/coul_core";
		series_batt_charger = "/series_batt_charger";
		bq40z50_battery = "/bq40z50_battery";
		fastboot = "/fastboot";
		pmu = "/pmu@FFF34000";
		hisi_sysctrl = "/sysctrl@0xFB21B000";
		hisi_actrl = "/actrl@0xFB214000";
		hisi_pctrl = "/pctrl@0xFF7CC000";
		hisi_spin_lock = "/resource_lock@0xFF7CB000";
		hisi_crgctrl = "/crgctrl@0xFFB85000";
		hisi_pmctrl = "/pmctrl@0xFFB81000";
		hisi_hsdt_crg = "/hsdt_crg@EE262000";
		hisi_hsdt1_crg = "/hsdt1_crg@EFB02000";
		hisi_hsdt_sysctrl = "/hsdt_sysctrl@EE264000";
		hisi_hsdt1_sysctrl = "/hsdt1_sysctrl@EFB00000";
		hisi_mmc0_crg = "/mmc0_crg@f8581000";
		hisi_hsdt0_intr_hub = "/hsdt0_intr_hub@FF7CF000";
		hisi_media1ctrl = "/media1ctrl@E8D01000";
		hisi_media2ctrl = "/media2ctrl@E93F0000";
		hisi_axierr = "/hisi_axierr";
		hisi_reset = "/hisi_reset";
		nve_uartctl = "/uartctl";
		hisi_io_die = "/hisi_io_die";
		hisi_gpio_key = "/hisi_gpio_key";
		hisi_pmic_gpio_key = "/hisi_pmic_gpio_key";
		panel_blpwm = "/panel_blpwm";
		huawei_lcd_panel = "/huawei,lcd_panel";
		huawei_lcd_config = "/huawei,lcd_config";
		huawei_aod = "/aod";
		smartpakit = "/smartpakit";
		bastet = "/bastet";
		sound_DA_combine_v3 = "/sound_DA_combine_v3";
		sound_DA_combine_v5 = "/sound_DA_combine_v5";
		asp_codec_stub = "/codec";
		hwcxext_sound = "/hwcxext_sound";
		extern_dac_vir_dai = "/extern_dac_vir_dai";
		asp_codec_codecless = "/asp_codec_codecless@FAB52000";
		soc_mad = "/soc_mad";
		analog_less_machine = "/analog_less_machine";
		asp_pcm_hifi = "/asp_pcm_hifi";
		asp_pcm_soc_dsp_config = "/asp_pcm_soc_dsp_config";
		asp_dmac = "/asp_dmac";
		pcm_armpc_custom = "/pcm_armpc_custom";
		audio_dp_machine = "/audio_dp_machine";
		soundwire_test = "/soundwire_test@FAB54000";
		sio1 = "/sio@FAB4F000";
		sio2 = "/sio@FAB4F400";
		sio3 = "/sio@FAB4F800";
		sio4 = "/sio@FAB4FC00";
		soundtrigger = "/soundtrigger@faB54000";
		pcm_drv_da_combine = "/pcm_drv_da_combine";
		hw_soundtrigger_event = "/hw_soundtrigger_event";
		codec_asp_dmac = "/codec_asp_dmac@faB4B000";
		asp_hdmi_dmac = "/asp_hdmi_dmac@faB4E400";
		asp_cfg = "/asp_cfg@faB4e000";
		dp_i2s = "/dp_i2s";
		dp_audio = "/dp_audio";
		dp_aux_switch = "/dp_aux_switch";
		audio_pcm_dp = "/audio-pcm-dp";
		hifidsp = "/hifidsp";
		hifidspextend = "/hifidspextend";
		sochifi_watchdog = "/sochifi_watchdog";
		usbaudio_dsp = "/usbaudio_dsp";
		codec_check = "/codec_check";
		deviceboxID = "/deviceboxID@0";
		audio_hw_config = "/audio_hw_config";
		dig_hs = "/dig_hs";
		audio_gpio_ctl = "/audio_gpio_ctl";
		ana_hs = "/ana_hs";
		audio_vqm = "/audio_vqm";
		audio_misc = "/audio_misc";
		hsdt1crg_usb20_phy = "/hsdt1crg_usb20_phy@efab0000";
		pddevice = "/pddevice";
		sensorhub_status = "/sensorhub_status";
		ipc = "/ipc@FA899000";
		sensorhub_nmi = "/sensorhub_nmi";
		hall = "/hall";
		gpio_check = "/gpio_check";
		vendor_chip_isp = "/hisi,hisi_isp";
		vendor_fd = "/huawei,hisi_fd";
		vendor_imx386hybird = "/huawei,imx386hybird";
		vendor_imx319 = "/huawei,imx319";
		vendor_imx600hybird = "/huawei,imx600hybird";
		vendor_imx600 = "/huawei,imx600";
		vendor_imx616 = "/huawei,imx616";
		vendor_imx516 = "/huawei,imx516";
		vendor_imx588 = "/huawei,imx588";
		vendor_imx688 = "/huawei,imx688";
		vendor_imx688_rear = "/huawei,imx688_rear";
		huawei_ov4689 = "/huawei,ov4689";
		vendor_c014utf = "/huawei,c014utf";
		vendor_c015fuc = "/huawei,c015fuc";
		vendor_c015amz = "/huawei,c015amz";
		vendor_c023oby = "/huawei,c023oby";
		vendor_c015gou = "/huawei,c015gou";
		huawei_c895hiv = "/huawei,c895hiv";
		huawei_c928hiv = "/huawei,c928hiv";
		huawei_c001yfi = "/huawei,c001yfi";
		huawei_c983kfc = "/huawei,c983kfc";
		huawei_c713utf = "/huawei,c713utf";
		huawei_c929quv = "/huawei,c929quv";
		huawei_c930dyf = "/huawei,c930dyf";
		huawei_c802dnr = "/huawei,c802dnr";
		huawei_c954dkl = "/huawei,c954dkl";
		huawei_c954dpo = "/huawei,c954dpo";
		huawei_c956dnr = "/huawei,c956dnr";
		huawei_c956utf = "/huawei,c956utf";
		huawei_c962dyb = "/huawei,c962dyb";
		huawei_c958dnr = "/huawei,c958dnr";
		huawei_c982mmj = "/huawei,c982mmj";
		huawei_c959qcp = "/huawei,c959qcp";
		huawei_c959qcp_swing = "/huawei,c959qcp_swing";
		huawei_c957ors = "/huawei,c957ors";
		huawei_c957oby = "/huawei,c957oby";
		huawei_c937dnr = "/huawei,c937dnr";
		huawei_c981mmj = "/huawei,c981mmj";
		huawei_c951mos = "/huawei,c951mos";
		huawei_c949dyb = "/huawei,c949dyb";
		huawei_c939hiv = "/huawei,c939hiv";
		huawei_c972yfi = "/huawei,c972yfi";
		huawei_c934hpw = "/huawei,c934hpw";
		huawei_c934ekr = "/huawei,c934ekr";
		huawei_c918dyb = "/huawei,c918dyb";
		huawei_c973hwy = "/huawei,c973hwy";
		huawei_c802utf = "/huawei,c802utf";
		huawei_c073oby = "/huawei,c073oby";
		huawei_c940oby = "/huawei,c940oby";
		huawei_c897utf = "/huawei,c897utf";
		huawei_c896utf = "/huawei,c896utf";
		huawei_c998hdt = "/huawei,c998hdt";
		huawei_c999hdt = "/huawei,c999hdt";
		huawei_c947utf = "/huawei,c947utf";
		huawei_c985dnr = "/huawei,c985dnr";
		huawei_c936hiv = "/huawei,c936hiv";
		huawei_c984yfi = "/huawei,c984yfi";
		huawei_c998yfi = "/huawei,c998yfi";
		huawei_c935mxw = "/huawei,c935mxw";
		huawei_c935dyb = "/huawei,c935dyb";
		huawei_c937utf = "/huawei,c937utf";
		huawei_c987hdt = "/huawei,c987hdt";
		huawei_c988eva = "/huawei,c988eva";
		huawei_c806zgl = "/huawei,c806zgl";
		huawei_c806muf = "/huawei,c806muf";
		huawei_c806quo = "/huawei,c806quo";
		huawei_c802utf_swing = "/huawei,c802utf_swing";
		huawei_c802utf_swing_folded = "/huawei,c802utf_swing_folded";
		huawei_c802dnr_swing = "/huawei,c802dnr_swing";
		huawei_c802dnr_swing_folded = "/huawei,c802dnr_swing_folded";
		huawei_c947utf_swing = "/huawei,c947utf_swing";
		huawei_c985dnr_swing = "/huawei,c985dnr_swing";
		huawei_c897utf_swing = "/huawei,c897utf_swing";
		huawei_c896utf_swing = "/huawei,c896utf_swing";
		huawei_c998hdt_swing = "/huawei,c998hdt_swing";
		huawei_c999hdt_swing = "/huawei,c999hdt_swing";
		huawei_c713utf_swing = "/huawei,c713utf_swing";
		huawei_c896utfxg = "/huawei,c896utfxg";
		huawei_c999hdtxg = "/huawei,c999hdtxg";
		huawei_c937utf_swing = "/huawei_c937utf_swing";
		huawei_c987hdt_swing = "/huawei_c987hdt_swing";
		huawei_c956dnr_swing = "/huawei,c956dnr_swing";
		huawei_c956utf_swing = "/huawei,c956utf_swing";
		huawei_c982mmj_swing = "/huawei,c982mmj_swing";
		huawei_c824qcp = "/huawei,c824qcp";
		huawei_c824xba = "/huawei,c824xba";
		huawei_c877aor = "/huawei,c877aor";
		huawei_c877mmj = "/huawei,c877mmj";
		huawei_c919fuv = "/huawei,c919fuv";
		huawei_c919fuv_swing = "/huawei,c919fuv_swing";
		huawei_c842fuv = "/huawei,c842fuv";
		huawei_c842ogu = "/huawei,c842ogu";
		huawei_c950ouo = "/huawei,c950ouo";
		huawei_c856mmj = "/huawei,c856mmj";
		huawei_c851pol = "/huawei,c851pol";
		huawei_c854irc = "/huawei,c854irc";
		huawei_c856mmj_swing = "/huawei,c856mmj_swing";
		huawei_c963hiv = "/huawei,c963hiv";
		huawei_c963yfi = "/huawei,c963yfi";
		huawei_c931dyf = "/huawei,c931dyf";
		huawei_c932oby = "/huawei,c932oby";
		huawei_c931dyf257 = "/huawei,c931dyf257";
		huawei_c931dyf257_swing = "/huawei,c931dyf257_swing";
		vendor_imx616_fpc = "/huawei,imx616_fpc";
		cam_misc = "/huawei,cam_misc";
		smmu_hsdt1 = "/smmuv3_hsdt1";
		isp = "/isp";
		dev_ivp1 = "/dev_ivp1";
		dev_ivp1_ipc = "/dev_ivp1_ipc";
		hisee_mntn = "/hisee_mntn";
		dp_source_switch = "/dp_source_switch";
		irda = "/irda";
		nfc_exist = "/nfc_exist";
		ese_config = "/ese_config";
		fingerprint = "/fingerprint";
		auth_cert = "/auth_cert@0";
		sec_auth = "/sec_auth";
		huawei_rsmc = "/huawei_rsmc";
		huawei_sate = "/huawei_sate";
		singleap_wifionly = "/singleap_wifionly";
		reserved_memory = "/reserved_memory";
		hifi_vir_dai = "/hifi_vir_dai";
		sound_DA_separate = "/sound_DA_separate";
		antenna_boardid_detect = "/antenna_boardid_detect";
		thermal_interface = "/thermal_interface";
		huawei_cloud_network = "/huawei,cloud_network";
		hw_ufs_led = "/hw_ufs_led";
		hisi_usb_armpc = "/hisi_usb_armpc";
		hw_bios_wol = "/hw_bios_wol";
		hw_trans_bios_variable = "/hw_trans_bios_variable";
		hw_usb_hub = "/hw_usb_hub";
		power_misc = "/power_misc";
		hw_pcie_0 = "/hw_pcie_0";
		hw_pcie_1 = "/hw_pcie_1";
		huawei_memory = "/huawei_memory";
		huawei_external_camera = "/huawei_external_camera";
		huawei_sparklink = "/huawei_sparklink";
	};
};